Re: [PATCH 3/3] powerpc/mm: Mark __init memory no-execute when STRICT_KERNEL_RWX=y

Hi Michael, [auto build test ERROR on powerpc/next] [also build test ERROR on next-20170714] [cannot apply to v4.12] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Michael-Ellerman/powerpc-mm

Re: [PATCH] machintosh: select defaults for cooling

On Fri, 2017-07-14 at 13:46 +0200, Linus Walleij wrote: > I have this pretty nasty problem when trying to boot up a fresh > openSuSE DVD on a PowerMac G5: the kernel by default does not have > CONFIG_WINDFARM_PM72 enabled, with the effect that the cooling > is not functioning. > > The BIOS on the

Re: [PATCH 4/5] powerpc/lib/sstep: Add prty instruction emulation

Hi Matt, [auto build test ERROR on powerpc/next] [also build test ERROR on v4.12 next-20170714] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Matt-Brown/powerpc-lib-sstep-Add-cmpb-instruction

Re: [PATCH 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

On Fri, Jul 14, 2017 at 02:19:34PM +1000, Matt Brown wrote: > >> +static nokprobe_inline void do_bpermd(struct pt_regs *regs, unsigned long > >> v1, > >> + unsigned long v2, int ra) > >> +{ > >> + unsigned int idx, i; > >> + unsigned char perm; > >> + > >> +

[GIT PULL] Please pull powerpc/linux.git powerpc-4.13-2 tag

Hi Linus, Please pull the first set of powerpc fixes for 4.13: The following changes since commit af3c8d98508d37541d4bf57f13a984a7f73a328c: Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux (2017-07-09 18:48:37 -0700) are available in the git repository at:

[PATCH] machintosh: select defaults for cooling

I have this pretty nasty problem when trying to boot up a fresh openSuSE DVD on a PowerMac G5: the kernel by default does not have CONFIG_WINDFARM_PM72 enabled, with the effect that the cooling is not functioning. The BIOS on the PowerMac G5 reacts to this by, after a grace period when the BIOS

Re: [PATCH] POWER9 PMU interrupt after idle workaround

Hi Nick, > POWER9 DD2 can see spurious PMU interrupts after state-loss idle in > some conditions. > > A solution is to save and reload MMCR0 over state-loss idle. Thanks, looks good. Tested-by: Anton Blanchard Anton > Signed-off-by: Nicholas Piggin > ---

Re: [alsa-devel] [PATCH] ASoC: fsl_asrc: constify snd_soc_dai_ops structure

On Fri, Jul 14, 2017 at 04:08:21AM -0700, Joe Perches wrote: > On Fri, 2017-07-14 at 12:02 +0100, Mark Brown wrote: > > On Thu, Jul 13, 2017 at 11:18:11AM -0700, Joe Perches wrote: > > > I don't it's better. > > > It's not that confusing if the 0/n patch cover letter is cc'd > > > to all the

Re: [alsa-devel] [PATCH] ASoC: fsl_asrc: constify snd_soc_dai_ops structure

On Fri, 2017-07-14 at 12:02 +0100, Mark Brown wrote: > On Thu, Jul 13, 2017 at 11:18:11AM -0700, Joe Perches wrote: > > > I don't it's better. > > It's not that confusing if the 0/n patch cover letter is cc'd > > to all the appropriate mailing lists and all the [1..n]/n > > patches are sent with

Re: [alsa-devel] [PATCH] ASoC: fsl_asrc: constify snd_soc_dai_ops structure

On Thu, Jul 13, 2017 at 11:18:11AM -0700, Joe Perches wrote: > I don't it's better. > It's not that confusing if the 0/n patch cover letter is cc'd > to all the appropriate mailing lists and all the [1..n]/n > patches are sent with in-reply-to of the cover letter and > send to the maintainers

[PATCH/RFC] powerpc: Better handle "error" type page faults on book3s64

There are a number of conditions in the DSISR that represent conditions for which there is no point looking for a VMA or trying to update a PTE. In fact, POWER9 adds a few with bad AMOs, bad "paste" instruction etc... This improve our existing code to use symbolic constants for all DSISR bits,

[linux-next][bisected 1c0eaf0f] Today's next kernel fails to boot on ppc bare-metal

Hi Today's linux-next fails to boot on ppc bare-metal Test: Boot Machine: Power 8 bare-metal kernel: 4.12.0-next-20170713 gcc: version 4.8.5 config : Tul-NV-config attached. boot logs: -- OPAL nvram setup, 1048576 bytes Zone ranges: DMA [mem

Re: [PATCH 1/4] powerpc/mm/radix: Don't iterate all sets when flushing the PWC

On Fri, 2017-07-14 at 12:33 +0530, Aneesh Kumar K.V wrote: > Benjamin Herrenschmidt writes: > > > On Fri, 2017-07-14 at 11:11 +0530, Aneesh Kumar K.V wrote: > > > With the current code, we use tlbiel_pwc() for doing a pwc flush. > > > and that does what is done this

Re: [PATCH 1/4] powerpc/mm/radix: Don't iterate all sets when flushing the PWC

Benjamin Herrenschmidt writes: > On Fri, 2017-07-14 at 11:11 +0530, Aneesh Kumar K.V wrote: >> With the current code, we use tlbiel_pwc() for doing a pwc flush. >> and that does what is done this patch. May be we can update this patch >> such that we drop tlbiel_pwc and

[PATCH 3/3] powerpc/mm: Mark __init memory no-execute when STRICT_KERNEL_RWX=y

Currently even with STRICT_KERNEL_RWX we leave the __init text marked executable after init, which is bad. Add a hook to mark it NX (no-execute) before we free it, and implement it for radix and hash. Note that we use __init_end as the end address, not _einittext, because overlaps_kernel_text()

[PATCH 2/3] powerpc/mm/hash: Refactor hash__mark_rodata_ro()

Move the core logic into a helper, so we can use it for changing other permissions. We also change the logic to align start down, and end up. This means calling the function with a range will expand that range to be at least 1 mmu_linear_psize page in size. We need that so we can use it on

[PATCH 1/3] powerpc/mm/radix: Refactor radix__mark_rodata_ro()

Move the core logic into a helper, so we can use it for changing permissions other than _PAGE_WRITE. Signed-off-by: Michael Ellerman --- arch/powerpc/mm/pgtable-radix.c | 20 +++- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git

[PATCH v2] powerpc/mm/radix: Workaround prefetch issue with KVM

There's a somewhat architectural issue with Radix MMU and KVM. When coming out of a guest with AIL (ie, MMU enabled), we start executing hypervisor code with the PID register still containing whatever the guest has been using. The problem is that the CPU can (and will) then start prefetching or

Re: [bug] KVM: Unrecoverable TM Unavailable Exception f60

- Original Message - > On Thu, 2017-07-13 at 08:07 -0400, Jan Stancek wrote: > > (You may want to CC the patch author... Added Paul). I did CC him using email address from patch. Maybe some list de-duplication dropped it? > > > - Original Message - > > > Hi, > > > > > > I'm

Re: [PATCH 4/4] powerpc/mm/radix: Workaround prefetch issue with KVM

On Fri, 2017-07-14 at 11:21 +0530, Aneesh Kumar K.V wrote: > > > There is still an issue with malicious guests purposefully setting > > the PID register to a value in the host range. Hopefully future HW > > can prevent that, but in the meantime, we handle it with a pair of > > kludges: > > > >

Re: [PATCH 3/4] powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range

On Fri, 2017-07-14 at 11:14 +0530, Aneesh Kumar K.V wrote: > > + pid = mm ? mm->context.id : 0; > > + if (unlikely(pid == MMU_NO_CONTEXT)) > > + goto no_context; > > + > > + /* 4k page size, just blow the world */ > > + if (PAGE_SIZE == 0x1000) { > > + 

Re: [PATCH 1/4] powerpc/mm/radix: Don't iterate all sets when flushing the PWC

On Fri, 2017-07-14 at 11:11 +0530, Aneesh Kumar K.V wrote: > With the current code, we use tlbiel_pwc() for doing a pwc flush. > and that does what is done this patch. May be we can update this patch > such that we drop tlbiel_pwc and switch all those instance to > tlbiel_pid(pid, RIC_FLUSH_PWC) ?