Re: [PATCH] sound: soc: fsl: Do not set DAI sysclk when it is equal to system freq

2017-09-04 Thread Nicolin Chen 
On Sun, Sep 03, 2017 at 04:40:21PM +0200, Łukasz Majewski wrote:
> >/*
> >* Hardware limitation: The bclk rate must be
> >* never greater than 1/5 IPG clock rate
> >*/
> >if (freq * 5 > clk_get_rate(ssi_private->clk)) {
> >dev_err(cpu_dai->dev, "bitclk > ipgclk/5\n");
> >return -EINVAL;
> >}
> >
> 
> Unfortunately not.
> 
> This is the part of fsl_ssi_set_bclk() function which is called after
> fsl_ssi_set_dai_sysclk() (which sets ssi_private->bitclk_freq = freq;).
> 
> Before the aforementioned check we do have:
> 
>   if (ssi_private->bitclk_freq)
>   freq = ssi_private->bitclk_freq;
>   else
>   freq = params_channels(hw_params) * 32 *
> params_rate(hw_params);
> 
> 
> Which assigns freq = bitclk_freq (66 MHz)
> 
[...]
> And then we break on this particular check:
> 66MHz * 5 > 66 MHz.
[...]

Does the check fail and return an error here, or not?

> The culprit IMHO is the  ssi_private->bitclk_freq = freq; in the
> fsl_ssi_set_dai_sysclk(), since we _should_ set SSI's IP block clock
> (ssi_private->clk), not the bit clock (BCLK).

No. We should not set the IP block clock. That's from IPG bus
on certain IMX SoCs. Setting it might change IPG bus clocks
which might break the system.

And apparently, we shouldn't set bitclk to 66MHz either. Can
you help to find where this 66MHz comes from?

> This patch just quits early if it detects change, which don't need to be
> done.

I kinda see your point is to error out before hw_params(). So
I feel it would be better to have a similar 5-times-check in
the set_sysclk() too, if it's really necessary.

Btw, I don't see simple card calling set_sysclk() function in
any earlier stage than hw_params(). I am wondering how did you
encounter the problem?

Thanks
Nicolin

Re: [GIT PULL 00/13] perf/core improvements and fixes

2017-09-04 Thread Ingo Molnar 

* Arnaldo Carvalho de Melo  wrote:

> Hi Ingo,
> 
>   Please consider pulling,
> 
> - Arnaldo
> 
> Test results at the end of this message, as usual.
> 
> The following changes since commit 1b2f76d77a277bb70d38ad0991ed7f16bbc115a9:
> 
>   Merge tag 'perf-core-for-mingo-4.14-20170829' of 
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core 
> (2017-08-29 23:13:56 +0200)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git 
> tags/perf-core-for-mingo-4.14-20170901
> 
> for you to fetch changes up to eba9fac017617e685d648339e29a1453a30cb065:
> 
>   perf annotate browser: Help for cycling thru hottest instructions with 
> TAB/shift+TAB (2017-09-01 14:55:40 -0300)
> 
> 
> perf/core improvements and fixes:
> 
> - Support syscall name glob matching in 'perf trace' (Arnaldo Carvalho de 
> Melo)
> 
>   e.g.:
> 
># perf trace -e pkey_*
>32.784 (0.006 ms): pkey/16018 pkey_alloc(init_val: DISABLE_WRITE) = -1 
> EINVAL Invalid argument
>32.795 (0.004 ms): pkey/16018 pkey_mprotect(start: 0x7f380d0a6000, len: 
> 4096, prot: READ|WRITE, pkey: -1) = 0
>32.801 (0.002 ms): pkey/16018 pkey_free(pkey: -1) = -1 
> EINVAL Invalid argument
>^C#
> 
> - Do not auto merge counts for explicitely specified events in
>   'perf stat' (Arnaldo Carvalho de Melo)
> 
> - Fix syntax in documentation of .perfconfig intel-pt option (Jack Henschel)
> 
> - Calculate the average cycles of iterations for loops detected by the
>   branch history support in 'perf report' (Jin Yao)
> 
> - Support PERF_SAMPLE_PHYS_ADDR as a sort key "phys_daddr" in the 'script', 
> 'mem',
>   'top' and 'report'. Also add a test entry for it in 'perf test' (Kan Liang)
> 
> - Fix 'Object code reading' 'perf test' entry in PowerPC (Ravi Bangoria)
> 
> - Remove some duplicate Power9 duplicate vendor events (described in JSON
>   files) (Sukadev Bhattiprolu)
> 
> - Add help entry in the TUI annotate browser about cycling thru hottest
>   instructions with TAB/shift+TAB (Arnaldo Carvalho de Melo)
> 
> Signed-off-by: Arnaldo Carvalho de Melo 
> 
> 
> Arnaldo Carvalho de Melo (4):
>   perf syscalltbl: Support glob matching on syscall names
>   perf trace: Support syscall name globbing
>   perf stat: Only auto-merge events that are PMU aliases
>   perf annotate browser: Help for cycling thru hottest instructions with 
> TAB/shift+TAB
> 
> Jack Henschel (1):
>   perf intel-pt: Fix syntax in documentation of config option
> 
> Jin Yao (1):
>   perf report: Calculate the average cycles of iterations
> 
> Kan Liang (5):
>   perf tools: Support new sample type for physical address
>   perf sort: Add sort option for physical address
>   perf mem: Support physical address
>   perf script: Support physical address
>   perf test: Add test case for PERF_SAMPLE_PHYS_ADDR
> 
> Ravi Bangoria (1):
>   perf test powerpc: Fix 'Object code reading' test
> 
> Sukadev Bhattiprolu (1):
>   perf vendor events powerpc: Remove duplicate events
> 
>  tools/include/uapi/linux/perf_event.h  |   4 +-
>  tools/perf/Documentation/intel-pt.txt  |   2 +-
>  tools/perf/Documentation/perf-mem.txt  |   4 +
>  tools/perf/Documentation/perf-record.txt   |   5 +-
>  tools/perf/Documentation/perf-report.txt   |   1 +
>  tools/perf/Documentation/perf-script.txt   |   2 +-
>  tools/perf/Documentation/perf-trace.txt|   2 +-
>  tools/perf/builtin-mem.c   |  97 -
>  tools/perf/builtin-record.c|   2 +
>  tools/perf/builtin-script.c|  15 ++-
>  tools/perf/builtin-stat.c  |   2 +-
>  tools/perf/builtin-trace.c |  39 ++-
>  tools/perf/perf.h  |   1 +
>  .../pmu-events/arch/powerpc/power9/frontend.json   |   7 +-
>  .../perf/pmu-events/arch/powerpc/power9/other.json | 120 
> -
>  .../pmu-events/arch/powerpc/power9/pipeline.json   |   7 +-
>  tools/perf/pmu-events/arch/powerpc/power9/pmc.json |   7 +-
>  tools/perf/tests/code-reading.c|   5 +
>  tools/perf/tests/sample-parsing.c  |   6 +-
>  tools/perf/ui/browsers/annotate.c  |   3 +-
>  tools/perf/ui/browsers/hists.c |   8 +-
>  tools/perf/ui/stdio/hist.c |  10 +-
>  tools/perf/util/callchain.c|  49 -
>  tools/perf/util/callchain.h|   9 +-
>  tools/perf/util/event.h|   1 +
>  tools/perf/util/evsel.c|  19 +++-
>  tools/perf/util/evsel.h|   1 +
>

Re: [PATCH] sound: soc: fsl: Do not set DAI sysclk when it is equal to system freq

2017-09-04 Thread Nicolin Chen 
On Sun, Sep 03, 2017 at 01:05:01PM +0200, Lukasz Majewski wrote:
> The problem is visible in the following setup (on the imx6q):
> "simple-audio-card" -> ssi2 -> I2S + I2C -> codec
> 
> The function call log (simple-card probe -> CONFIG_SND_SIMPLE_CARD):
> 
> asoc_simple_card_init_dai() @ sound/soc/generic/simple-card-utils.c
> snd_soc_dai_set_sysclk()
> fsl_ssi_set_dai_sysclk() @ sound/soc/fsl/fsl_ssi.c
> 
> The last call is changing the bit clock (BCLK) frequency to SSI's IP
> block clock (ipg = 66 MHz) [1].

I think a bigger question here is why the routine sets BCLK to 66MHz.

> This is wrong, since IMX SSI block requires the I2S BCLK to be less
> than 1/5 of [1].
> 
> As a result the driver initialization passes without any errors, but the
> speaker-test test case breaks.
> 
> This commit checks if the fsl_ssi_set_dai_sysclk() frequency passed is
> not equal to [1].

I don't feel it's quite comprehensive...what if it's being set to 67MHz.

Thanks
Nicolin

> Signed-off-by: Lukasz Majewski 
> ---
>  sound/soc/fsl/fsl_ssi.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
> index 173cb84..1186fa9 100644
> --- a/sound/soc/fsl/fsl_ssi.c
> +++ b/sound/soc/fsl/fsl_ssi.c
> @@ -809,6 +809,8 @@ static int fsl_ssi_set_dai_sysclk(struct snd_soc_dai 
> *cpu_dai,
>   int clk_id, unsigned int freq, int dir)
>  {
>   struct fsl_ssi_private *ssi_private = snd_soc_dai_get_drvdata(cpu_dai);
> + if (clk_get_rate(ssi_private->clk) == freq)
> + return 0;
>  
>   ssi_private->bitclk_freq = freq;
>  
> -- 
> 2.1.4
>

Re: [FIX PATCH v0] powerpc: Fix memory unplug failure on radix guest

2017-09-04 Thread Bharata B Rao 
On Fri, Sep 01, 2017 at 09:11:18AM -0500, Nathan Fontenot wrote:
> On 09/01/2017 01:53 AM, Bharata B Rao wrote:
> > On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote:
> >> For a PowerKVM guest, it is possible to specify a DIMM device in
> >> addition to the system RAM at boot time. When such a cold plugged DIMM
> >> device is removed from a radix guest, we hit the following warning in the
> >> guest kernel resulting in the eventual failure of memory unplug:
> >>
> >> remove_pud_table: unaligned range
> >> WARNING: CPU: 3 PID: 164 at arch/powerpc/mm/pgtable-radix.c:597 
> >> remove_pagetable+0x468/0xca0
> >> Call Trace:
> >> remove_pagetable+0x464/0xca0 (unreliable)
> >> radix__remove_section_mapping+0x24/0x40
> >> remove_section_mapping+0x28/0x60
> >> arch_remove_memory+0xcc/0x120
> >> remove_memory+0x1ac/0x270
> >> dlpar_remove_lmb+0x1ac/0x210
> >> dlpar_memory+0xbc4/0xeb0
> >> pseries_hp_work_fn+0x1a4/0x230
> >> process_one_work+0x1cc/0x660
> >> worker_thread+0xac/0x6d0
> >> kthread+0x16c/0x1b0
> >> ret_from_kernel_thread+0x5c/0x74
> >>
> >> The DIMM memory that is cold plugged gets merged to the same memblock
> >> region as RAM and hence gets mapped at 1G alignment. However since the
> >> removal is done for one LMB (lmb size 256MB) at a time, the address
> >> of the LMB (which is 256MB aligned) would get flagged as unaligned
> >> in remove_pud_table() resulting in the above failure.
> >>
> >> This problem is not seen for hot plugged memory because for the
> >> hot plugged memory, the mappings are created separately for each
> >> LMB and hence they all get aligned at 256MB.
> >>
> >> To fix this problem for the cold plugged memory, let us mark the
> >> cold plugged memblock region explicitly as HOTPLUGGED so that the
> >> region doesn't get merged with RAM. All the memory that is discovered
> >> via ibm,dynamic-memory-configuration is marked so(1). Next identify
> >> such regions in radix_init_pgtable() and create separate mappings
> >> within that region for each LMB so that they get don't get aligned
> >> like RAM region at 1G (2).
> >>
> >> (1) For PowerKVM guests, all boot time memory is represented via
> >> memory@ nodes and hot plugged/pluggable memory is represented via
> >> ibm,dynamic-memory-reconfiguration property. We are marking all
> >> hotplugged memory that is in ASSIGNED state during boot as HOTPLUGGED.
> >> With this only cold plugged memory gets marked for PowerKVM but
> >> need to check how this will affect PowerVM guests.
> >>
> >> (2) To create separate mappings for every LMB in the hot plugged
> >> region, we need lmb-size. I am currently using memory_block_size_bytes()
> >> API to get the lmb-size. Since this is early init time code, the
> >> machine type isn't probed yet and hence memory_block_size_bytes()
> >> would return the default LMB size as 16MB. Hence we end up creating
> >> separate mappings at much lower granularity than what we can ideally
> >> do for pseries machine.
> >>
> >> Signed-off-by: Bharata B Rao 
> >> ---
> >>  arch/powerpc/kernel/prom.c  |  1 +
> >>  arch/powerpc/mm/pgtable-radix.c | 17 ++---
> >>  2 files changed, 15 insertions(+), 3 deletions(-)
> >>
> >> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> >> index f830562..24ecf53 100644
> >> --- a/arch/powerpc/kernel/prom.c
> >> +++ b/arch/powerpc/kernel/prom.c
> >> @@ -524,6 +524,7 @@ static int __init 
> >> early_init_dt_scan_drconf_memory(unsigned long node)
> >>size = 0x8000ul - base;
> >>}
> >>memblock_add(base, size);
> >> +  memblock_mark_hotplug(base, size);
> > 
> > One of the suggestions was to make the above conditional to radix so
> > that PowerVM doesn't get affected by this. However early_radix_enabled()
> > check isn't usable yet at this point and MMU_FTR_TYPE_RADIX will get set
> > only a bit later in early_init_devtree().
> 
> We do walk the dynamic reconfiguration memory again in the numa code, see
> parse_drconf_memory() in numa.c, would it far enough along in boot to use
> early_radix_enabled() and mark the memory hotplug at this point?

parse_drconf_memory() in numa.c happens after radix page tables are setup.
Hence setting the hotplugged state from it will not help.

Regards,
Bharata.

[rfc 3/3] powerpc/mce: hookup memory_failure for UE errors

2017-09-04 Thread Balbir Singh 
If we are in user space and hit a UE error, we now have the
basic infrastructure to walk the page tables and find out
the effective address that was accessed, since the DAR
is not valid.

We use a work_queue content to hookup the bad pfn, any
other context causes problems, since memory_failure itself
can call into schedule() via lru_drain_ bits.

We could probably poison the struct page to avoid a race
between detection and taking corrective action.

Signed-off-by: Balbir Singh 
---
 arch/powerpc/kernel/mce.c | 62 ---
 1 file changed, 59 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c
index f41a75d..39986d5 100644
--- a/arch/powerpc/kernel/mce.c
+++ b/arch/powerpc/kernel/mce.c
@@ -39,11 +39,20 @@ static DEFINE_PER_CPU(struct 
machine_check_event[MAX_MC_EVT], mce_event);
 static DEFINE_PER_CPU(int, mce_queue_count);
 static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], mce_event_queue);
 
+/* Queue for delayed MCE UE events. */
+static DEFINE_PER_CPU(int, mce_ue_count);
+static DEFINE_PER_CPU(struct machine_check_event[MAX_MC_EVT], 
mce_ue_event_queue);
+
 static void machine_check_process_queued_event(struct irq_work *work);
+void machine_check_ue_event(struct machine_check_event *evt);
+static void machine_process_ue_event(struct work_struct *work);
+
 static struct irq_work mce_event_process_work = {
 .func = machine_check_process_queued_event,
 };
 
+DECLARE_WORK(mce_ue_event_work, machine_process_ue_event);
+
 static void mce_set_error_info(struct machine_check_event *mce,
   struct mce_error_info *mce_err)
 {
@@ -143,6 +152,7 @@ void save_mce_event(struct pt_regs *regs, long handled,
if (phys_addr != ULONG_MAX) {
mce->u.ue_error.physical_address_provided = true;
mce->u.ue_error.physical_address = phys_addr;
+   machine_check_ue_event(mce);
}
}
return;
@@ -197,6 +207,26 @@ void release_mce_event(void)
get_mce_event(NULL, true);
 }
 
+
+/*
+ * Queue up the MCE event which then can be handled later.
+ */
+void machine_check_ue_event(struct machine_check_event *evt)
+{
+   int index;
+
+   index = __this_cpu_inc_return(mce_ue_count) - 1;
+   /* If queue is full, just return for now. */
+   if (index >= MAX_MC_EVT) {
+   __this_cpu_dec(mce_ue_count);
+   return;
+   }
+   memcpy(this_cpu_ptr(_ue_event_queue[index]), evt, sizeof(*evt));
+
+   /* Queue work to process this event later. */
+   schedule_work(_ue_event_work);
+}
+
 /*
  * Queue up the MCE event which then can be handled later.
  */
@@ -219,7 +249,32 @@ void machine_check_queue_event(void)
/* Queue irq work to process this event later. */
irq_work_queue(_event_process_work);
 }
-
+/*
+ * process pending MCE event from the mce event queue. This function will be
+ * called during syscall exit.
+ */
+static void machine_process_ue_event(struct work_struct *work)
+{
+   int index;
+   struct machine_check_event *evt;
+
+   while (__this_cpu_read(mce_ue_count) > 0) {
+   index = __this_cpu_read(mce_ue_count) - 1;
+   evt = this_cpu_ptr(_ue_event_queue[index]);
+#ifdef CONFIG_MEMORY_FAILURE
+   /*
+* This should probably queued elsewhere, but
+* oh! well
+*/
+   if (evt->error_type == MCE_ERROR_TYPE_UE) {
+   if (evt->u.ue_error.physical_address_provided)
+   memory_failure(evt->u.ue_error.physical_address,
+   SIGBUS, 0);
+   }
+#endif
+   __this_cpu_dec(mce_ue_count);
+   }
+}
 /*
  * process pending MCE event from the mce event queue. This function will be
  * called during syscall exit.
@@ -227,6 +282,7 @@ void machine_check_queue_event(void)
 static void machine_check_process_queued_event(struct irq_work *work)
 {
int index;
+   struct machine_check_event *evt;
 
add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
 
@@ -236,8 +292,8 @@ static void machine_check_process_queued_event(struct 
irq_work *work)
 */
while (__this_cpu_read(mce_queue_count) > 0) {
index = __this_cpu_read(mce_queue_count) - 1;
-   machine_check_print_event_info(
-   this_cpu_ptr(_event_queue[index]), false);
+   evt = this_cpu_ptr(_event_queue[index]);
+   machine_check_print_event_info(evt, false);
__this_cpu_dec(mce_queue_count);
}
 }
-- 
2.9.5

[rfc 2/3] powerpc/mce: Extract physical_address for UE errors

2017-09-04 Thread Balbir Singh 
Walk the page table for NIP and extract the instruction. Then
use the instruction to find the effective address via analyse_instr().

We might have page table walking races, but we expect them to
be rare, the physical address extraction is best effort. The idea
is to then hook up this infrastructure to memory failure eventually.

Signed-off-by: Balbir Singh 
---
 arch/powerpc/include/asm/mce.h  |  2 +-
 arch/powerpc/kernel/mce.c   |  6 -
 arch/powerpc/kernel/mce_power.c | 60 +
 3 files changed, 61 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h
index 75292c7..3a1226e 100644
--- a/arch/powerpc/include/asm/mce.h
+++ b/arch/powerpc/include/asm/mce.h
@@ -204,7 +204,7 @@ struct mce_error_info {
 
 extern void save_mce_event(struct pt_regs *regs, long handled,
   struct mce_error_info *mce_err, uint64_t nip,
-  uint64_t addr);
+  uint64_t addr, uint64_t phys_addr);
 extern int get_mce_event(struct machine_check_event *mce, bool release);
 extern void release_mce_event(void);
 extern void machine_check_queue_event(void);
diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c
index e254399..f41a75d 100644
--- a/arch/powerpc/kernel/mce.c
+++ b/arch/powerpc/kernel/mce.c
@@ -82,7 +82,7 @@ static void mce_set_error_info(struct machine_check_event 
*mce,
  */
 void save_mce_event(struct pt_regs *regs, long handled,
struct mce_error_info *mce_err,
-   uint64_t nip, uint64_t addr)
+   uint64_t nip, uint64_t addr, uint64_t phys_addr)
 {
int index = __this_cpu_inc_return(mce_nest_count) - 1;
struct machine_check_event *mce = this_cpu_ptr(_event[index]);
@@ -140,6 +140,10 @@ void save_mce_event(struct pt_regs *regs, long handled,
} else if (mce->error_type == MCE_ERROR_TYPE_UE) {
mce->u.ue_error.effective_address_provided = true;
mce->u.ue_error.effective_address = addr;
+   if (phys_addr != ULONG_MAX) {
+   mce->u.ue_error.physical_address_provided = true;
+   mce->u.ue_error.physical_address = phys_addr;
+   }
}
return;
 }
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index b76ca19..b77a698 100644
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -27,6 +27,25 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+
+static unsigned long addr_to_pfn(struct mm_struct *mm, unsigned long addr)
+{
+   pte_t *ptep;
+   unsigned long flags;
+
+   local_irq_save(flags);
+   if (mm == current->mm)
+   ptep = find_current_mm_pte(mm->pgd, addr, NULL, NULL);
+   else
+   ptep = find_init_mm_pte(addr, NULL);
+   local_irq_restore(flags);
+   if (!ptep)
+   return ULONG_MAX;
+   return pte_pfn(*ptep);
+}
 
 static void flush_tlb_206(unsigned int num_sets, unsigned int action)
 {
@@ -489,7 +508,8 @@ static int mce_handle_ierror(struct pt_regs *regs,
 
 static int mce_handle_derror(struct pt_regs *regs,
const struct mce_derror_table table[],
-   struct mce_error_info *mce_err, uint64_t *addr)
+   struct mce_error_info *mce_err, uint64_t *addr,
+   uint64_t *phys_addr)
 {
uint64_t dsisr = regs->dsisr;
int handled = 0;
@@ -555,7 +575,37 @@ static int mce_handle_derror(struct pt_regs *regs,
mce_err->initiator = table[i].initiator;
if (table[i].dar_valid)
*addr = regs->dar;
-
+   else if (mce_err->severity == MCE_SEV_ERROR_SYNC &&
+   table[i].error_type == MCE_ERROR_TYPE_UE) {
+   /*
+* Carefully look at the NIP to determine
+* the instruction to analyse. Reading the NIP
+* in real-mode is tricky and can lead to recursive
+* faults
+*/
+   int instr;
+   struct mm_struct *mm;
+   unsigned long nip = regs->nip;
+   unsigned long pfn = 0, instr_addr;
+   struct instruction_op op;
+   struct pt_regs tmp = *regs;
+
+   if (user_mode(regs))
+   mm = current->mm;
+   else
+   mm = _mm;
+
+   pfn = addr_to_pfn(mm, nip);
+   if (pfn != ULONG_MAX) {
+   instr_addr = (pfn << PAGE_SHIFT) + (nip & 
~PAGE_MASK);
+   instr = *(unsigned int *)(instr_addr);
+   if (!analyse_instr(, ,

[rfc 1/3] powerpc/mce.c: Remove unused function get_mce_fault_addr()

2017-09-04 Thread Balbir Singh 
There are no users of get_mce_fault_addr()

Fixes: b63a0ff ("powerpc/powernv: Machine check exception handling.")

Signed-off-by: Balbir Singh 
---
 arch/powerpc/include/asm/mce.h |  2 --
 arch/powerpc/kernel/mce.c  | 39 ---
 2 files changed, 41 deletions(-)

diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h
index 190d69a..75292c7 100644
--- a/arch/powerpc/include/asm/mce.h
+++ b/arch/powerpc/include/asm/mce.h
@@ -210,6 +210,4 @@ extern void release_mce_event(void);
 extern void machine_check_queue_event(void);
 extern void machine_check_print_event_info(struct machine_check_event *evt,
   bool user_mode);
-extern uint64_t get_mce_fault_addr(struct machine_check_event *evt);
-
 #endif /* __ASM_PPC64_MCE_H__ */
diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c
index 9b2ea7e..e254399 100644
--- a/arch/powerpc/kernel/mce.c
+++ b/arch/powerpc/kernel/mce.c
@@ -411,45 +411,6 @@ void machine_check_print_event_info(struct 
machine_check_event *evt,
 }
 EXPORT_SYMBOL_GPL(machine_check_print_event_info);
 
-uint64_t get_mce_fault_addr(struct machine_check_event *evt)
-{
-   switch (evt->error_type) {
-   case MCE_ERROR_TYPE_UE:
-   if (evt->u.ue_error.effective_address_provided)
-   return evt->u.ue_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_SLB:
-   if (evt->u.slb_error.effective_address_provided)
-   return evt->u.slb_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_ERAT:
-   if (evt->u.erat_error.effective_address_provided)
-   return evt->u.erat_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_TLB:
-   if (evt->u.tlb_error.effective_address_provided)
-   return evt->u.tlb_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_USER:
-   if (evt->u.user_error.effective_address_provided)
-   return evt->u.user_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_RA:
-   if (evt->u.ra_error.effective_address_provided)
-   return evt->u.ra_error.effective_address;
-   break;
-   case MCE_ERROR_TYPE_LINK:
-   if (evt->u.link_error.effective_address_provided)
-   return evt->u.link_error.effective_address;
-   break;
-   default:
-   case MCE_ERROR_TYPE_UNKNOWN:
-   break;
-   }
-   return 0;
-}
-EXPORT_SYMBOL(get_mce_fault_addr);
-
 /*
  * This function is called in real mode. Strictly no printk's please.
  *
-- 
2.9.5

[rfc 0/3] Revisit MCE handling for UE errors

2017-09-04 Thread Balbir Singh 
This patch series is designed to hook up memory_failure on
UE errors, this is specially helpful for user_mode UE errors.

The first patch is a cleanup patch, it removes dead code.
I could not find any users of get_mce_fault_addr().
The second patch walks kernel/user mode page tables in
real mode to extract the effective address of the instruction
that caused the UE error and the effective address it was
trying to access (for load/store).
The third patch hooks up memory_failure to the MCE patch.

TODO:
Log the address in NVRAM, so that we can recover from
bad pages at boot and keep the blacklist persistent.

Balbir Singh (3):
  powerpc/mce.c: Remove unused function get_mce_fault_addr()
  powerpc/mce: Extract physical_address for UE errors
  powerpc/mce: hookup memory_failure for UE errors

 arch/powerpc/include/asm/mce.h  |   4 +-
 arch/powerpc/kernel/mce.c   | 107 
 arch/powerpc/kernel/mce_power.c |  60 --
 3 files changed, 120 insertions(+), 51 deletions(-)

-- 
2.9.5

[PATCH 2/2] powerpc/powernv/npu: Don't explicitly flush nmmu tlb

2017-09-04 Thread Alistair Popple 
The nest mmu required an explicit flush as a tlbi would not flush it in the
same way as the core. However an alternate firmware fix exists which should
eliminate the need for this flush, so instead add a device-tree property
(ibm,nmmu-flush) on the NVLink2 PHB to enable it only if required.

Signed-off-by: Alistair Popple 
---
 arch/powerpc/platforms/powernv/npu-dma.c | 28 +++-
 arch/powerpc/platforms/powernv/pci.h |  3 +++
 2 files changed, 26 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c 
b/arch/powerpc/platforms/powernv/npu-dma.c
index 2fff9a65..4b4fcac 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -395,6 +395,7 @@ struct npu_context {
struct pci_dev *npdev[NV_MAX_NPUS][NV_MAX_LINKS];
struct mmu_notifier mn;
struct kref kref;
+   bool nmmu_flush;
 
/* Callback to stop translation requests on a given GPU */
struct npu_context *(*release_cb)(struct npu_context *, void *);
@@ -545,11 +546,13 @@ static void mmio_invalidate(struct npu_context 
*npu_context, int va,
struct mmio_atsd_reg mmio_atsd_reg[NV_MAX_NPUS];
unsigned long pid = npu_context->mm->context.id;
 
-   /*
-* Unfortunately the nest mmu does not support flushing specific
-* addresses so we have to flush the whole mm.
-*/
-   flush_all_mm(npu_context->mm);
+   if (npu_context->nmmu_flush)
+   /*
+* Unfortunately the nest mmu does not support flushing specific
+* addresses so we have to flush the whole mm once before
+* shooting down the GPU translation.
+*/
+   flush_all_mm(npu_context->mm);
 
/*
 * Loop over all the NPUs this process is active on and launch
@@ -722,6 +725,16 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev 
*gpdev,
return ERR_PTR(-ENODEV);
npu_context->npdev[npu->index][nvlink_index] = npdev;
 
+   if (!nphb->npu.nmmu_flush) {
+   /*
+* If we're not explicitly flushing ourselves we need to mark
+* the thread for global flushes
+*/
+   npu_context->nmmu_flush = false;
+   inc_mm_active_cpus(mm);
+   } else
+   npu_context->nmmu_flush = true;
+
return npu_context;
 }
 EXPORT_SYMBOL(pnv_npu2_init_context);
@@ -731,6 +744,9 @@ static void pnv_npu2_release_context(struct kref *kref)
struct npu_context *npu_context =
container_of(kref, struct npu_context, kref);
 
+   if (!npu_context->nmmu_flush)
+   dec_mm_active_cpus(npu_context->mm);
+
npu_context->mm->context.npu_context = NULL;
mmu_notifier_unregister(_context->mn,
npu_context->mm);
@@ -819,6 +835,8 @@ int pnv_npu2_init(struct pnv_phb *phb)
static int npu_index;
uint64_t rc = 0;
 
+   phb->npu.nmmu_flush =
+   of_property_read_bool(phb->hose->dn, "ibm,nmmu-flush");
for_each_child_of_node(phb->hose->dn, dn) {
gpdev = pnv_pci_get_gpu_dev(get_pci_dev(dn));
if (gpdev) {
diff --git a/arch/powerpc/platforms/powernv/pci.h 
b/arch/powerpc/platforms/powernv/pci.h
index a95273c..22025c6 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -187,6 +187,9 @@ struct pnv_phb {
 
/* Bitmask for MMIO register usage */
unsigned long mmio_atsd_usage;
+
+   /* Do we need to explicitly flush the nest mmu? */
+   bool nmmu_flush;
} npu;
 
 #ifdef CONFIG_CXL_BASE
-- 
2.1.4

[PATCH 1/2] powerpc/npu: Use flush_all_mm() instead of flush_tlb_mm()

2017-09-04 Thread Alistair Popple 
With the optimisations introduced by commit a46cc7a908 ("powerpc/mm/radix:
Improve TLB/PWC flushes"), flush_tlb_mm() no longer flushes the page walk
cache with radix. Switch to using flush_all_mm() to ensure the pwc and tlb
are properly flushed on the nmmu.

Signed-off-by: Alistair Popple 
---

Michael,

This depends on Frederic's series:

http://patchwork.ozlabs.org/patch/809343/
http://patchwork.ozlabs.org/patch/809344/

Thanks.

Alistair

arch/powerpc/platforms/powernv/npu-dma.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/platforms/powernv/npu-dma.c 
b/arch/powerpc/platforms/powernv/npu-dma.c
index 2cb6cbe..2fff9a65 100644
--- a/arch/powerpc/platforms/powernv/npu-dma.c
+++ b/arch/powerpc/platforms/powernv/npu-dma.c
@@ -549,7 +549,7 @@ static void mmio_invalidate(struct npu_context 
*npu_context, int va,
 * Unfortunately the nest mmu does not support flushing specific
 * addresses so we have to flush the whole mm.
 */
-   flush_tlb_mm(npu_context->mm);
+   flush_all_mm(npu_context->mm);
 
/*
 * Loop over all the NPUs this process is active on and launch
-- 
2.1.4

Re: [PATCH v2] cxl: Set the valid bit in PE for dedicated mode

2017-09-04 Thread Andrew Donnellan 

Acked-by: Andrew Donnellan 

On 04/09/17 18:48, Vaibhav Jain wrote:

Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain 
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---

  drivers/misc/cxl/native.c | 8 
  1 file changed, 8 insertions(+)

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context 
*ctx, u64 wed, u64 amr)
if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
  
+	ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);

+   /*
+* Ideally we should do a wmb() here to make sure the changes to the
+* PE are visible to the card before we call afu_enable.
+* On ppc64 though all mmios are preceded by a 'sync' instruction hence
+* we dont dont need one here.
+*/
+
result = cxl_ops->afu_reset(afu);
if (result)
return result;



--
Andrew Donnellan  OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com  IBM Australia Limited

Re: [RFC Part1 PATCH v3 16/17] X86/KVM: Provide support to create Guest and HV shared per-CPU variables

2017-09-04 Thread Brijesh Singh 

On 9/4/17 12:05 PM, Borislav Petkov wrote:
> On Fri, Sep 01, 2017 at 05:52:13PM -0500, Brijesh Singh wrote:
>>  So far, we have not seen the need for having such functions except
>> this cases. The approach we have right now works just fine and not
>> sure if its worth adding new functions.
> Then put the call to kvm_map_hv_shared_decrypted() into
> kvm_smp_prepare_boot_cpu() to denote that you're executing this whole
> stuff only once during guest init.
>
> Now you're doing additional jumping-through-hoops with that once static
> var just so you can force something which needs to execute only once but
> gets called in a per-CPU path.
>
> See what I mean?

Yes, I see your point. I will address this issue in next rev.


-Brijesh

Re: [RFC Part1 PATCH v3 16/17] X86/KVM: Provide support to create Guest and HV shared per-CPU variables

2017-09-04 Thread Borislav Petkov 
On Fri, Sep 01, 2017 at 05:52:13PM -0500, Brijesh Singh wrote:
>  So far, we have not seen the need for having such functions except
> this cases. The approach we have right now works just fine and not
> sure if its worth adding new functions.

Then put the call to kvm_map_hv_shared_decrypted() into
kvm_smp_prepare_boot_cpu() to denote that you're executing this whole
stuff only once during guest init.

Now you're doing additional jumping-through-hoops with that once static
var just so you can force something which needs to execute only once but
gets called in a per-CPU path.

See what I mean?

> Thoughts ?
> 
> [1] Commit :7f8b7e7 x86/mm: Add support for early encryption/decryption of 
> memory

Add

[core]
abbrev = 12

to the core section of your .gitconfig.

-- 
Regards/Gruss,
Boris.

SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 
(AG Nürnberg)
--

[PATCH V2] cxl: Add support for POWER9 DD2

2017-09-04 Thread Christophe Lombard 
The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
The patch includes some changes to DD1 fix-ups as well.

Tests performed on some of the old/new hardware.

The function is_page_fault(), for POWER9, lists the Translation Checkout
Responses where the page fault will be handled by copro_handle_mm_fault().
This list is too restrictive and not necessary.

This patches removes this restriction and all page faults, whatever the
reason, will be handled. In this case, the interruption is always
acknowledged.

Signed-off-by: Christophe Lombard 

---
Changelog[v2]
 - Rebase to latest upstream.
 - Update the function is_page_fault()
---
 drivers/misc/cxl/cxl.h   |  2 ++
 drivers/misc/cxl/fault.c | 15 ++-
 drivers/misc/cxl/pci.c   | 46 +++---
 3 files changed, 27 insertions(+), 36 deletions(-)

diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index b1afecc..0167df8 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -100,6 +100,8 @@ static const cxl_p1_reg_t CXL_XSL_FEC   = {0x0158};
 static const cxl_p1_reg_t CXL_XSL_DSNCTL= {0x0168};
 /* PSL registers - CAIA 2 */
 static const cxl_p1_reg_t CXL_PSL9_CONTROL  = {0x0020};
+static const cxl_p1_reg_t CXL_XSL9_INV  = {0x0110};
+static const cxl_p1_reg_t CXL_XSL9_DEF  = {0x0140};
 static const cxl_p1_reg_t CXL_XSL9_DSNCTL   = {0x0168};
 static const cxl_p1_reg_t CXL_PSL9_FIR1 = {0x0300};
 static const cxl_p1_reg_t CXL_PSL9_FIR2 = {0x0308};
diff --git a/drivers/misc/cxl/fault.c b/drivers/misc/cxl/fault.c
index 6eed7d0..0cf7f4a 100644
--- a/drivers/misc/cxl/fault.c
+++ b/drivers/misc/cxl/fault.c
@@ -204,22 +204,11 @@ static bool cxl_is_segment_miss(struct cxl_context *ctx, 
u64 dsisr)
 
 static bool cxl_is_page_fault(struct cxl_context *ctx, u64 dsisr)
 {
-   u64 crs; /* Translation Checkout Response Status */
-
if ((cxl_is_power8()) && (dsisr & CXL_PSL_DSISR_An_DM))
return true;
 
-   if (cxl_is_power9()) {
-   crs = (dsisr & CXL_PSL9_DSISR_An_CO_MASK);
-   if ((crs == CXL_PSL9_DSISR_An_PF_SLR) ||
-   (crs == CXL_PSL9_DSISR_An_PF_RGC) ||
-   (crs == CXL_PSL9_DSISR_An_PF_RGP) ||
-   (crs == CXL_PSL9_DSISR_An_PF_HRH) ||
-   (crs == CXL_PSL9_DSISR_An_PF_STEG) ||
-   (crs == CXL_PSL9_DSISR_An_URTCH)) {
-   return true;
-   }
-   }
+   if (cxl_is_power9())
+   return true;
 
return false;
 }
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index d18b3d9..3edc991 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -401,7 +401,8 @@ int cxl_calc_capp_routing(struct pci_dev *dev, u64 *chipid,
*capp_unit_id = get_capp_unit_id(np, *phb_index);
of_node_put(np);
if (!*capp_unit_id) {
-   pr_err("cxl: invalid capp unit id\n");
+   pr_err("cxl: invalid capp unit id (phb_index: %d)\n",
+  *phb_index);
return -ENODEV;
}
 
@@ -475,37 +476,36 @@ static int init_implementation_adapter_regs_psl9(struct 
cxl *adapter,
psl_fircntl |= 0x1ULL; /* ce_thresh */
cxl_p1_write(adapter, CXL_PSL9_FIR_CNTL, psl_fircntl);
 
-   /* vccredits=0x1  pcklat=0x4 */
-   cxl_p1_write(adapter, CXL_PSL9_DSNDCTL, 0x1810ULL);
-
-   /*
-* For debugging with trace arrays.
-* Configure RX trace 0 segmented mode.
-* Configure CT trace 0 segmented mode.
-* Configure LA0 trace 0 segmented mode.
-* Configure LA1 trace 0 segmented mode.
+   /* Setup the PSL to transmit packets on the PCIe before the
+* CAPP is enabled
 */
-   cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x804080008000ULL);
-   cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x804080008003ULL);
-   cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x804080008005ULL);
-   cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x804080008006ULL);
+   cxl_p1_write(adapter, CXL_PSL9_DSNDCTL, 0x000100102A10ULL);
 
/*
 * A response to an ASB_Notify request is returned by the
 * system as an MMIO write to the address defined in
-* the PSL_TNR_ADDR register
+* the PSL_TNR_ADDR register.
+* keep the Reset Value: 0x0002E000
 */
-   /* PSL_TNR_ADDR */
 
-   /* NORST */
-   cxl_p1_write(adapter, CXL_PSL9_DEBUG, 0x8000ULL);
+   /* Enable XSL rty limit */
+   cxl_p1_write(adapter, CXL_XSL9_DEF, 0x51F80005ULL);
+
+   /* Change XSL_INV dummy read threshold */
+   cxl_p1_write(adapter, CXL_XSL9_INV, 0x040007FFC200ULL);
 
-   /* allocate the apc machines */
-   cxl_p1_write(adapter, CXL_PSL9_APCDEDTYPE, 0x4003ULL);
+   if

[PATCH 04/13] perf test powerpc: Fix 'Object code reading' test

2017-09-04 Thread Arnaldo Carvalho de Melo 
From: Ravi Bangoria 

'Object code reading' test always fails on powerpc guest. Two reasons
for the failure are:

1. When elf section is too big (size beyond 'unsigned int' max value).
objdump fails to disassemble from such section. This was fixed with
commit 0f6329bd7fc ("binutils/objdump: Fix disassemble for huge elf
sections") in binutils.

2. When the sample is from hypervisor. Hypervisor symbols can not be
resolved within guest and thus thread__find_addr_map() fails for such
symbols. Fix this by ignoring hypervisor symbols in the test.

Signed-off-by: Ravi Bangoria 
Acked-by: Adrian Hunter 
Cc: Alexander Shishkin 
Cc: Jiri Olsa 
Cc: Michael Ellerman 
Cc: Namhyung Kim 
Cc: Peter Zijlstra 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/1504170896-7876-1-git-send-email-ravi.bango...@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/tests/code-reading.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/tools/perf/tests/code-reading.c b/tools/perf/tests/code-reading.c
index 761c5a448c56..466a462b26d1 100644
--- a/tools/perf/tests/code-reading.c
+++ b/tools/perf/tests/code-reading.c
@@ -237,6 +237,11 @@ static int read_object_code(u64 addr, size_t len, u8 
cpumode,
 
thread__find_addr_map(thread, cpumode, MAP__FUNCTION, addr, );
if (!al.map || !al.map->dso) {
+   if (cpumode == PERF_RECORD_MISC_HYPERVISOR) {
+   pr_debug("Hypervisor address can not be resolved - 
skipping\n");
+   return 0;
+   }
+
pr_debug("thread__find_addr_map failed\n");
return -1;
}
-- 
2.13.5

[GIT PULL 00/13] perf/core improvements and fixes

2017-09-04 Thread Arnaldo Carvalho de Melo 
Hi Ingo,

Please consider pulling,

- Arnaldo

Test results at the end of this message, as usual.

The following changes since commit 1b2f76d77a277bb70d38ad0991ed7f16bbc115a9:

  Merge tag 'perf-core-for-mingo-4.14-20170829' of 
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core 
(2017-08-29 23:13:56 +0200)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git 
tags/perf-core-for-mingo-4.14-20170901

for you to fetch changes up to eba9fac017617e685d648339e29a1453a30cb065:

  perf annotate browser: Help for cycling thru hottest instructions with 
TAB/shift+TAB (2017-09-01 14:55:40 -0300)


perf/core improvements and fixes:

- Support syscall name glob matching in 'perf trace' (Arnaldo Carvalho de Melo)

  e.g.:

   # perf trace -e pkey_*
   32.784 (0.006 ms): pkey/16018 pkey_alloc(init_val: DISABLE_WRITE) = -1 
EINVAL Invalid argument
   32.795 (0.004 ms): pkey/16018 pkey_mprotect(start: 0x7f380d0a6000, len: 
4096, prot: READ|WRITE, pkey: -1) = 0
   32.801 (0.002 ms): pkey/16018 pkey_free(pkey: -1) = -1 
EINVAL Invalid argument
   ^C#

- Do not auto merge counts for explicitely specified events in
  'perf stat' (Arnaldo Carvalho de Melo)

- Fix syntax in documentation of .perfconfig intel-pt option (Jack Henschel)

- Calculate the average cycles of iterations for loops detected by the
  branch history support in 'perf report' (Jin Yao)

- Support PERF_SAMPLE_PHYS_ADDR as a sort key "phys_daddr" in the 'script', 
'mem',
  'top' and 'report'. Also add a test entry for it in 'perf test' (Kan Liang)

- Fix 'Object code reading' 'perf test' entry in PowerPC (Ravi Bangoria)

- Remove some duplicate Power9 duplicate vendor events (described in JSON
  files) (Sukadev Bhattiprolu)

- Add help entry in the TUI annotate browser about cycling thru hottest
  instructions with TAB/shift+TAB (Arnaldo Carvalho de Melo)

Signed-off-by: Arnaldo Carvalho de Melo 


Arnaldo Carvalho de Melo (4):
  perf syscalltbl: Support glob matching on syscall names
  perf trace: Support syscall name globbing
  perf stat: Only auto-merge events that are PMU aliases
  perf annotate browser: Help for cycling thru hottest instructions with 
TAB/shift+TAB

Jack Henschel (1):
  perf intel-pt: Fix syntax in documentation of config option

Jin Yao (1):
  perf report: Calculate the average cycles of iterations

Kan Liang (5):
  perf tools: Support new sample type for physical address
  perf sort: Add sort option for physical address
  perf mem: Support physical address
  perf script: Support physical address
  perf test: Add test case for PERF_SAMPLE_PHYS_ADDR

Ravi Bangoria (1):
  perf test powerpc: Fix 'Object code reading' test

Sukadev Bhattiprolu (1):
  perf vendor events powerpc: Remove duplicate events

 tools/include/uapi/linux/perf_event.h  |   4 +-
 tools/perf/Documentation/intel-pt.txt  |   2 +-
 tools/perf/Documentation/perf-mem.txt  |   4 +
 tools/perf/Documentation/perf-record.txt   |   5 +-
 tools/perf/Documentation/perf-report.txt   |   1 +
 tools/perf/Documentation/perf-script.txt   |   2 +-
 tools/perf/Documentation/perf-trace.txt|   2 +-
 tools/perf/builtin-mem.c   |  97 -
 tools/perf/builtin-record.c|   2 +
 tools/perf/builtin-script.c|  15 ++-
 tools/perf/builtin-stat.c  |   2 +-
 tools/perf/builtin-trace.c |  39 ++-
 tools/perf/perf.h  |   1 +
 .../pmu-events/arch/powerpc/power9/frontend.json   |   7 +-
 .../perf/pmu-events/arch/powerpc/power9/other.json | 120 -
 .../pmu-events/arch/powerpc/power9/pipeline.json   |   7 +-
 tools/perf/pmu-events/arch/powerpc/power9/pmc.json |   7 +-
 tools/perf/tests/code-reading.c|   5 +
 tools/perf/tests/sample-parsing.c  |   6 +-
 tools/perf/ui/browsers/annotate.c  |   3 +-
 tools/perf/ui/browsers/hists.c |   8 +-
 tools/perf/ui/stdio/hist.c |  10 +-
 tools/perf/util/callchain.c|  49 -
 tools/perf/util/callchain.h|   9 +-
 tools/perf/util/event.h|   1 +
 tools/perf/util/evsel.c|  19 +++-
 tools/perf/util/evsel.h|   1 +
 tools/perf/util/hist.c |   4 +
 tools/perf/util/hist.h |   1 +
 tools/perf/util/machine.c  |  96 ++---
 tools/perf/util/parse-events.c |  24 +++--
 tools/perf/util/session.c

Re: [PATCH] video: fbdev: annotate fb_fix_screeninfo with const and __initconst

2017-09-04 Thread Bartlomiej Zolnierkiewicz 
On Sunday, August 20, 2017 11:14:51 PM Bhumika Goyal wrote:
> Make these const as they are only used during a copy operation.
> Some structures are used as a copy operation inside __init functions, so
> make them const and replace __initdata with __initconst to avoid section
> conflict error.
> 
> Signed-off-by: Bhumika Goyal 

Patch queued for 4.14, thanks.

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R Institute Poland
Samsung Electronics

Applied "ASoC: fsl_spdif: make const arrays rate static" to the asoc tree

2017-09-04 Thread Mark Brown 
The patch

   ASoC: fsl_spdif: make const arrays rate static

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 2db5f9e9fa0ebc3c023f7ac906946a3eef8f5498 Mon Sep 17 00:00:00 2001
From: Colin Ian King 
Date: Sun, 3 Sep 2017 14:54:08 +0100
Subject: [PATCH] ASoC: fsl_spdif: make const arrays rate static

Don't populate the const arrays rate on the stack, instead make them
static. Makes the object code smaller by 220 bytes:

Before:
   textdata bss dec hex filename
  243859776 128   3428985f1 sound/soc/fsl/fsl_spdif.o

After:
   textdata bss dec hex filename
  240059936 128   340698515 sound/soc/fsl/fsl_spdif.o

Signed-off-by: Colin Ian King 
Signed-off-by: Mark Brown 
---
 sound/soc/fsl/fsl_spdif.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 7e6cc4da0088..4f7469c1864c 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -1110,7 +1110,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv 
*spdif_priv,
struct clk *clk, u64 savesub,
enum spdif_txrate index, bool round)
 {
-   const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
+   static const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);
u64 rate_ideal, rate_actual, sub;
u32 sysclk_dfmin, sysclk_dfmax;
@@ -1169,7 +1169,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv 
*spdif_priv,
 static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
enum spdif_txrate index)
 {
-   const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
+   static const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
struct platform_device *pdev = spdif_priv->pdev;
struct device *dev = >dev;
u64 savesub = 10, ret;
-- 
2.13.2

Re: [PATCH v2] cxl: Set the valid bit in PE for dedicated mode

2017-09-04 Thread Frederic Barrat 



Le 04/09/2017 à 10:48, Vaibhav Jain a écrit :

Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain 
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---


Acked-by: Frederic Barrat 




  drivers/misc/cxl/native.c | 8 
  1 file changed, 8 insertions(+)

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context 
*ctx, u64 wed, u64 amr)
if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);

+   ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+   /*
+* Ideally we should do a wmb() here to make sure the changes to the
+* PE are visible to the card before we call afu_enable.
+* On ppc64 though all mmios are preceded by a 'sync' instruction hence
+* we dont dont need one here.
+*/
+
result = cxl_ops->afu_reset(afu);
if (result)
return result;

Re: linux-next: build warning after merge of the powerpc tree

2017-09-04 Thread Cédric Le Goater 
On 09/04/2017 10:53 AM, Stephen Rothwell wrote:
> Hi all,
> 
> After merging the powerpc tree, today's linux-next build (powerpc
> allyesconfig) produced this warning:
> 
> WARNING: vmlinux.o(.text+0xa7cb8): Section mismatch in reference from the 
> function .xive_spapr_init() to the function .init.text:.xive_core_init()
> The function .xive_spapr_init() references
> the function __init .xive_core_init().
> This is often because .xive_spapr_init lacks a __init 
> annotation or the annotation of .xive_core_init is wrong.
> 
> Introduced by commit
> 
>   eac1e731b59e ("powerpc/xive: guest exploitation of the XIVE interrupt 
> controller")
> 

yes. I just sent a patch for this :

http://patchwork.ozlabs.org/patch/809542/

Cheers,

C.

linux-next: build warning after merge of the powerpc tree

2017-09-04 Thread Stephen Rothwell 
Hi all,

After merging the powerpc tree, today's linux-next build (powerpc
allyesconfig) produced this warning:

WARNING: vmlinux.o(.text+0xa7cb8): Section mismatch in reference from the 
function .xive_spapr_init() to the function .init.text:.xive_core_init()
The function .xive_spapr_init() references
the function __init .xive_core_init().
This is often because .xive_spapr_init lacks a __init 
annotation or the annotation of .xive_core_init is wrong.

Introduced by commit

  eac1e731b59e ("powerpc/xive: guest exploitation of the XIVE interrupt 
controller")

-- 
Cheers,
Stephen Rothwell

[PATCH v2] cxl: Set the valid bit in PE for dedicated mode

2017-09-04 Thread Vaibhav Jain 
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.

Signed-off-by: Vaibhav Jain 
---
Changelog:

v2 -> Removed a call to smp_wmb() after setting the bit [Michael Ellerman]
---

 drivers/misc/cxl/native.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..75df74d59527 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context 
*ctx, u64 wed, u64 amr)
if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
 
+   ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
+   /*
+* Ideally we should do a wmb() here to make sure the changes to the
+* PE are visible to the card before we call afu_enable.
+* On ppc64 though all mmios are preceded by a 'sync' instruction hence
+* we dont dont need one here.
+*/
+
result = cxl_ops->afu_reset(afu);
if (result)
return result;
-- 
2.13.5

[PATCH] powerpc/xive: Fix section __init warning

2017-09-04 Thread Cédric Le Goater 
xive_spapr_init() is called from a __init routine and calls __init
routines.

Signed-off-by: Cédric Le Goater 
---
 arch/powerpc/sysdev/xive/spapr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/sysdev/xive/spapr.c b/arch/powerpc/sysdev/xive/spapr.c
index 43e9eeb0d39f..f24a70bc6855 100644
--- a/arch/powerpc/sysdev/xive/spapr.c
+++ b/arch/powerpc/sysdev/xive/spapr.c
@@ -593,7 +593,7 @@ static bool xive_get_max_prio(u8 *max_prio)
return true;
 }
 
-bool xive_spapr_init(void)
+bool __init xive_spapr_init(void)
 {
struct device_node *np;
struct resource r;
-- 
2.13.5

[RFC/PATCH] powerpc/eeh: Create PHB PEs after EEH is initialized

2017-09-04 Thread Benjamin Herrenschmidt 
Otherwise we end up not yet having computed the right
diag data size on powernv where EEH initialization
is delayed, thus causing memory corruption later on
when calling OPAL.

Signed-off-by: Benjamin Herrenschmidt 
---

Russell, what do you think ? The end result is that the PEs
for the PHBs are created much later. I suppose that might cause
changes of behaviour if, for example, we hit EEH while probing
before we call eeh_init() again. Hopefully we have all the
appropriate NULL checks to deal with it though...

Another option would be to break up eeh_init() between calling
the backend init, which we would unconditionally do early (ie
removing the special powernv test) and a new eeh_create_pe()'s
which would explicitely be called by the backend at the "right"
time...

Without either fix, we are currently corrupting kernel memory
when hitting EEH on a PHB PE (fences for example).

If this ends up being the right approach, then we need a CC
stable as well.

 arch/powerpc/kernel/eeh.c |  4 
 arch/powerpc/kernel/eeh_dev.c | 18 --
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 63992b2d8e15..f27eecd5ec7f 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1018,6 +1018,10 @@ int eeh_init(void)
} else if ((ret = eeh_ops->init()))
return ret;
 
+   /* Initialize PHB PEs */
+   list_for_each_entry_safe(hose, tmp, _list, list_node)
+   eeh_dev_phb_init_dynamic(hose);
+
/* Initialize EEH event */
ret = eeh_event_init();
if (ret)
diff --git a/arch/powerpc/kernel/eeh_dev.c b/arch/powerpc/kernel/eeh_dev.c
index d6b2ca70d14d..0820b73288c0 100644
--- a/arch/powerpc/kernel/eeh_dev.c
+++ b/arch/powerpc/kernel/eeh_dev.c
@@ -83,21 +83,3 @@ void eeh_dev_phb_init_dynamic(struct pci_controller *phb)
/* EEH PE for PHB */
eeh_phb_pe_create(phb);
 }
-
-/**
- * eeh_dev_phb_init - Create EEH devices for devices included in existing PHBs
- *
- * Scan all the existing PHBs and create EEH devices for their OF
- * nodes and their children OF nodes
- */
-static int __init eeh_dev_phb_init(void)
-{
-   struct pci_controller *phb, *tmp;
-
-   list_for_each_entry_safe(phb, tmp, _list, list_node)
-   eeh_dev_phb_init_dynamic(phb);
-
-   return 0;
-}
-
-core_initcall(eeh_dev_phb_init);