Re: [PATCH v4] watchdog: add SPDX identifiers for watchdog subsystem

[Marcus Folkesson]

Florian,

On Wed, Feb 28, 2018 at 03:45:43PM -0800, Florian Fainelli wrote:
> On 02/28/2018 07:01 AM, Marcus Folkesson wrote:
> > - Add SPDX identifier
> > - Remove boiler plate license text
> > - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
> >   license
> > 
> > Signed-off-by: Marcus Folkesson 
> > Acked-by: Adam Thomson 
> > Acked-by: Baruch Siach 
> > Acked-by: Charles Keepax 
> > Acked-by: Keiji Hayashibara 
> > Acked-by: Johannes Thumshirn 
> > Acked-by: Mans Rullgard 
> > Acked-by: Matthias Brugger 
> > Acked-by: Michal Simek 
> > Acked-by: Neil Armstrong 
> > Acked-by: Nicolas Ferre 
> > Acked-by: Thierry Reding 
> > Acked-by: Tomas Winkler 
> > Acked-by: Patrice Chotard 
> > Acked-by: William Breathitt Gray 
> > Reviewed-by: Eric Anholt 
> > ---
> > 
> > Notes:
> > v4:
> > - Drop coh901327_wdt since it allready is a pending patch
> > v3:
> > - Keep license text for ebc-c384_wdt
> > v2:
> > - Put back removed copyright texts for meson_gxbb_wdt and 
> > coh901327_wdt
> > - Change to BSD-3-Clause for meson_gxbb_wdt
> > v1: Please have an extra look at meson_gxbb_wdt.c
> > 
> 
> >  drivers/watchdog/ar7_wdt.c | 14 +-
> 
> >  drivers/watchdog/bcm2835_wdt.c |  5 +---
> >  drivers/watchdog/bcm47xx_wdt.c |  5 +---
> >  drivers/watchdog/bcm63xx_wdt.c |  5 +---
> >  drivers/watchdog/bcm7038_wdt.c | 12 ++--
> >  drivers/watchdog/bcm_kona_wdt.c|  9 +-
> 
> >  drivers/watchdog/mtx-1_wdt.c   | 11 +---
> 
> For these drivers above:
> 
> Acked-by: Florian Fainelli 
> 
> and it looks like you missed rdc321x_wdt.c, is there a specific reason?

Good catch!
I will fix that, thank you.

> -- 
> Florian


Best regards
Marcus Folkesson

Re: [RFC REBASED 5/5] powerpc/mm/slice: use the dynamic high slice size to limit bitmap operations

[Christophe LEROY]

Le 28/02/2018 à 07:53, Nicholas Piggin a écrit :

On Tue, 27 Feb 2018 18:11:07 +0530
"Aneesh Kumar K.V"  wrote:


Nicholas Piggin  writes:


On Tue, 27 Feb 2018 14:31:07 +0530
"Aneesh Kumar K.V"  wrote:
  

Christophe Leroy  writes:
   

The number of high slices a process might use now depends on its
address space size, and what allocation address it has requested.

This patch uses that limit throughout call chains where possible,
rather than use the fixed SLICE_NUM_HIGH for bitmap operations.
This saves some cost for processes that don't use very large address
spaces.


I haven't really looked at the final code. One of the issue we had was
with the below scenario.

mmap(addr, len) where addr < 128TB and addr+len > 128TB  We want to make
sure we build the mask such that we don't find the addr available.


We should run it through the mmap regression tests. I *think* we moved
all of that logic from the slice code to get_ummapped_area before going
in to slices. I may have missed something though, it would be good to
have more eyes on it.
  


mmap(-1,...) failed with the test. Something like below fix it

@@ -756,7 +770,7 @@ void slice_set_user_psize(struct mm_struct *mm, unsigned 
int psize)
 mm->context.low_slices_psize = lpsizes;
  
 hpsizes = mm->context.high_slices_psize;

-   high_slices = GET_HIGH_SLICE_INDEX(mm->context.slb_addr_limit);
+   high_slices = SLICE_NUM_HIGH;
 for (i = 0; i < high_slices; i++) {
 mask_index = i & 0x1;
 index = i >> 1;

I guess for everything in the mm_context_t, we should compute it till
SLICE_NUM_HIGH. The reason for failure was, even though we recompute the
slice mask cached in mm_context on slb_addr_limit, it was still derived
from the high_slices_psizes which was computed with lower value.


Okay thanks for catching that Aneesh. I guess that's a slow path so it
should be okay. Christophe if you're taking care of the series can you
fold it in? Otherwise I'll do that after yours gets merged.



I'm not really taking care of your serie, just took it once to see how 
it fits on the 8xx.
I prefer if you can handle them. If you need my help for any test on 
PPC32 don't hesitate to ask.


Christophe

Re: [PATCH 01/21] powerpc: Remove warning on array size when empty

[Mathieu Malaterre]

On Thu, Mar 1, 2018 at 3:55 AM, Michael Ellerman  wrote:
> Mathieu Malaterre  writes:
>
>> When neither CONFIG_ALTIVEC, nor CONFIG_VSX or CONFIG_PPC64 is defined, the
>> array feature_properties is defined as an empty array, which in turn
>> triggers the following warning (treated as error on W=1):
>>
>>   CC  arch/powerpc/kernel/prom.o
>> arch/powerpc/kernel/prom.c: In function ‘check_cpu_feature_properties’:
>> arch/powerpc/kernel/prom.c:298:16: error: comparison of unsigned expression 
>> < 0 is always false [-Werror=type-limits]
>>   for (i = 0; i < ARRAY_SIZE(feature_properties); ++i, ++fp) {
>> ^
>> cc1: all warnings being treated as errors
>
> Ugh, that's annoying.
>
> This seems to work?
>
> diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> index 4dffef947b8a..5215119e249c 100644
> --- a/arch/powerpc/kernel/prom.c
> +++ b/arch/powerpc/kernel/prom.c
> @@ -291,11 +291,11 @@ static inline void identical_pvr_fixup(unsigned long 
> node)
>
>  static void __init check_cpu_feature_properties(unsigned long node)
>  {
> -   unsigned long i;
> struct feature_property *fp = feature_properties;
> const __be32 *prop;
> +   int i;
>
> -   for (i = 0; i < ARRAY_SIZE(feature_properties); ++i, ++fp) {
> +   for (i = 0; i < (int)ARRAY_SIZE(feature_properties); ++i, ++fp) {
> prop = of_get_flat_dt_prop(node, fp->name, NULL);
> if (prop && be32_to_cpup(prop) >= fp->min_value) {
> cur_cpu_spec->cpu_features |= fp->cpu_feature;
>

Indeed that looks like the less invasive solution, I'll re-submit.

Should I resubmit the entire patch series (21 indep patches) or
re-submit only the 3 patches that were discussed (as part of a
different series) ?

Thanks

Re: [PATCH] xmon: Setup xmon debugger hooks when first break-point is set

[Michael Ellerman]

Vaibhav Jain  writes:

> Presently sysrq key for xmon('x') is registered during kernel init
> irrespective of the value of kernel param 'xmon'. Thus xmon is enabled
> even if 'xmon=off' is passed on the kernel command line. However this
> doesn't enable the kernel debugger hooks needed for instruction or data
> breakpoints. Thus when a break-point is hit with xmon=off a kernel oops
> of the form below is reported:
>
> Oops: Exception in kernel mode, sig: 5 [#1]
> < snip >
> Trace/breakpoint trap
>
> To fix this the patch checks and enables debugger hooks when an
> instruction or data break-point is set via xmon console.

> It also clears
 
> all breakpoints when xmon is disabled via debugfs.

Can you split that into a separate patch please.

> diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
> index 82e1a3ee6e0f..3679f5417a7e 100644
> --- a/arch/powerpc/xmon/xmon.c
> +++ b/arch/powerpc/xmon/xmon.c
> @@ -1295,6 +1295,7 @@ bpt_cmds(void)
>   switch (cmd) {
>  #ifndef CONFIG_PPC_8xx
>   static const char badaddr[] = "Only kernel addresses are permitted for 
> breakpoints\n";
> + static const char warnxmon[] = "xmon: Enabling debugger hooks\n";
>   int mode;
>   case 'd':   /* bd - hardware data breakpoint */
>   mode = 7;
> @@ -1315,6 +1316,11 @@ bpt_cmds(void)
>   dabr.address &= ~HW_BRK_TYPE_DABR;
>   dabr.enabled = mode | BP_DABR;
>   }
> + /* Enable xmon hooks if needed */
> + if (!xmon_on) {
> + printf(warnxmon);
> + xmon_on = 1;
> + }
>   break;
>  
>   case 'i':   /* bi - hardware instr breakpoint */
> @@ -1335,6 +1341,12 @@ bpt_cmds(void)
>   if (bp != NULL) {
>   bp->enabled |= BP_CIABR;
>   iabr = bp;
> +
> + /* Enable xmon hooks if needed */
> + if (!xmon_on) {
> + printf(warnxmon);
> + xmon_on = 1;
> + }
>   }
>   break;
>  #endif
> @@ -1399,8 +1411,15 @@ bpt_cmds(void)
>   if (!check_bp_loc(a))
>   break;
>   bp = new_breakpoint(a);
> - if (bp != NULL)
> + if (bp != NULL) {
>   bp->enabled |= BP_TRAP;
> +
> + /* Enable xmon hooks if needed */
> + if (!xmon_on) {
> + printf(warnxmon);
> + xmon_on = 1;
> + }
> + }

Yeah Balbir is right, repeating that three times is ugly. A static
function would do, and also avoids you feeling like you need to make
warnxmon a static char[].

cheers

Re: [PATCH 01/21] powerpc: Remove warning on array size when empty

[Michael Ellerman]

Mathieu Malaterre  writes:

> When neither CONFIG_ALTIVEC, nor CONFIG_VSX or CONFIG_PPC64 is defined, the
> array feature_properties is defined as an empty array, which in turn
> triggers the following warning (treated as error on W=1):
>
>   CC  arch/powerpc/kernel/prom.o
> arch/powerpc/kernel/prom.c: In function ‘check_cpu_feature_properties’:
> arch/powerpc/kernel/prom.c:298:16: error: comparison of unsigned expression < 
> 0 is always false [-Werror=type-limits]
>   for (i = 0; i < ARRAY_SIZE(feature_properties); ++i, ++fp) {
> ^
> cc1: all warnings being treated as errors

Ugh, that's annoying.

This seems to work?

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 4dffef947b8a..5215119e249c 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -291,11 +291,11 @@ static inline void identical_pvr_fixup(unsigned long node)
 
 static void __init check_cpu_feature_properties(unsigned long node)
 {
-   unsigned long i;
struct feature_property *fp = feature_properties;
const __be32 *prop;
+   int i;
 
-   for (i = 0; i < ARRAY_SIZE(feature_properties); ++i, ++fp) {
+   for (i = 0; i < (int)ARRAY_SIZE(feature_properties); ++i, ++fp) {
prop = of_get_flat_dt_prop(node, fp->name, NULL);
if (prop && be32_to_cpup(prop) >= fp->min_value) {
cur_cpu_spec->cpu_features |= fp->cpu_feature;


cheers

Re: [PATCH v2] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate

[Alistair Popple]

> > diff --git a/arch/powerpc/platforms/powernv/npu-dma.c 
> > b/arch/powerpc/platforms/powernv/npu-dma.c
> > index 0a253b64ac5f..2fed4b116e19 100644
> > --- a/arch/powerpc/platforms/powernv/npu-dma.c
> > +++ b/arch/powerpc/platforms/powernv/npu-dma.c
> > @@ -726,7 +749,7 @@ struct npu_context *pnv_npu2_init_context(struct 
> > pci_dev *gpdev,
> > if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
> > _index)))
> > return ERR_PTR(-ENODEV);
> > -   npu_context->npdev[npu->index][nvlink_index] = npdev;
> > +   WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], npdev);
>   
> When you're publishing a struct via a pointer you would typically have a
> barrier between the stores that set the fields of the struct, and the
> store that publishes the struct. Otherwise the reader can see a
> partially setup struct.

npdev is just a pointer to a pci_dev setup by the PCI code. We assign it to
npdev[][] to indicate to the mmu notifiers that an invalidation should also
be sent to this nvlink. However I don't think there is any ordering
required wrt to the rest of the npu_context setup - so long as when the
notifiers deference npu_context->npdev[i][j] it either sees a valid
non-NULL pointer or NULL assigned to npdev[][] everything should be ok.

> I think here the npdev was setup somewhere else, and maybe there has
> been an intervening barrier, but it's not clear. A comment at least
> would be good.

Yes it has been. I will submit a v3 with some more comments incorporating
the above. Unless you think my argument is wrong?

> In general I feel like a spinlock or two could significantly simply the
> locking/ordering in this code, and given we're doing MMIOs anyway would
> not affect performance.

Indeed, I am working on a patch to add a spinlock around the allocation of
the npu_context as pnv_npu2_destroy_context() needs to be serialised with
respect to pnv_npu2_init_context() on the same mm_struct. I'd incorrectly
assumed the driver would do this serialisation but apparently it can't so
we need to ensure kref_get(npu_context) can't race with it's destruction
(concurrent init_context() is protected by mmap_sem). I could fold that
(unposted) patch into this one if you think that would be better?

Thanks!

- Alistair

> 
> 
> cheers
> 

Re: [PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

[Michael Ellerman]

Stewart Smith  writes:

> Akshay Adiga  writes:
>> commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
>> states via stop API.") uses stop-api provided by the firmware to restore
>> PSSCR. PSSCR restore is required for handling special wakeup. When special
>> wakeup is completed, the core enters stop state based on restored PSSCR.
>>
>> Currently PSSCR is restored to deepest available stop state, causing
>> a idle cpu to enter deeper stop state on a special wakeup, which causes
>> the cpu to hang on wakeup.
>>
>> A "sensors" command which reads temperature (through DTS sensors) on idle
>> cpu can trigger special wakeup.
>>
>> Failed Scenario :
>> Request restore of PSSCR with RL = 11
>> cpu enters idle state (stop5)
>>   user triggers "sensors" command
>>Assert special wakeup on cpu
>>  Restores PSSCR with RL = 11  < Done by firmware
>>   Read DTS sensor
>>Deassert special wakeup
>>   cpu enters idle state (stop11) <-- Instead of stop5
>>
>> Cpu hang is caused because cpu ended up in a deeper state than it requested
>>
>> This patch fixes instability caused by special wakeup when stop11 is
>> enabled. Requests restore of PSSCR to deepest stop state used by cpuidle.
>> Only when offlining cpu, request restore of PSSCR to deepest stop state.
>> On onlining cpu, request restore of PSSCR to deepest stop state used by
>> cpuidle.
>>
>> Fixes : 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
>> states via stop API.")
>
> This should CC stable ?
>
> We'll need this to enable stop11 in firmware and not break things, right?

But is Cc'ing this to stable even sufficient to enable stop11?

If firmware starts enabling stop11 then every existing kernel will be
broken, so eg. bisecting anything prior to now will be impossible.

cheers

Re: [PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

[Michael Ellerman]

Akshay Adiga  writes:

> On Mon, Feb 26, 2018 at 03:47:12PM +1100, Stewart Smith wrote:
>> Akshay Adiga  writes:
>> > commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
>> > states via stop API.") uses stop-api provided by the firmware to restore
>> > PSSCR. PSSCR restore is required for handling special wakeup. When special
>> > wakeup is completed, the core enters stop state based on restored PSSCR.
>> >
>> > Currently PSSCR is restored to deepest available stop state, causing
>> > a idle cpu to enter deeper stop state on a special wakeup, which causes
>> > the cpu to hang on wakeup.
>> >
>> > A "sensors" command which reads temperature (through DTS sensors) on idle
>> > cpu can trigger special wakeup.
>> >
>> > Failed Scenario :
>> > Request restore of PSSCR with RL = 11
>> > cpu enters idle state (stop5)
>> >   user triggers "sensors" command
>> >Assert special wakeup on cpu
>> >  Restores PSSCR with RL = 11  < Done by firmware
>> >   Read DTS sensor
>> >Deassert special wakeup
>> >   cpu enters idle state (stop11) <-- Instead of stop5
>> >
>> > Cpu hang is caused because cpu ended up in a deeper state than it requested
>> >
>> > This patch fixes instability caused by special wakeup when stop11 is
>> > enabled. Requests restore of PSSCR to deepest stop state used by cpuidle.
>> > Only when offlining cpu, request restore of PSSCR to deepest stop state.
>> > On onlining cpu, request restore of PSSCR to deepest stop state used by
>> > cpuidle.
>> >
>> > Fixes : 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
>> > states via stop API.")
>> 
>> This should CC stable ?
>> 
>> We'll need this to enable stop11 in firmware and not break things, right?
>
> Yes I will resend and CC it to stable.

That's not how patches get to stable.

You tag it with "Cc: stable@vger ...", you don't actually email it to
sta...@vger.kernel.org.

cheers

Re: [PATCH] powerpc: dts: replace 'linux, stdout-path' with 'stdout-path'

[Michael Ellerman]

Rob Herring  writes:

> 'linux,stdout-path' has been deprecated for some time in favor of
> 'stdout-path'. Now dtc will warn on occurrences of 'linux,stdout-path'.
> Search and replace all the of occurrences with 'stdout-path'.

This patch looks OK.

But please remember that not all device trees are generated with dtc, we
still have machines in the wild that have firmware which use
"linux,stdout-path" and may never be updated.

cheers

[PATCH] powerpc: Keep const vars out of writable .sdata

[Kees Cook]

From: Segher Boessenkool 

Newer gcc will support "-mno-readonly-in-sdata"[1], which makes sure that
the optimization on PPC32 for variables getting moved into the .sdata
section will not apply to const variables (which must be in .rodata).

This was originally noticed in mm/rodata_test.c when rodata_test_data
was not static:

c0695034 g O .data  0004 rodata_test_data

After this patch with an updated compiler, this is correctly in .rodata.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82411

Reported-by: Christophe Leroy 
Signed-off-by: Segher Boessenkool 
Signed-off-by: Kees Cook 
---
 arch/powerpc/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index ccd2556bdb53..c7628e973084 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -141,7 +141,9 @@ AFLAGS-$(CONFIG_PPC64)  += $(call cc-option,-mabi=elfv1)
 endif
 CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call 
cc-option,-mminimal-toc))
 CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)
+
 CFLAGS-$(CONFIG_PPC32) := -ffixed-r2 $(MULTIPLEWORD)
+CFLAGS-$(CONFIG_PPC32) += $(call cc-option,-mno-readonly-in-sdata)
 
 ifeq ($(CONFIG_PPC_BOOK3S_64),y)
 CFLAGS-$(CONFIG_GENERIC_CPU) += $(call cc-option,-mtune=power7,-mtune=power4)
-- 
2.7.4


-- 
Kees Cook
Pixel Security

Re: [RFC PATCH 1/6] powerpc: Add security feature flags for Spectre/Meltdown

[Daniel Axtens]

Michael Ellerman  writes:

> This commit adds security feature flags to reflect the settings we
> receive from firmware regarding Spectre/Meltdown mitigations.
>
> The feature names reflect the names we are given by firmware on bare
> metal machines. See the hostboot source for details.
>
> Arguably these could be firmware features, but that then requires them
> to be read early in boot so they're available prior to asm feature
> patching, but we don't actually want to use them for patching. We may
> also want to dynamically update them in future, which would be
> incompatible with the way firmware features work (at the moment at
> least). So for now just make them separate flags.
>
> Signed-off-by: Michael Ellerman 
> ---
>  arch/powerpc/include/asm/security_features.h | 65 
> 
>  arch/powerpc/kernel/Makefile |  2 +-
>  arch/powerpc/kernel/security.c   | 14 ++
>  3 files changed, 80 insertions(+), 1 deletion(-)
>  create mode 100644 arch/powerpc/include/asm/security_features.h
>  create mode 100644 arch/powerpc/kernel/security.c
>
> diff --git a/arch/powerpc/include/asm/security_features.h 
> b/arch/powerpc/include/asm/security_features.h
> new file mode 100644
> index ..3b690de8b0e8
> --- /dev/null
> +++ b/arch/powerpc/include/asm/security_features.h
> @@ -0,0 +1,65 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Security related feature bit definitions.
> + *
> + * Copyright 2018, Michael Ellerman, IBM Corporation.
> + */
> +
> +#ifndef _ASM_POWERPC_SECURITY_FEATURES_H
> +#define _ASM_POWERPC_SECURITY_FEATURES_H
> +
> +
> +extern unsigned long powerpc_security_features;
> +
> +static inline void security_ftr_set(unsigned long feature)
> +{
> + powerpc_security_features |= feature;
> +}
> +
> +static inline void security_ftr_clear(unsigned long feature)
> +{
> + powerpc_security_features &= ~feature;
> +}
> +
> +static inline bool security_ftr_enabled(unsigned long feature)
> +{
> + return !!(powerpc_security_features & feature);
> +}
> +
> +
> +// Features indicating support for Spectre/Meltdown mitigations
> +
> +// The L1-D cache can be flushed with ori r30,r30,0
> +#define SEC_FTR_L1D_FLUSH_ORI30  0x0001ull
> +
> +// The L1-D cache can be flushed with mtspr 882,r0 (aka SPRN_TRIG2ull
This looks like some sort of search-replace gone wrong? 

> +#define SEC_FTR_L1D_FLUSH_TRIG2  0x0002ull

> +
> +// ori r31,r31,0 acts as a speculation barrier
> +#define SEC_FTR_SPEC_BAR_ORI31   0x0004ull
> +
> +// Speculation past bctr is disabled
> +#define SEC_FTR_BCCTRL_SERIALISED0x0008ull
> +
> +// Entries in L1-D are private to a SMT thread
> +#define SEC_FTR_L1D_THREAD_PRIV  0x0010ull
> +
> +// Indirect branch prediction cache disabled
> +#define SEC_FTR_COUNT_CACHE_DISABLED 0x0020ull
> +
> +
> +// Features indicating need for Spectre/Meltdown mitigations
> +
> +// The L1-D cache should be flushed on MSR[HV] 1->0 transition (hypervisor 
> to guest)
> +#define SEC_FTR_L1D_FLUSH_HV 0x0040ull
> +
> +// The L1-D cache should be flushed on MSR[PR] 0->1 transition (kernel to 
> userspace)
> +#define SEC_FTR_L1D_FLUSH_PR 0x0080ull
> +
> +// A speculation barrier should be used for bounds checks (Spectre variant 
> 1ull
Likewise here? 
---

Regards,
Daniel

> +#define SEC_FTR_BNDS_CHK_SPEC_BAR0x0100ull
> +
> +// Firmware configuration indicates user favours security over performance
> +#define SEC_FTR_FAVOUR_SECURITY  0x0200ull
> +
> +#endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
> diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
> index 1b6bc7fba996..d458c45e5004 100644
> --- a/arch/powerpc/kernel/Makefile
> +++ b/arch/powerpc/kernel/Makefile
> @@ -42,7 +42,7 @@ obj-$(CONFIG_VDSO32)+= vdso32/
>  obj-$(CONFIG_PPC_WATCHDOG)   += watchdog.o
>  obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
>  obj-$(CONFIG_PPC_BOOK3S_64)  += cpu_setup_ppc970.o cpu_setup_pa6t.o
> -obj-$(CONFIG_PPC_BOOK3S_64)  += cpu_setup_power.o
> +obj-$(CONFIG_PPC_BOOK3S_64)  += cpu_setup_power.o security.o
>  obj-$(CONFIG_PPC_BOOK3S_64)  += mce.o mce_power.o
>  obj-$(CONFIG_PPC_BOOK3E_64)  += exceptions-64e.o idle_book3e.o
>  obj-$(CONFIG_PPC64)  += vdso64/
> diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
> new file mode 100644
> index ..c62a5d7196e3
> --- /dev/null
> +++ b/arch/powerpc/kernel/security.c
> @@ -0,0 +1,14 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +//
> +// Security related flags and so on.
> +//
> +// Copyright 2018, Michael Ellerman, IBM Corporation.
> +
> +#include 
> +
> +
> +unsigned long powerpc_security_features 

Re: [PATCH v4] watchdog: add SPDX identifiers for watchdog subsystem

[Florian Fainelli]

On 02/28/2018 07:01 AM, Marcus Folkesson wrote:
> - Add SPDX identifier
> - Remove boiler plate license text
> - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
>   license
> 
> Signed-off-by: Marcus Folkesson 
> Acked-by: Adam Thomson 
> Acked-by: Baruch Siach 
> Acked-by: Charles Keepax 
> Acked-by: Keiji Hayashibara 
> Acked-by: Johannes Thumshirn 
> Acked-by: Mans Rullgard 
> Acked-by: Matthias Brugger 
> Acked-by: Michal Simek 
> Acked-by: Neil Armstrong 
> Acked-by: Nicolas Ferre 
> Acked-by: Thierry Reding 
> Acked-by: Tomas Winkler 
> Acked-by: Patrice Chotard 
> Acked-by: William Breathitt Gray 
> Reviewed-by: Eric Anholt 
> ---
> 
> Notes:
> v4:
>   - Drop coh901327_wdt since it allready is a pending patch
> v3:
>   - Keep license text for ebc-c384_wdt
> v2:
>   - Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
>   - Change to BSD-3-Clause for meson_gxbb_wdt
> v1: Please have an extra look at meson_gxbb_wdt.c
> 

>  drivers/watchdog/ar7_wdt.c | 14 +-

>  drivers/watchdog/bcm2835_wdt.c |  5 +---
>  drivers/watchdog/bcm47xx_wdt.c |  5 +---
>  drivers/watchdog/bcm63xx_wdt.c |  5 +---
>  drivers/watchdog/bcm7038_wdt.c | 12 ++--
>  drivers/watchdog/bcm_kona_wdt.c|  9 +-

>  drivers/watchdog/mtx-1_wdt.c   | 11 +---

For these drivers above:

Acked-by: Florian Fainelli 

and it looks like you missed rdc321x_wdt.c, is there a specific reason?
-- 
Florian

Re: [PATCH V2 4/4] powerpc/mm/hash64: Increase the VA range

[kbuild test robot]

Hi Aneesh,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.16-rc3 next-20180228]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Aneesh-Kumar-K-V/Add-support-for-4PB-virtual-address-space-on-hash/20180301-032452
base:   https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-defconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
make.cross ARCH=powerpc 

All errors (new ones prefixed by >>):

   arch/powerpc/mm/slice.c: In function 'slice_get_unmapped_area':
>> arch/powerpc/mm/slice.c:616:1: error: the frame size of 2080 bytes is larger 
>> than 2048 bytes [-Werror=frame-larger-than=]
}
^
   arch/powerpc/mm/slice.c: In function 'is_hugepage_only_range':
   arch/powerpc/mm/slice.c:790:1: error: the frame size of 2080 bytes is larger 
than 2048 bytes [-Werror=frame-larger-than=]
}
^
   cc1: all warnings being treated as errors

vim +616 arch/powerpc/mm/slice.c

3a8247cc2 Paul Mackerras 2008-06-18  597  
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  598if (addr == -ENOMEM)
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  599return -ENOMEM;
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  600  
a4d362150 Aneesh Kumar K.V   2017-03-22  601
slice_range_to_mask(addr, len, );
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  602slice_dbg(" found 
potential area at 0x%lx\n", addr);
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  603slice_print_mask(" 
mask", mask);
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  604  
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  605   convert:
4500a5c6a Aneesh Kumar K.V   2018-02-26  606slice_mask_for_size(mm, 
MMU_PAGE_4K, _mask, high_limit);
f3207c124 Aneesh Kumar K.V   2017-03-22  607
slice_andnot_mask(, _mask);
4500a5c6a Aneesh Kumar K.V   2018-02-26  608
slice_andnot_mask(, _mask);
f3207c124 Aneesh Kumar K.V   2017-03-22  609if (mask.low_slices || 
!bitmap_empty(mask.high_slices, SLICE_NUM_HIGH)) {
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  610
slice_convert(mm, mask, psize);
3a8247cc2 Paul Mackerras 2008-06-18  611if (psize > 
MMU_PAGE_BASE)
84c3d4aae Benjamin Herrenschmidt 2008-07-16  612
on_each_cpu(slice_flush_segments, mm, 1);
3a8247cc2 Paul Mackerras 2008-06-18  613}
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  614return addr;
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  615  
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08 @616  }
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  617  
EXPORT_SYMBOL_GPL(slice_get_unmapped_area);
d0f13e3c2 Benjamin Herrenschmidt 2007-05-08  618  

:: The code at line 616 was first introduced by commit
:: d0f13e3c20b6fb73ccb467bdca97fa7cf5a574cd [POWERPC] Introduce address 
space "slices"

:: TO: Benjamin Herrenschmidt <b...@kernel.crashing.org>
:: CC: Paul Mackerras <pau...@samba.org>

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip

Re: [PATCH] powerpc: Use generic pci_mmap_resource_range()

[Bjorn Helgaas]

On Mon, Feb 19, 2018 at 12:59:51PM +, David Woodhouse wrote:
> Commit f719582435 ("PCI: Add pci_mmap_resource_range() and use it for
> ARM64") added this generic function with the intent of using it
> everywhere and ultimately killing the old arch-specific implementations.
> 
> Let's get on with that eradication...
> 
> Signed-off-by: David Woodhouse 

Applied to pci/resource-mmap for v4.17, thanks!

Powerpc folks, let me know if you have applied this or would like to, and
I'll drop it.

> ---
>  arch/powerpc/include/asm/pci.h   |   9 ++--
>  arch/powerpc/kernel/pci-common.c | 106 
> ---
>  2 files changed, 15 insertions(+), 100 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
> index d82802f..401c62a 100644
> --- a/arch/powerpc/include/asm/pci.h
> +++ b/arch/powerpc/include/asm/pci.h
> @@ -76,10 +76,11 @@ extern int pci_proc_domain(struct pci_bus *bus);
>  
>  struct vm_area_struct;
>  
> -/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() and it does WC 
> */
> -#define HAVE_PCI_MMAP1
> -#define arch_can_pci_mmap_io()   1
> -#define arch_can_pci_mmap_wc()   1
> +/* Tell PCI code what kind of PCI resource mappings we support */
> +#define HAVE_PCI_MMAP1
> +#define ARCH_GENERIC_PCI_MMAP_RESOURCE   1
> +#define arch_can_pci_mmap_io()   1
> +#define arch_can_pci_mmap_wc()   1
>  
>  extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
>  size_t count);
> diff --git a/arch/powerpc/kernel/pci-common.c 
> b/arch/powerpc/kernel/pci-common.c
> index 446c796..fe9733f 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -410,72 +410,22 @@ static int pci_read_irq_line(struct pci_dev *pci_dev)
>  }
>  
>  /*
> - * Platform support for /proc/bus/pci/X/Y mmap()s,
> - * modelled on the sparc64 implementation by Dave Miller.
> + * Platform support for /proc/bus/pci/X/Y mmap()s.
>   *  -- paulus.
>   */
> -
> -/*
> - * Adjust vm_pgoff of VMA such that it is the physical page offset
> - * corresponding to the 32-bit pci bus offset for DEV requested by the user.
> - *
> - * Basically, the user finds the base address for his device which he wishes
> - * to mmap.  They read the 32-bit value from the config space base register,
> - * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
> - * offset parameter of mmap on /proc/bus/pci/XXX for that device.
> - *
> - * Returns negative error code on failure, zero on success.
> - */
> -static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
> -resource_size_t *offset,
> -enum pci_mmap_state mmap_state)
> +int pci_iobar_pfn(struct pci_dev *pdev, int bar, struct vm_area_struct *vma)
>  {
> - struct pci_controller *hose = pci_bus_to_host(dev->bus);
> - unsigned long io_offset = 0;
> - int i, res_bit;
> -
> - if (hose == NULL)
> - return NULL;/* should never happen */
> -
> - /* If memory, add on the PCI bridge address offset */
> - if (mmap_state == pci_mmap_mem) {
> -#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
> - *offset += hose->pci_mem_offset;
> -#endif
> - res_bit = IORESOURCE_MEM;
> - } else {
> - io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
> - *offset += io_offset;
> - res_bit = IORESOURCE_IO;
> - }
> -
> - /*
> -  * Check that the offset requested corresponds to one of the
> -  * resources of the device.
> -  */
> - for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
> - struct resource *rp = >resource[i];
> - int flags = rp->flags;
> + struct pci_controller *hose = pci_bus_to_host(pdev->bus);
> + resource_size_t ioaddr = pci_resource_start(pdev, bar);
>  
> - /* treat ROM as memory (should be already) */
> - if (i == PCI_ROM_RESOURCE)
> - flags |= IORESOURCE_MEM;
> -
> - /* Active and same type? */
> - if ((flags & res_bit) == 0)
> - continue;
> -
> - /* In the range of this resource? */
> - if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
> - continue;
> + if (!hose)
> + return -EINVAL;
>  
> - /* found it! construct the final physical address */
> - if (mmap_state == pci_mmap_io)
> - *offset += hose->io_base_phys - io_offset;
> - return rp;
> - }
> + /* Convert to an offset within this PCI controller */
> + ioaddr -= (unsigned long)hose->io_base_virt - _IO_BASE;
>  
> - return NULL;
> + vma->vm_pgoff += (ioaddr + hose->io_base_phys) >> PAGE_SHIFT;
> + 

[PATCH] powerpc: dts: replace 'linux,stdout-path' with 'stdout-path'

[Rob Herring]

'linux,stdout-path' has been deprecated for some time in favor of
'stdout-path'. Now dtc will warn on occurrences of 'linux,stdout-path'.
Search and replace all the of occurrences with 'stdout-path'.

Signed-off-by: Rob Herring 
Cc: Mark Rutland 
Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Michael Ellerman 
Cc: linuxppc-dev@lists.ozlabs.org
---
 arch/powerpc/boot/dts/acadia.dts   | 2 +-
 arch/powerpc/boot/dts/adder875-redboot.dts | 2 +-
 arch/powerpc/boot/dts/adder875-uboot.dts   | 2 +-
 arch/powerpc/boot/dts/akebono.dts  | 2 +-
 arch/powerpc/boot/dts/amigaone.dts | 2 +-
 arch/powerpc/boot/dts/asp834x-redboot.dts  | 2 +-
 arch/powerpc/boot/dts/bamboo.dts   | 2 +-
 arch/powerpc/boot/dts/c2k.dts  | 2 +-
 arch/powerpc/boot/dts/currituck.dts| 2 +-
 arch/powerpc/boot/dts/ebony.dts| 2 +-
 arch/powerpc/boot/dts/eiger.dts| 2 +-
 arch/powerpc/boot/dts/ep405.dts| 2 +-
 arch/powerpc/boot/dts/fsl/mvme7100.dts | 2 +-
 arch/powerpc/boot/dts/fsp2.dts | 2 +-
 arch/powerpc/boot/dts/holly.dts| 2 +-
 arch/powerpc/boot/dts/hotfoot.dts  | 2 +-
 arch/powerpc/boot/dts/icon.dts | 2 +-
 arch/powerpc/boot/dts/iss4xx-mpic.dts  | 2 +-
 arch/powerpc/boot/dts/iss4xx.dts   | 2 +-
 arch/powerpc/boot/dts/katmai.dts   | 2 +-
 arch/powerpc/boot/dts/klondike.dts | 2 +-
 arch/powerpc/boot/dts/ksi8560.dts  | 2 +-
 arch/powerpc/boot/dts/media5200.dts| 2 +-
 arch/powerpc/boot/dts/mpc8272ads.dts   | 2 +-
 arch/powerpc/boot/dts/mpc866ads.dts| 2 +-
 arch/powerpc/boot/dts/mpc885ads.dts| 2 +-
 arch/powerpc/boot/dts/mvme5100.dts | 2 +-
 arch/powerpc/boot/dts/obs600.dts   | 2 +-
 arch/powerpc/boot/dts/pq2fads.dts  | 2 +-
 arch/powerpc/boot/dts/rainier.dts  | 2 +-
 arch/powerpc/boot/dts/redwood.dts  | 2 +-
 arch/powerpc/boot/dts/sam440ep.dts | 2 +-
 arch/powerpc/boot/dts/sequoia.dts  | 2 +-
 arch/powerpc/boot/dts/storcenter.dts   | 2 +-
 arch/powerpc/boot/dts/taishan.dts  | 2 +-
 arch/powerpc/boot/dts/virtex440-ml507.dts  | 2 +-
 arch/powerpc/boot/dts/virtex440-ml510.dts  | 2 +-
 arch/powerpc/boot/dts/walnut.dts   | 2 +-
 arch/powerpc/boot/dts/warp.dts | 2 +-
 arch/powerpc/boot/dts/xpedite5200_xmon.dts | 2 +-
 arch/powerpc/boot/dts/yosemite.dts | 2 +-
 41 files changed, 41 insertions(+), 41 deletions(-)

diff --git a/arch/powerpc/boot/dts/acadia.dts b/arch/powerpc/boot/dts/acadia.dts
index 86266159521e..deb52e41ab84 100644
--- a/arch/powerpc/boot/dts/acadia.dts
+++ b/arch/powerpc/boot/dts/acadia.dts
@@ -219,6 +219,6 @@
};
 
chosen {
-   linux,stdout-path = "/plb/opb/serial@ef600300";
+   stdout-path = "/plb/opb/serial@ef600300";
};
 };
diff --git a/arch/powerpc/boot/dts/adder875-redboot.dts 
b/arch/powerpc/boot/dts/adder875-redboot.dts
index 083984720b2f..7f5ff4168482 100644
--- a/arch/powerpc/boot/dts/adder875-redboot.dts
+++ b/arch/powerpc/boot/dts/adder875-redboot.dts
@@ -178,6 +178,6 @@
};
 
chosen {
-   linux,stdout-path = 
+   stdout-path = 
};
 };
diff --git a/arch/powerpc/boot/dts/adder875-uboot.dts 
b/arch/powerpc/boot/dts/adder875-uboot.dts
index e4554caf8f8d..bd9f33c57737 100644
--- a/arch/powerpc/boot/dts/adder875-uboot.dts
+++ b/arch/powerpc/boot/dts/adder875-uboot.dts
@@ -177,6 +177,6 @@
};
 
chosen {
-   linux,stdout-path = 
+   stdout-path = 
};
 };
diff --git a/arch/powerpc/boot/dts/akebono.dts 
b/arch/powerpc/boot/dts/akebono.dts
index 746779202a12..8a7a10139bc9 100644
--- a/arch/powerpc/boot/dts/akebono.dts
+++ b/arch/powerpc/boot/dts/akebono.dts
@@ -410,6 +410,6 @@
};
 
chosen {
-   linux,stdout-path = 
+   stdout-path = 
};
 };
diff --git a/arch/powerpc/boot/dts/amigaone.dts 
b/arch/powerpc/boot/dts/amigaone.dts
index 49ac36b16dd7..712430155b99 100644
--- a/arch/powerpc/boot/dts/amigaone.dts
+++ b/arch/powerpc/boot/dts/amigaone.dts
@@ -168,6 +168,6 @@
};
 
chosen {
-   linux,stdout-path = "/pci@8000/isa@7/serial@3f8";
+   stdout-path = "/pci@8000/isa@7/serial@3f8";
};
 };
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts 
b/arch/powerpc/boot/dts/asp834x-redboot.dts
index 9198745f45fb..e987b5af9326 100644
--- a/arch/powerpc/boot/dts/asp834x-redboot.dts
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -304,7 +304,7 @@
 
chosen {
bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 
rootfstype=jffs2";
-   linux,stdout-path = 
+   stdout-path = 
};
 
 };
diff --git a/arch/powerpc/boot/dts/bamboo.dts 

Re: [RESEND][PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

[Benjamin Herrenschmidt]

On Thu, 2018-03-01 at 01:03 +0530, Akshay Adiga wrote:
> commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
> states via stop API.") uses stop-api provided by the firmware to restore
> PSSCR. PSSCR restore is required for handling special wakeup. When special
> wakeup is completed, the core enters stop state based on restored PSSCR.
> 
> Currently PSSCR is restored to deepest available stop state, causing
> a idle cpu to enter deeper stop state on a special wakeup, which causes
> the cpu to hang on wakeup.
> 
> A "sensors" command which reads temperature (through DTS sensors) on idle
> cpu can trigger special wakeup.
> 
> Failed Scenario :
> Request restore of PSSCR with RL = 11
> cpu enters idle state (stop5)
>   user triggers "sensors" command
>Assert special wakeup on cpu
>  Restores PSSCR with RL = 11  < Done by firmware
>   Read DTS sensor
>Deassert special wakeup
>   cpu enters idle state (stop11) <-- Instead of stop5
> 
> Cpu hang is caused because cpu ended up in a deeper state than it requested
> 
> This patch fixes instability caused by special wakeup when stop11 is
> enabled. Requests restore of PSSCR to deepest stop state used by cpuidle.
> Only when offlining cpu, request restore of PSSCR to deepest stop state.
> On onlining cpu, request restore of PSSCR to deepest stop state used by
> cpuidle.

So if we chose a stop state, but somebody else does a special wakeup,
we'll end up going back into a *deeper* one than the one we came from ?

I still think this is broken by design. The chip should automatically
go back to the state it went to after special wakeup, thus the PPE
controlling the state should override the PSSCR value accordingly
rather than relying on those SW hoops.

> 
> Cc:  # v4.14+
> Fixes : 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
> states via stop API.")
> Reported-by: Pridhiviraj Paidipeddi 
> Signed-off-by: Akshay Adiga 
> ---
>  arch/powerpc/include/asm/cpuidle.h|  2 ++
>  arch/powerpc/platforms/powernv/idle.c | 46 
> ---
>  drivers/cpuidle/cpuidle-powernv.c |  1 -
>  3 files changed, 45 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/cpuidle.h 
> b/arch/powerpc/include/asm/cpuidle.h
> index e210a83..f52e9f1 100644
> --- a/arch/powerpc/include/asm/cpuidle.h
> +++ b/arch/powerpc/include/asm/cpuidle.h
> @@ -67,6 +67,8 @@
>  #define ERR_EC_ESL_MISMATCH  -1
>  #define ERR_DEEP_STATE_ESL_MISMATCH  -2
>  
> +#define POWERNV_THRESHOLD_LATENCY_NS 20
> +
>  #ifndef __ASSEMBLY__
>  /* Additional SPRs that need to be saved/restored during stop */
>  struct stop_sprs {
> diff --git a/arch/powerpc/platforms/powernv/idle.c 
> b/arch/powerpc/platforms/powernv/idle.c
> index 443d5ca..4b0c7d24 100644
> --- a/arch/powerpc/platforms/powernv/idle.c
> +++ b/arch/powerpc/platforms/powernv/idle.c
> @@ -56,8 +56,11 @@ u64 pnv_first_deep_stop_state = MAX_STOP_STATE;
>   */
>  static u64 pnv_deepest_stop_psscr_val;
>  static u64 pnv_deepest_stop_psscr_mask;
> +static u64 pnv_deepest_cpuidle_psscr_val;
> +static u64 pnv_deepest_cpuidle_psscr_mask;
>  static u64 pnv_deepest_stop_flag;
>  static bool deepest_stop_found;
> +static bool deepest_cpuidle_found;
>  
>  static int pnv_save_sprs_for_deep_states(void)
>  {
> @@ -76,7 +79,14 @@ static int pnv_save_sprs_for_deep_states(void)
>   uint64_t hid5_val = mfspr(SPRN_HID5);
>   uint64_t hmeer_val = mfspr(SPRN_HMEER);
>   uint64_t msr_val = MSR_IDLE;
> - uint64_t psscr_val = pnv_deepest_stop_psscr_val;
> +
> + /*
> +  * Pick deepest cpuidle psscr as the value to be
> +  * restored through wakeup engine.
> +  * We will request a deeper state to be restored
> +  * in hotplug path
> +  */
> + uint64_t psscr_val = pnv_deepest_cpuidle_psscr_val;
>  
>   for_each_possible_cpu(cpu) {
>   uint64_t pir = get_hard_smp_processor_id(cpu);
> @@ -409,7 +419,7 @@ static void pnv_program_cpu_hotplug_lpcr(unsigned int 
> cpu, u64 lpcr_val)
>   */
>  unsigned long pnv_cpu_offline(unsigned int cpu)
>  {
> - unsigned long srr1;
> + u64 srr1;
>   u32 idle_states = pnv_get_supported_cpuidle_states();
>   u64 lpcr_val;
>  
> @@ -429,12 +439,18 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
>   __ppc64_runlatch_off();
>  
>   if (cpu_has_feature(CPU_FTR_ARCH_300) && deepest_stop_found) {
> - unsigned long psscr;
> + u64 psscr;
> + u64 pir = get_hard_smp_processor_id(cpu);
>  
>   psscr = mfspr(SPRN_PSSCR);
>   psscr = (psscr & ~pnv_deepest_stop_psscr_mask) |
>   pnv_deepest_stop_psscr_val;
> + if (pnv_deepest_stop_psscr_val != pnv_deepest_cpuidle_psscr_val)
> + opal_slw_set_reg(pir, P9_STOP_SPR_PSSCR, psscr);
>   srr1 = 

[RESEND][PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

[Akshay Adiga]

commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
states via stop API.") uses stop-api provided by the firmware to restore
PSSCR. PSSCR restore is required for handling special wakeup. When special
wakeup is completed, the core enters stop state based on restored PSSCR.

Currently PSSCR is restored to deepest available stop state, causing
a idle cpu to enter deeper stop state on a special wakeup, which causes
the cpu to hang on wakeup.

A "sensors" command which reads temperature (through DTS sensors) on idle
cpu can trigger special wakeup.

Failed Scenario :
Request restore of PSSCR with RL = 11
cpu enters idle state (stop5)
  user triggers "sensors" command
   Assert special wakeup on cpu
 Restores PSSCR with RL = 11  < Done by firmware
  Read DTS sensor
   Deassert special wakeup
  cpu enters idle state (stop11) <-- Instead of stop5

Cpu hang is caused because cpu ended up in a deeper state than it requested

This patch fixes instability caused by special wakeup when stop11 is
enabled. Requests restore of PSSCR to deepest stop state used by cpuidle.
Only when offlining cpu, request restore of PSSCR to deepest stop state.
On onlining cpu, request restore of PSSCR to deepest stop state used by
cpuidle.

Cc:  # v4.14+
Fixes : 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
states via stop API.")
Reported-by: Pridhiviraj Paidipeddi 
Signed-off-by: Akshay Adiga 
---
 arch/powerpc/include/asm/cpuidle.h|  2 ++
 arch/powerpc/platforms/powernv/idle.c | 46 ---
 drivers/cpuidle/cpuidle-powernv.c |  1 -
 3 files changed, 45 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/cpuidle.h 
b/arch/powerpc/include/asm/cpuidle.h
index e210a83..f52e9f1 100644
--- a/arch/powerpc/include/asm/cpuidle.h
+++ b/arch/powerpc/include/asm/cpuidle.h
@@ -67,6 +67,8 @@
 #define ERR_EC_ESL_MISMATCH-1
 #define ERR_DEEP_STATE_ESL_MISMATCH-2
 
+#define POWERNV_THRESHOLD_LATENCY_NS 20
+
 #ifndef __ASSEMBLY__
 /* Additional SPRs that need to be saved/restored during stop */
 struct stop_sprs {
diff --git a/arch/powerpc/platforms/powernv/idle.c 
b/arch/powerpc/platforms/powernv/idle.c
index 443d5ca..4b0c7d24 100644
--- a/arch/powerpc/platforms/powernv/idle.c
+++ b/arch/powerpc/platforms/powernv/idle.c
@@ -56,8 +56,11 @@ u64 pnv_first_deep_stop_state = MAX_STOP_STATE;
  */
 static u64 pnv_deepest_stop_psscr_val;
 static u64 pnv_deepest_stop_psscr_mask;
+static u64 pnv_deepest_cpuidle_psscr_val;
+static u64 pnv_deepest_cpuidle_psscr_mask;
 static u64 pnv_deepest_stop_flag;
 static bool deepest_stop_found;
+static bool deepest_cpuidle_found;
 
 static int pnv_save_sprs_for_deep_states(void)
 {
@@ -76,7 +79,14 @@ static int pnv_save_sprs_for_deep_states(void)
uint64_t hid5_val = mfspr(SPRN_HID5);
uint64_t hmeer_val = mfspr(SPRN_HMEER);
uint64_t msr_val = MSR_IDLE;
-   uint64_t psscr_val = pnv_deepest_stop_psscr_val;
+
+   /*
+* Pick deepest cpuidle psscr as the value to be
+* restored through wakeup engine.
+* We will request a deeper state to be restored
+* in hotplug path
+*/
+   uint64_t psscr_val = pnv_deepest_cpuidle_psscr_val;
 
for_each_possible_cpu(cpu) {
uint64_t pir = get_hard_smp_processor_id(cpu);
@@ -409,7 +419,7 @@ static void pnv_program_cpu_hotplug_lpcr(unsigned int cpu, 
u64 lpcr_val)
  */
 unsigned long pnv_cpu_offline(unsigned int cpu)
 {
-   unsigned long srr1;
+   u64 srr1;
u32 idle_states = pnv_get_supported_cpuidle_states();
u64 lpcr_val;
 
@@ -429,12 +439,18 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
__ppc64_runlatch_off();
 
if (cpu_has_feature(CPU_FTR_ARCH_300) && deepest_stop_found) {
-   unsigned long psscr;
+   u64 psscr;
+   u64 pir = get_hard_smp_processor_id(cpu);
 
psscr = mfspr(SPRN_PSSCR);
psscr = (psscr & ~pnv_deepest_stop_psscr_mask) |
pnv_deepest_stop_psscr_val;
+   if (pnv_deepest_stop_psscr_val != pnv_deepest_cpuidle_psscr_val)
+   opal_slw_set_reg(pir, P9_STOP_SPR_PSSCR, psscr);
srr1 = power9_idle_stop(psscr);
+   psscr = (psscr & ~pnv_deepest_cpuidle_psscr_mask) |
+   pnv_deepest_cpuidle_psscr_val;
+   opal_slw_set_reg(pir, P9_STOP_SPR_PSSCR, psscr);
 
} else if ((idle_states & OPAL_PM_WINKLE_ENABLED) &&
   (idle_states & OPAL_PM_LOSE_FULL_CONTEXT)) {
@@ -555,6 +571,7 @@ static int __init pnv_power9_idle_init(struct device_node 
*np, u32 *flags,
u64 *psscr_val = NULL;
u64 *psscr_mask = NULL;
u32 *residency_ns = NULL;
+   u32 *latency_ns = NULL;
u64 

Re: [PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

[Akshay Adiga]

On Mon, Feb 26, 2018 at 03:47:12PM +1100, Stewart Smith wrote:
> Akshay Adiga  writes:
> > commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
> > states via stop API.") uses stop-api provided by the firmware to restore
> > PSSCR. PSSCR restore is required for handling special wakeup. When special
> > wakeup is completed, the core enters stop state based on restored PSSCR.
> >
> > Currently PSSCR is restored to deepest available stop state, causing
> > a idle cpu to enter deeper stop state on a special wakeup, which causes
> > the cpu to hang on wakeup.
> >
> > A "sensors" command which reads temperature (through DTS sensors) on idle
> > cpu can trigger special wakeup.
> >
> > Failed Scenario :
> > Request restore of PSSCR with RL = 11
> > cpu enters idle state (stop5)
> >   user triggers "sensors" command
> >Assert special wakeup on cpu
> >  Restores PSSCR with RL = 11  < Done by firmware
> >   Read DTS sensor
> >Deassert special wakeup
> >   cpu enters idle state (stop11) <-- Instead of stop5
> >
> > Cpu hang is caused because cpu ended up in a deeper state than it requested
> >
> > This patch fixes instability caused by special wakeup when stop11 is
> > enabled. Requests restore of PSSCR to deepest stop state used by cpuidle.
> > Only when offlining cpu, request restore of PSSCR to deepest stop state.
> > On onlining cpu, request restore of PSSCR to deepest stop state used by
> > cpuidle.
> >
> > Fixes : 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle
> > states via stop API.")
> 
> This should CC stable ?
> 
> We'll need this to enable stop11 in firmware and not break things, right?

Yes I will resend and CC it to stable.
> 
> -- 
> Stewart Smith
> OPAL Architect, IBM.
> 

Re: [PATCH 3/3] powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead

[Vaidyanathan Srinivasan]

* Nicholas Piggin  [2017-11-18 00:08:07]:

> When stop is executed with EC=ESL=0, it appears to execute like a
> normal instruction (resuming from NIP when woken by interrupt). So all
> the save/restore handling can be avoided completely. In particular NV
> GPRs do not have to be saved, and MSR does not have to be switched
> back to kernel MSR.
> 
> So move the test for EC=ESL=0 sleep states out to power9_idle_stop,
> and return directly to the caller after stop in that case. The mtspr
> to PSSCR is moved to the top of power9_offline_stop just so it matches
> power9_idle_stop.
> 
> This improves performance for ping-pong benchmark with the stop0_lite
> idle state by 2.54% for 2 threads in the same core, and 2.57% for
> different cores.
> 
> Signed-off-by: Nicholas Piggin 

Reviewed-by: Vaidyanathan Srinivasan 

> ---
>  arch/powerpc/kernel/idle_book3s.S | 43 
> +++
>  arch/powerpc/platforms/powernv/idle.c |  7 +-
>  2 files changed, 19 insertions(+), 31 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/idle_book3s.S 
> b/arch/powerpc/kernel/idle_book3s.S
> index 07a306173c5a..6243da99b26c 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -324,31 +324,8 @@ enter_winkle:
>  /*
>   * r3 - PSSCR value corresponding to the requested stop state.
>   */
> -power_enter_stop:
> -/*
> - * Check if we are executing the lite variant with ESL=EC=0
> - */
> - andis.   r4,r3,PSSCR_EC_ESL_MASK_SHIFTED
> +power_enter_stop_esl:
>   clrldi   r3,r3,60 /* r3 = Bits[60:63] = Requested Level (RL) */
> - bne  .Lhandle_esl_ec_set
> - PPC_STOP
> - li  r3,0  /* Since we didn't lose state, return 0 */
> -
> - /*
> -  * pnv_wakeup_noloss() expects r12 to contain the SRR1 value so
> -  * it can determine if the wakeup reason is an HMI in
> -  * CHECK_HMI_INTERRUPT.
> -  *
> -  * However, when we wakeup with ESL=0, SRR1 will not contain the wakeup
> -  * reason, so there is no point setting r12 to SRR1.
> -  *
> -  * Further, we clear r12 here, so that we don't accidentally enter the
> -  * HMI in pnv_wakeup_noloss() if the value of r12[42:45] == WAKE_HMI.
> -  */
> - li  r12, 0
> - b   pnv_wakeup_noloss
> -
> -.Lhandle_esl_ec_set:
>  BEGIN_FTR_SECTION
>   /*
>* POWER9 DD2.0 or earlier can incorrectly set PMAO when waking up after
> @@ -423,26 +400,32 @@ ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_ARCH_207S, 
> 66);\
>   * r3 contains desired PSSCR register value.
>   */
>  _GLOBAL(power9_idle_stop)
> - std r3, PACA_REQ_PSSCR(r13)
>   mtspr   SPRN_PSSCR,r3
> - LOAD_REG_ADDR(r4,power_enter_stop)
> + andis.  r4,r3,PSSCR_EC_ESL_MASK_SHIFTED
> + bne 1f
> + PPC_STOP
> + li  r3,0  /* Since we didn't lose state, return 0 */
> + blr
> +
> +1:   std r3, PACA_REQ_PSSCR(r13)
> + LOAD_REG_ADDR(r4,power_enter_stop_esl)
>   b   pnv_powersave_common
>   /* No return */

Good optimization to skip the context save and directly execute stop
for ESL=EC=0 case.

>  /*
> - * Entered with MSR[EE]=0 and no soft-masked interrupts pending.
> - * r3 contains desired PSSCR register value.
> + * This is the same as the above, but it sets KVM state for secondaries,
> + * and it must have PSSCR[EC]=1
>   */
>  _GLOBAL(power9_offline_stop)
> - std r3, PACA_REQ_PSSCR(r13)
>   mtspr   SPRN_PSSCR,r3
> + std r3, PACA_REQ_PSSCR(r13)
>  #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
>   /* Tell KVM we're entering idle */
>   li  r4,KVM_HWTHREAD_IN_IDLE
>   /* DO THIS IN REAL MODE!  See comment above. */
>   stb r4,HSTATE_HWTHREAD_STATE(r13)
>  #endif
> - LOAD_REG_ADDR(r4,power_enter_stop)
> + LOAD_REG_ADDR(r4,power_enter_stop_esl)
>   b   pnv_powersave_common
>   /* No return */
> 
> diff --git a/arch/powerpc/platforms/powernv/idle.c 
> b/arch/powerpc/platforms/powernv/idle.c
> index a921d5428d76..610b1637c16f 100644
> --- a/arch/powerpc/platforms/powernv/idle.c
> +++ b/arch/powerpc/platforms/powernv/idle.c
> @@ -621,7 +621,12 @@ static int __init pnv_power9_idle_init(struct 
> device_node *np, u32 *flags,
>   continue;
>   }
> 
> - if (max_residency_ns < residency_ns[i]) {
> + /*
> +  * Deepest stop for unplug must be PSSCR[EC]=1 (wakeup at
> +  * 0x100.
> +  */
> + if ((max_residency_ns < residency_ns[i])&&
> + (psscr_val[i] & PSSCR_EC)) {
>   max_residency_ns = residency_ns[i];
>   pnv_deepest_stop_psscr_val = psscr_val[i];
>   pnv_deepest_stop_psscr_mask = psscr_mask[i];

If firmware did not provide any ESL=EC=1 state, we can still leave
threads in stop ESL=0 state.  This is just a corner case or random

Re: [PATCH 1/3] powerpc/64s/idle: POWER9 implement a separate idle stop function for hotplug

[Vaidyanathan Srinivasan]

* Nicholas Piggin  [2017-11-18 00:08:05]:

> Implement a new function to invoke stop, power9_offline_stop, which is
> like power9_idle_stop but used by the cpu hotplug code.
> 
> Move KVM secondary state manipulation code to the offline case.
> 
> Signed-off-by: Nicholas Piggin 

Reviewed-by: Vaidyanathan Srinivasan 


> ---
>  arch/powerpc/include/asm/processor.h  |  1 +
>  arch/powerpc/kernel/idle_book3s.S | 24 ++--
>  arch/powerpc/platforms/powernv/idle.c |  2 +-
>  3 files changed, 20 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/processor.h 
> b/arch/powerpc/include/asm/processor.h
> index bdab3b74eb98..0ebdb58460ce 100644
> --- a/arch/powerpc/include/asm/processor.h
> +++ b/arch/powerpc/include/asm/processor.h
> @@ -500,6 +500,7 @@ extern int powersave_nap; /* set if nap mode can be used 
> in idle loop */
>  extern unsigned long power7_idle_insn(unsigned long type); /* 
> PNV_THREAD_NAP/etc*/
>  extern void power7_idle_type(unsigned long type);
>  extern unsigned long power9_idle_stop(unsigned long psscr_val);
> +extern unsigned long power9_offline_stop(unsigned long psscr_val);
>  extern void power9_idle_type(unsigned long stop_psscr_val,
> unsigned long stop_psscr_mask);
> 
> diff --git a/arch/powerpc/kernel/idle_book3s.S 
> b/arch/powerpc/kernel/idle_book3s.S
> index 01e1c1997893..2f8364e7b489 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -325,12 +325,6 @@ enter_winkle:
>   * r3 - PSSCR value corresponding to the requested stop state.
>   */
>  power_enter_stop:
> -#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> - /* Tell KVM we're entering idle */
> - li  r4,KVM_HWTHREAD_IN_IDLE
> - /* DO THIS IN REAL MODE!  See comment above. */
> - stb r4,HSTATE_HWTHREAD_STATE(r13)
> -#endif
>  /*
>   * Check if we are executing the lite variant with ESL=EC=0
>   */
> @@ -435,6 +429,24 @@ _GLOBAL(power9_idle_stop)
>   b   pnv_powersave_common
>   /* No return */
> 
> +/*
> + * Entered with MSR[EE]=0 and no soft-masked interrupts pending.
> + * r3 contains desired PSSCR register value.
> + */
> +_GLOBAL(power9_offline_stop)
> + std r3, PACA_REQ_PSSCR(r13)
> + mtspr   SPRN_PSSCR,r3
> +#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> + /* Tell KVM we're entering idle */
> + li  r4,KVM_HWTHREAD_IN_IDLE
> + /* DO THIS IN REAL MODE!  See comment above. */
> + stb r4,HSTATE_HWTHREAD_STATE(r13)
> +#endif
> + LOAD_REG_ADDR(r4,power_enter_stop)
> + b   pnv_powersave_common
> + /* No return */
> +

Good optimization.  This code is needed only when an offline thread is
wokenup at 0x100 to get into guest.  Can be skipped in idle wakeup
case.


> +
>  /*
>   * On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1,
>   * HSPRG0 will be set to the HSPRG0 value of one of the
> diff --git a/arch/powerpc/platforms/powernv/idle.c 
> b/arch/powerpc/platforms/powernv/idle.c
> index 443d5ca71995..a921d5428d76 100644
> --- a/arch/powerpc/platforms/powernv/idle.c
> +++ b/arch/powerpc/platforms/powernv/idle.c
> @@ -434,7 +434,7 @@ unsigned long pnv_cpu_offline(unsigned int cpu)
>   psscr = mfspr(SPRN_PSSCR);
>   psscr = (psscr & ~pnv_deepest_stop_psscr_mask) |
>   pnv_deepest_stop_psscr_val;
> - srr1 = power9_idle_stop(psscr);
> + srr1 = power9_offline_stop(psscr);
> 
>   } else if ((idle_states & OPAL_PM_WINKLE_ENABLED) &&
>  (idle_states & OPAL_PM_LOSE_FULL_CONTEXT)) {
> -- 
> 2.15.0
> 

[PATCH] powerpc/dma: remove unnecessary BUG()

[Christophe Leroy]

Direction is already checked in all calling functions in
include/linux/dma-mapping.h and also in called function __dma_sync()

So really no need to check it once more here.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/kernel/dma.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index da20569de9d4..e1cd6e979348 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -235,8 +235,6 @@ static inline dma_addr_t dma_nommu_map_page(struct device 
*dev,
 enum dma_data_direction dir,
 unsigned long attrs)
 {
-   BUG_ON(dir == DMA_NONE);
-
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
__dma_sync_page(page, offset, size, dir);
 
-- 
2.13.3

Re: [PATCH 2/3] powerpc/64s/idle: avoid sync for KVM state when waking from idle

[Vaidyanathan Srinivasan]

* Nicholas Piggin  [2017-11-18 00:08:06]:

> When waking from a CPU idle instruction (e.g., nap or stop), the sync
> for ordering the KVM secondary thread state can be avoided if there
> wakeup is coming from a kernel context rather than KVM context.
> 
> This improves performance for ping-pong benchmark with the stop0 idle
> state by 0.46% for 2 threads in the same core, and 1.02% for different
> cores.

Cool, the improvement comes from avoiding the "sync" alone?
 
> Signed-off-by: Nicholas Piggin 
> ---
>  arch/powerpc/kernel/idle_book3s.S | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/powerpc/kernel/idle_book3s.S 
> b/arch/powerpc/kernel/idle_book3s.S
> index 2f8364e7b489..07a306173c5a 100644
> --- a/arch/powerpc/kernel/idle_book3s.S
> +++ b/arch/powerpc/kernel/idle_book3s.S
> @@ -532,6 +532,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
>   mr  r3,r12
> 
>  #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
> + lbz r0,HSTATE_HWTHREAD_STATE(r13)
> + cmpwi   r0,KVM_HWTHREAD_IN_KERNEL
> + beq 1f
>   li  r0,KVM_HWTHREAD_IN_KERNEL
>   stb r0,HSTATE_HWTHREAD_STATE(r13)
>   /* Order setting hwthread_state vs. testing hwthread_req */

With this change, we will not check for HSTATE_HWTHREAD_REQ != 0 
condition but unconditionally goto host kernel if
HSTATE_HWTHREAD_STATE == KVM_HWTHREAD_IN_KERNEL at wakeup.

Host is in ST mode and sibling thread got a wakeup event (door bell) to execute
a new vcpu by calling kvm_start_guest, what will HSTATE_HWTHREAD_STATE be?

Just to clarify, what will the flags looks like for

(a) Host cpu sibling thread is offline and need to execute guest
(b) Host cpu sibling thread is idle and need to execute guest

--Vaidy

Re: [PATCH 01/21] powerpc: Remove warning on array size when empty

[Andy Shevchenko]

On Tue, Feb 27, 2018 at 10:42 PM, Segher Boessenkool
 wrote:
> On Tue, Feb 27, 2018 at 05:52:06PM +0200, Andy Shevchenko wrote:
>> On Tue, Feb 27, 2018 at 9:44 AM, Mathieu Malaterre  wrote:
>> > On Tue, Feb 27, 2018 at 8:33 AM, Christophe LEROY
>> >  wrote:
>>
>> > Much simpler is just add
>> >
>> > if (ARRAY_SIZE() == 0)
>> >   return;
>>
>> >> Or add in front:
>> >> if (!ARRAY_SIZE(feature_properties))
>> >> return;
>> >
>> > (not tested) I believe the compiler still go over the for() loop and
>> > will complain about the original unsigned comparison.
>>
>> Did you run tests? Did you look into object file?
>>
>> In kernel we much rely on the compiling away the code which is
>> deterministically not in use.
>> Here I'm pretty sure it will compile away entire function.
>
> It does, but it also still warns (this warning is done very early in the
> compiler pipeline).

Oh, I see.
Then the while () approach looks to me the best here.

-- 
With Best Regards,
Andy Shevchenko

Re: [RFC PATCH 1/6] powerpc: Add security feature flags for Spectre/Meltdown

[Segher Boessenkool]

Hi!

On Thu, Mar 01, 2018 at 01:53:11AM +1100, Michael Ellerman wrote:
> +// A speculation barrier should be used for bounds checks (Spectre variant 
> 1ull

s/1ull/1)/  ?


Segher

[PATCH v4] watchdog: add SPDX identifiers for watchdog subsystem

[Marcus Folkesson]

- Add SPDX identifier
- Remove boiler plate license text
- If MODULE_LICENSE and boiler plate does not match, go for boiler plate
  license

Signed-off-by: Marcus Folkesson 
Acked-by: Adam Thomson 
Acked-by: Baruch Siach 
Acked-by: Charles Keepax 
Acked-by: Keiji Hayashibara 
Acked-by: Johannes Thumshirn 
Acked-by: Mans Rullgard 
Acked-by: Matthias Brugger 
Acked-by: Michal Simek 
Acked-by: Neil Armstrong 
Acked-by: Nicolas Ferre 
Acked-by: Thierry Reding 
Acked-by: Tomas Winkler 
Acked-by: Patrice Chotard 
Acked-by: William Breathitt Gray 
Reviewed-by: Eric Anholt 
---

Notes:
v4:
- Drop coh901327_wdt since it allready is a pending patch
v3:
- Keep license text for ebc-c384_wdt
v2:
- Put back removed copyright texts for meson_gxbb_wdt and coh901327_wdt
- Change to BSD-3-Clause for meson_gxbb_wdt
v1: Please have an extra look at meson_gxbb_wdt.c

 drivers/watchdog/acquirewdt.c  |  6 +---
 drivers/watchdog/advantechwdt.c|  6 +---
 drivers/watchdog/alim1535_wdt.c|  6 +---
 drivers/watchdog/alim7101_wdt.c|  1 +
 drivers/watchdog/ar7_wdt.c | 14 +-
 drivers/watchdog/asm9260_wdt.c |  2 +-
 drivers/watchdog/aspeed_wdt.c  |  5 +---
 drivers/watchdog/at91rm9200_wdt.c  |  5 +---
 drivers/watchdog/at91sam9_wdt.c|  5 +---
 drivers/watchdog/at91sam9_wdt.h|  5 +---
 drivers/watchdog/ath79_wdt.c   |  4 +--
 drivers/watchdog/atlas7_wdt.c  |  2 +-
 drivers/watchdog/bcm2835_wdt.c |  5 +---
 drivers/watchdog/bcm47xx_wdt.c |  5 +---
 drivers/watchdog/bcm63xx_wdt.c |  5 +---
 drivers/watchdog/bcm7038_wdt.c | 12 ++--
 drivers/watchdog/bcm_kona_wdt.c|  9 +-
 drivers/watchdog/bfin_wdt.c|  2 +-
 drivers/watchdog/booke_wdt.c   |  5 +---
 drivers/watchdog/cadence_wdt.c |  5 +---
 drivers/watchdog/cpu5wdt.c | 15 +-
 drivers/watchdog/cpwd.c|  1 +
 drivers/watchdog/da9052_wdt.c  |  6 +---
 drivers/watchdog/da9055_wdt.c  |  6 +---
 drivers/watchdog/da9062_wdt.c  | 10 +--
 drivers/watchdog/da9063_wdt.c  |  5 +---
 drivers/watchdog/davinci_wdt.c |  7 ++---
 drivers/watchdog/diag288_wdt.c |  1 +
 drivers/watchdog/digicolor_wdt.c   |  5 +---
 drivers/watchdog/dw_wdt.c  |  6 +---
 drivers/watchdog/ebc-c384_wdt.c|  1 +
 drivers/watchdog/ep93xx_wdt.c  |  7 ++---
 drivers/watchdog/eurotechwdt.c |  6 +---
 drivers/watchdog/f71808e_wdt.c | 16 +--
 drivers/watchdog/ftwdt010_wdt.c|  6 ++--
 drivers/watchdog/gef_wdt.c |  6 +---
 drivers/watchdog/geodewdt.c|  5 +---
 drivers/watchdog/gpio_wdt.c|  5 +---
 drivers/watchdog/hpwdt.c   |  7 ++---
 drivers/watchdog/i6300esb.c|  6 +---
 drivers/watchdog/iTCO_vendor_support.c |  9 +-
 drivers/watchdog/iTCO_wdt.c| 10 +--
 drivers/watchdog/ib700wdt.c|  6 +---
 drivers/watchdog/ibmasr.c  |  3 +-
 drivers/watchdog/ie6xx_wdt.c   | 18 ++--
 drivers/watchdog/imgpdc_wdt.c  |  5 +---
 drivers/watchdog/imx2_wdt.c|  5 +---
 drivers/watchdog/indydog.c |  6 +---
 drivers/watchdog/intel-mid_wdt.c   |  6 ++--
 drivers/watchdog/intel_scu_watchdog.c  | 18 ++--
 drivers/watchdog/intel_scu_watchdog.h  | 16 +--
 drivers/watchdog/iop_wdt.c | 16 ++-
 drivers/watchdog/it8712f_wdt.c | 10 +--
 drivers/watchdog/it87_wdt.c| 10 +--
 drivers/watchdog/ixp4xx_wdt.c  |  6 ++--
 drivers/watchdog/jz4740_wdt.c  | 10 +--
 drivers/watchdog/kempld_wdt.c  | 12 ++--
 drivers/watchdog/ks8695_wdt.c  |  6 ++--
 drivers/watchdog/lantiq_wdt.c  |  7 ++---
 drivers/watchdog/loongson1_wdt.c   |  5 +---
 drivers/watchdog/lpc18xx_wdt.c |  5 +---
 drivers/watchdog/m54xx_wdt.c   |  6 ++--
 drivers/watchdog/machzwd.c | 11 +---
 drivers/watchdog/max63xx_wdt.c |  5 +---
 drivers/watchdog/max77620_wdt.c|  5 +---
 drivers/watchdog/mei_wdt.c | 12 ++--
 drivers/watchdog/mena21_wdt.c  |  4 +--
 drivers/watchdog/menf21bmc_wdt.c   |  8 ++
 drivers/watchdog/meson_gxbb_wdt.c  | 50 +-
 drivers/watchdog/meson_wdt.c   |  6 +---
 drivers/watchdog/mixcomwd.c|  6 +---
 drivers/watchdog/moxart_wdt.c  |  7 

[RFC PATCH 6/6] powerpc/64s: Enhance the information in cpu_show_meltdown()

[Michael Ellerman]

Now that we have the security feature flags we can make the
information displayed in the "meltdown" file more informative.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/include/asm/security_features.h |  1 +
 arch/powerpc/kernel/security.c   | 30 ++--
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/security_features.h 
b/arch/powerpc/include/asm/security_features.h
index 3b690de8b0e8..fe91b5e78dc4 100644
--- a/arch/powerpc/include/asm/security_features.h
+++ b/arch/powerpc/include/asm/security_features.h
@@ -10,6 +10,7 @@
 
 
 extern unsigned long powerpc_security_features;
+extern bool rfi_flush;
 
 static inline void security_ftr_set(unsigned long feature)
 {
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index 564e7f182a16..865db6f8bcca 100644
--- a/arch/powerpc/kernel/security.c
+++ b/arch/powerpc/kernel/security.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -19,8 +20,33 @@ unsigned long powerpc_security_features __read_mostly = \
 
 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, 
char *buf)
 {
-   if (rfi_flush)
-   return sprintf(buf, "Mitigation: RFI Flush\n");
+   bool thread_priv;
+
+   thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
+
+   if (rfi_flush || thread_priv) {
+   struct seq_buf s;
+   seq_buf_init(, buf, PAGE_SIZE - 1);
+
+   seq_buf_printf(, "Mitigation: ");
+
+   if (rfi_flush)
+   seq_buf_printf(, "RFI Flush");
+
+   if (rfi_flush && thread_priv)
+   seq_buf_printf(, ", ");
+
+   if (thread_priv)
+   seq_buf_printf(, "L1D private per thread");
+
+   seq_buf_printf(, "\n");
+
+   return s.len;
+   }
+
+   if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
+   !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
+   return sprintf(buf, "Not affected\n");
 
return sprintf(buf, "Vulnerable\n");
 }
-- 
2.14.1

[RFC PATCH 5/6] powerpc/64s: Move cpu_show_meltdown()

[Michael Ellerman]

This landed in setup_64.c for no good reason other than we had nowhere
else to put it. Now that we have a security-related file, that is a
better place for it so move it.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/kernel/security.c | 12 
 arch/powerpc/kernel/setup_64.c |  8 
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
index c62a5d7196e3..564e7f182a16 100644
--- a/arch/powerpc/kernel/security.c
+++ b/arch/powerpc/kernel/security.c
@@ -4,6 +4,9 @@
 //
 // Copyright 2018, Michael Ellerman, IBM Corporation.
 
+#include 
+#include 
+
 #include 
 
 
@@ -12,3 +15,12 @@ unsigned long powerpc_security_features __read_mostly = \
SEC_FTR_L1D_FLUSH_PR | \
SEC_FTR_BNDS_CHK_SPEC_BAR | \
SEC_FTR_FAVOUR_SECURITY;
+
+
+ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, 
char *buf)
+{
+   if (rfi_flush)
+   return sprintf(buf, "Mitigation: RFI Flush\n");
+
+   return sprintf(buf, "Vulnerable\n");
+}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index c388cc3357fa..c27557aff394 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -927,12 +927,4 @@ static __init int rfi_flush_debugfs_init(void)
 }
 device_initcall(rfi_flush_debugfs_init);
 #endif
-
-ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, 
char *buf)
-{
-   if (rfi_flush)
-   return sprintf(buf, "Mitigation: RFI Flush\n");
-
-   return sprintf(buf, "Vulnerable\n");
-}
 #endif /* CONFIG_PPC_BOOK3S_64 */
-- 
2.14.1

[RFC PATCH 4/6] powerpc/powernv: Set or clear security feature flags

[Michael Ellerman]

Now that we have feature flags for security related things, set or
clear them based on what we see in the device tree provided by
firmware.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/platforms/powernv/setup.c | 56 ++
 1 file changed, 56 insertions(+)

diff --git a/arch/powerpc/platforms/powernv/setup.c 
b/arch/powerpc/platforms/powernv/setup.c
index 092715b9674b..5f242b1bab01 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -38,9 +38,63 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "powernv.h"
 
+
+static bool fw_feature_is(const char *state, const char *name,
+ struct device_node *fw_features)
+{
+   struct device_node *np;
+   bool rc = false;
+
+   np = of_get_child_by_name(fw_features, name);
+   if (np) {
+   rc = of_property_read_bool(np, state);
+   of_node_put(np);
+   }
+
+   return rc;
+}
+
+static void init_fw_feat_flags(struct device_node *np)
+{
+   if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
+   security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
+
+   if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
+   security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
+
+   if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
+   security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
+
+   if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
+   security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
+
+   if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
+   security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
+
+   if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
+   security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
+
+   /*
+* The features below are enabled by default, so we instead look to see
+* if firmware has *disabled* them, and clear them if so.
+*/
+   if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
+   security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
+
+   if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
+   security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
+
+   if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
+   security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
+
+   if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", 
np))
+   security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
+}
+
 static void pnv_setup_rfi_flush(void)
 {
struct device_node *np, *fw_features;
@@ -56,6 +110,8 @@ static void pnv_setup_rfi_flush(void)
of_node_put(np);
 
if (fw_features) {
+   init_fw_feat_flags(fw_features);
+
np = of_get_child_by_name(fw_features, "inst-l1d-flush-trig2");
if (np && of_property_read_bool(np, "enabled"))
type = L1D_FLUSH_MTTRIG;
-- 
2.14.1

[RFC PATCH 3/6] powerpc/pseries: Set or clear security feature flags

[Michael Ellerman]

Now that we have feature flags for security related things, set or
clear them based on what we receive from the hypercall.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/platforms/pseries/setup.c | 43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/powerpc/platforms/pseries/setup.c 
b/arch/powerpc/platforms/pseries/setup.c
index 1a527625acf7..8ae04b586abe 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -68,6 +68,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "pseries.h"
 
@@ -459,6 +460,40 @@ static void __init find_and_init_phbs(void)
of_pci_check_probe_only();
 }
 
+static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
+{
+   if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
+   security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
+
+   if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
+   security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
+
+   if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
+   security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
+
+   if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
+   security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
+
+   if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
+   security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
+
+   if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
+   security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
+
+   /*
+* The features below are enabled by default, so we instead look to see
+* if firmware has *disabled* them, and clear them if so.
+*/
+   if (!(result->character & H_CPU_BEHAV_FAVOUR_SECURITY))
+   security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
+
+   if (!(result->character & H_CPU_BEHAV_L1D_FLUSH_PR))
+   security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
+
+   if (!(result->character & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
+   security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
+}
+
 static void pseries_setup_rfi_flush(void)
 {
struct h_cpu_char_result result;
@@ -471,6 +506,8 @@ static void pseries_setup_rfi_flush(void)
 
rc = plpar_get_cpu_characteristics();
if (rc == H_SUCCESS) {
+   init_cpu_char_feature_flags();
+
types = L1D_FLUSH_NONE;
 
if (result.character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
@@ -490,6 +527,12 @@ static void pseries_setup_rfi_flush(void)
types = L1D_FLUSH_FALLBACK;
}
 
+   /*
+* We're the guest so this doesn't apply to us, clear it to simplify
+* handling of it elsewhere.
+*/
+   security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
+
setup_rfi_flush(types, enable);
 }
 
-- 
2.14.1

[RFC PATCH 2/6] powerpc/pseries: Add new H_GET_CPU_CHARACTERISTICS flags

[Michael Ellerman]

Add some additional values which have been defined for the
H_GET_CPU_CHARACTERISTICS hypercall.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/include/asm/hvcall.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/include/asm/hvcall.h 
b/arch/powerpc/include/asm/hvcall.h
index eca3f9c68907..5a740feb7bd7 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -337,6 +337,9 @@
 #define H_CPU_CHAR_L1D_FLUSH_ORI30 (1ull << 61) // IBM bit 2
 #define H_CPU_CHAR_L1D_FLUSH_TRIG2 (1ull << 60) // IBM bit 3
 #define H_CPU_CHAR_L1D_THREAD_PRIV (1ull << 59) // IBM bit 4
+#define H_CPU_CHAR_BRANCH_HINTS_HONORED(1ull << 58) // IBM bit 5
+#define H_CPU_CHAR_THREAD_RECONFIG_CTRL(1ull << 57) // IBM bit 6
+#define H_CPU_CHAR_COUNT_CACHE_DISABLED(1ull << 56) // IBM bit 7
 
 #define H_CPU_BEHAV_FAVOUR_SECURITY(1ull << 63) // IBM bit 0
 #define H_CPU_BEHAV_L1D_FLUSH_PR   (1ull << 62) // IBM bit 1
-- 
2.14.1

[RFC PATCH 1/6] powerpc: Add security feature flags for Spectre/Meltdown

[Michael Ellerman]

This commit adds security feature flags to reflect the settings we
receive from firmware regarding Spectre/Meltdown mitigations.

The feature names reflect the names we are given by firmware on bare
metal machines. See the hostboot source for details.

Arguably these could be firmware features, but that then requires them
to be read early in boot so they're available prior to asm feature
patching, but we don't actually want to use them for patching. We may
also want to dynamically update them in future, which would be
incompatible with the way firmware features work (at the moment at
least). So for now just make them separate flags.

Signed-off-by: Michael Ellerman 
---
 arch/powerpc/include/asm/security_features.h | 65 
 arch/powerpc/kernel/Makefile |  2 +-
 arch/powerpc/kernel/security.c   | 14 ++
 3 files changed, 80 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/include/asm/security_features.h
 create mode 100644 arch/powerpc/kernel/security.c

diff --git a/arch/powerpc/include/asm/security_features.h 
b/arch/powerpc/include/asm/security_features.h
new file mode 100644
index ..3b690de8b0e8
--- /dev/null
+++ b/arch/powerpc/include/asm/security_features.h
@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Security related feature bit definitions.
+ *
+ * Copyright 2018, Michael Ellerman, IBM Corporation.
+ */
+
+#ifndef _ASM_POWERPC_SECURITY_FEATURES_H
+#define _ASM_POWERPC_SECURITY_FEATURES_H
+
+
+extern unsigned long powerpc_security_features;
+
+static inline void security_ftr_set(unsigned long feature)
+{
+   powerpc_security_features |= feature;
+}
+
+static inline void security_ftr_clear(unsigned long feature)
+{
+   powerpc_security_features &= ~feature;
+}
+
+static inline bool security_ftr_enabled(unsigned long feature)
+{
+   return !!(powerpc_security_features & feature);
+}
+
+
+// Features indicating support for Spectre/Meltdown mitigations
+
+// The L1-D cache can be flushed with ori r30,r30,0
+#define SEC_FTR_L1D_FLUSH_ORI300x0001ull
+
+// The L1-D cache can be flushed with mtspr 882,r0 (aka SPRN_TRIG2ull
+#define SEC_FTR_L1D_FLUSH_TRIG20x0002ull
+
+// ori r31,r31,0 acts as a speculation barrier
+#define SEC_FTR_SPEC_BAR_ORI31 0x0004ull
+
+// Speculation past bctr is disabled
+#define SEC_FTR_BCCTRL_SERIALISED  0x0008ull
+
+// Entries in L1-D are private to a SMT thread
+#define SEC_FTR_L1D_THREAD_PRIV0x0010ull
+
+// Indirect branch prediction cache disabled
+#define SEC_FTR_COUNT_CACHE_DISABLED   0x0020ull
+
+
+// Features indicating need for Spectre/Meltdown mitigations
+
+// The L1-D cache should be flushed on MSR[HV] 1->0 transition (hypervisor to 
guest)
+#define SEC_FTR_L1D_FLUSH_HV   0x0040ull
+
+// The L1-D cache should be flushed on MSR[PR] 0->1 transition (kernel to 
userspace)
+#define SEC_FTR_L1D_FLUSH_PR   0x0080ull
+
+// A speculation barrier should be used for bounds checks (Spectre variant 1ull
+#define SEC_FTR_BNDS_CHK_SPEC_BAR  0x0100ull
+
+// Firmware configuration indicates user favours security over performance
+#define SEC_FTR_FAVOUR_SECURITY0x0200ull
+
+#endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 1b6bc7fba996..d458c45e5004 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -42,7 +42,7 @@ obj-$(CONFIG_VDSO32)  += vdso32/
 obj-$(CONFIG_PPC_WATCHDOG) += watchdog.o
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)   += hw_breakpoint.o
 obj-$(CONFIG_PPC_BOOK3S_64)+= cpu_setup_ppc970.o cpu_setup_pa6t.o
-obj-$(CONFIG_PPC_BOOK3S_64)+= cpu_setup_power.o
+obj-$(CONFIG_PPC_BOOK3S_64)+= cpu_setup_power.o security.o
 obj-$(CONFIG_PPC_BOOK3S_64)+= mce.o mce_power.o
 obj-$(CONFIG_PPC_BOOK3E_64)+= exceptions-64e.o idle_book3e.o
 obj-$(CONFIG_PPC64)+= vdso64/
diff --git a/arch/powerpc/kernel/security.c b/arch/powerpc/kernel/security.c
new file mode 100644
index ..c62a5d7196e3
--- /dev/null
+++ b/arch/powerpc/kernel/security.c
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Security related flags and so on.
+//
+// Copyright 2018, Michael Ellerman, IBM Corporation.
+
+#include 
+
+
+unsigned long powerpc_security_features __read_mostly = \
+   SEC_FTR_L1D_FLUSH_HV | \
+   SEC_FTR_L1D_FLUSH_PR | \
+   SEC_FTR_BNDS_CHK_SPEC_BAR | \
+   SEC_FTR_FAVOUR_SECURITY;
-- 
2.14.1

Re: Build regressions/improvements in v4.16-rc3

[Christian Zigotzky]

Hi Geert,

The following patch should be in the commit 'kvm-ppc-next-4.16-2' [1]:

Fixes: accb757d798c ("KVM: Move vcpu_load to arch-specific 
kvm_arch_vcpu_ioctl_run")

Reported-by: Christian Zigotzky 
Signed-off-by: Paul Mackerras 
---
arch/powerpc/kvm/powerpc.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 403e642c78f5..0083142c2f84 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -1608,7 +1608,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, 
struct kvm_run *run)


kvm_sigset_deactivate(vcpu);

+#ifdef CONFIG_ALTIVEC
out:
+#endif
vcpu_put(vcpu);
return r;
}
--
2.11.0

Unfortunately I haven't found this patch in the 'kvm-ppc-next-4.16-2' [1]

@Paul
Could you please add this fix?

Thanks,
Christian

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?h=v4.16-rc3=1ab03c072feb579c9fd116de25be2b211e6bff6a



On 28 February 2018 at 12:29PM, Geert Uytterhoeven wrote:

On Wed, Feb 28, 2018 at 12:27 PM, Geert Uytterhoeven
 wrote:

JFYI, when comparing v4.16-rc3[1] to v4.16-rc2[3], the summaries are:
   - build errors: +1/-16

   + /home/kisskb/slave/src/arch/powerpc/kvm/powerpc.c: error: label
'out' defined but not used [-Werror=unused-label]:  => 1611:1

ppc64_defconfig+NO_ALTIVEC


[1] 
http://kisskb.ellerman.id.au/kisskb/head/4a3928c6f8a53fa1aed28ccba227742486e8ddcb/
 (268 out of 274 configs)
[3] 
http://kisskb.ellerman.id.au/kisskb/head/91ab883eb21325ad80f3473633f794c78ac87f51/
 (all 274 configs)

Gr{oetje,eeting}s,

 Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
 -- Linus Torvalds

Re: Build regressions/improvements in v4.16-rc3

[Geert Uytterhoeven]

On Wed, Feb 28, 2018 at 12:27 PM, Geert Uytterhoeven
 wrote:
> JFYI, when comparing v4.16-rc3[1] to v4.16-rc2[3], the summaries are:
>   - build errors: +1/-16

  + /home/kisskb/slave/src/arch/powerpc/kvm/powerpc.c: error: label
'out' defined but not used [-Werror=unused-label]:  => 1611:1

ppc64_defconfig+NO_ALTIVEC

> [1] 
> http://kisskb.ellerman.id.au/kisskb/head/4a3928c6f8a53fa1aed28ccba227742486e8ddcb/
>  (268 out of 274 configs)
> [3] 
> http://kisskb.ellerman.id.au/kisskb/head/91ab883eb21325ad80f3473633f794c78ac87f51/
>  (all 274 configs)

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Re: [PATCH v2] powerpc/npu: Cleanup MMIO ATSD flushing

[Balbir Singh]

On Wed, Feb 28, 2018 at 9:50 PM, Michael Ellerman  wrote:
> Alistair Popple  writes:
>
>>> @aneesh can you please look at this? @mpe can we pick this up if there
>>> are no objections?
>>
>> @mpe any objections to picking this up for this release? Or do you want to 
>> wait
>> for the next one? (there are likely more bugfixes coming for ATS support).
>
> I can grab it for this release if it's fixing a bug, the subject makes
> it sound like a cleanup. Do we have a Fixes tag for it?
>
> I don't particularly like the potentially very long loop in
> pnv_npu2_invalidate_helper() which spends most of its time with
> interrupts off. I worry we're going to see soft lockups pointing there
> if we get a very large invalidate.
>
We have the same loop today in pnv_npu2_mn_invalidate_range(). The bug
fix is really the fix to invalidate the right page size. I agree we
can optimize this better, in fact if the mmu notifier is made blocking
then we can even do cond_resched(). I however agree, the right thing
to do is to figure out the right trade-off of invalidate range size to
flushing the entire PID

Balbir Singh.

Re: [PATCH] selftests/vm: Update max va test to check for high address return.

[Kirill A. Shutemov]

On Wed, Feb 28, 2018 at 09:28:30AM +0530, Aneesh Kumar K.V wrote:
> mmap(-1,..) is expected to search from max supported VA top down. It should 
> find
> an address above ADDR_SWITCH_HINT. Explicitly check for this.

Hm. I don't think this correct. -1 means the application supports any
address, not restricted to 47-bit address space. It doesn't mean the
application *require* the address to be above 47-bit.

At least on x86, -1 just shift upper boundary of address range where we
can look for unmapped area.

-- 
 Kirill A. Shutemov

Re: [PATCH v2] powerpc/npu: Cleanup MMIO ATSD flushing

[Michael Ellerman]

Alistair Popple  writes:

>> @aneesh can you please look at this? @mpe can we pick this up if there
>> are no objections?
>
> @mpe any objections to picking this up for this release? Or do you want to 
> wait
> for the next one? (there are likely more bugfixes coming for ATS support).

I can grab it for this release if it's fixing a bug, the subject makes
it sound like a cleanup. Do we have a Fixes tag for it?

I don't particularly like the potentially very long loop in
pnv_npu2_invalidate_helper() which spends most of its time with
interrupts off. I worry we're going to see soft lockups pointing there
if we get a very large invalidate.

cheers

Re: powerpc/powernv/mce: Don't silently restart the machine

[Balbir Singh]

On Wed, Feb 28, 2018 at 8:49 PM, Michael Ellerman  wrote:
> Balbir Singh  writes:
>
>> On MCE the current code will restart the machine with
>> ppc_md.restart(). This case was extremely unlikely since
>> prior to that a skiboot call is made and that resulted in
>> a checkstop for analysis.
>>
>> With newer skiboots, on P9 we don't checkstop the box by
>> default, instead we return back to the kernel to extract
>> useful information at the time of the MCE. While we still
>> get this information, this patch converts the restart to
>> a panic(), so that if configured a dump can be taken and
>> we can track and probably debug the potential issue causing
>> the MCE.
>>
>> Signed-off-by: Balbir Singh 
>> Reviewed-by: Nicholas Piggin 
>> ---
>>  arch/powerpc/platforms/powernv/opal.c | 5 -
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/powerpc/platforms/powernv/opal.c 
>> b/arch/powerpc/platforms/powernv/opal.c
>> index 69b5263fc9e3..b510a6f41b00 100644
>> --- a/arch/powerpc/platforms/powernv/opal.c
>> +++ b/arch/powerpc/platforms/powernv/opal.c
>> @@ -500,9 +500,12 @@ void pnv_platform_error_reboot(struct pt_regs *regs, 
>> const char *msg)
> 
> ^^^
> Why don't we use the msg ..
>
>>*opal to trigger checkstop explicitly for error analysis.
>>*The FSP PRD component would have already got notified
>>*about this error through other channels.
>> +  * 4. We are running on a newer skiboot that by default does
>> +  *not cause a checkstop, drops us back to the kernel to
>> +  *extract context and state at the time of the error.
>>*/
>>
>> - ppc_md.restart(NULL);
>> + panic("PowerNV Unrecovered Machine Check");
>   ^
>   Here.
>
> Because we can get here from a HMI so it's confusing to print "Machine
> Check" in that case, and we have the msg already.
>
> So just:
>
>> + panic(msg);
>

My bad, we used to have two of these one in opal and opal-hmi and the
diff from the previous change showed this message. Resending

Thanks,
Balbir

Re: [PATCH 15/27] cpufreq: powerenv: Don't validate the frequency table twice

[Michael Ellerman]

Viresh Kumar  writes:

> On 26-02-18, 22:53, Michael Ellerman wrote:
>> Viresh Kumar  writes:
>> > Subject: Re: [PATCH 15/27] cpufreq: powerenv: Don't validate the frequency 
>> > table twice
>>^
>>   powernv
>> 
>> > The cpufreq core is already validating the CPU frequency table after
>> > calling the ->init() callback of the cpufreq drivers and the drivers
>> > don't need to do the same anymore. Though they need to set the
>> > policy->freq_table field directly from the ->init() callback now.
>> >
>> > Stop validating the frequency table from powerenv driver.
>
>  powernv :)
>
> Will fix both of them.

Thanks :)

cheers

Re: [PATCH V2] powerpc: Don't do runtime futex_cmpxchg test

[Michael Ellerman]

"Aneesh Kumar K.V"  writes:

> futex_detect_cmpxchg() does a cmpxchg_futex_value_locked on a NULL user addr 
> to
> runtime detect whether architecture implements atomic cmpxchg for futex. POWER
> do implement the feature and hence we can enable the config instead of 
> depending
> on runtime detection.
>
> We could possible enable this on everything. For now limitted to book3s_64
>
> Signed-off-by: Aneesh Kumar K.V 
> ---
>  arch/powerpc/platforms/Kconfig.cputype | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/powerpc/platforms/Kconfig.cputype 
> b/arch/powerpc/platforms/Kconfig.cputype
> index a429d859f15d..31bc2bd5dfd1 100644
> --- a/arch/powerpc/platforms/Kconfig.cputype
> +++ b/arch/powerpc/platforms/Kconfig.cputype
> @@ -75,6 +75,7 @@ config PPC_BOOK3S_64
>   select ARCH_SUPPORTS_NUMA_BALANCING
>   select IRQ_WORK
>   select HAVE_KERNEL_XZ
> + select HAVE_FUTEX_CMPXCHG if FUTEX
  
I'd rather it was under config PPC with an if BOOK3S_64 check. Just so
that all those top-level style configs are in once place.

eg.

config PPC
...
select HAVE_FUTEX_CMPXCHG if FUTEX && PPC_BOOK3S_64

cheers

Re: [PATCH v2] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate

[Michael Ellerman]

Alistair Popple  writes:

> When sending TLB invalidates to the NPU we need to send extra flushes due
> to a hardware issue. The original implementation would lock the all the
> ATSD MMIO registers sequentially before unlocking and relocking each of
> them sequentially to do the extra flush.
>
> This introduced a deadlock as it is possible for one thread to hold one
> ATSD register whilst waiting for another register to be freed while the
> other thread is holding that register waiting for the one in the first
> thread to be freed.
>
> For example if there are two threads and two ATSD registers:
>
> Thread A  Thread B
> Acquire 1
> Acquire 2
> Release 1 Acquire 1
> Wait 1Wait 2
>
> Both threads will be stuck waiting to acquire a register resulting in an
> RCU stall warning or soft lockup.
>
> This patch solves the deadlock by refactoring the code to ensure registers
> are not released between flushes and to ensure all registers are either
> acquired or released together and in order.
>
> Fixes: bbd5ff50afff ("powerpc/powernv/npu-dma: Add explicit flush when 
> sending an ATSD")
> Signed-off-by: Alistair Popple 
>
> ---
>
> v2: Added memory barriers around ->npdev[] and ATSD register 
> aquisition/release

Apologies to Balbir who was standing nearby when I read this patch this
afternoon and copped a bit of a rant as a result ...

But READ_ONCE/WRITE_ONCE are not memory barriers, they are only compiler
barriers.

So the READ_ONCE/WRITE_ONCE usage in here may be necessary, but it's
probably not sufficient, we probably *also* need actual memory barriers.

But I could be wrong, my main gripe is that the locking/ordering in here
is not very obvious.

> diff --git a/arch/powerpc/platforms/powernv/npu-dma.c 
> b/arch/powerpc/platforms/powernv/npu-dma.c
> index 0a253b64ac5f..2fed4b116e19 100644
> --- a/arch/powerpc/platforms/powernv/npu-dma.c
> +++ b/arch/powerpc/platforms/powernv/npu-dma.c
> @@ -726,7 +749,7 @@ struct npu_context *pnv_npu2_init_context(struct pci_dev 
> *gpdev,
>   if (WARN_ON(of_property_read_u32(nvlink_dn, "ibm,npu-link-index",
>   _index)))
>   return ERR_PTR(-ENODEV);
> - npu_context->npdev[npu->index][nvlink_index] = npdev;
> + WRITE_ONCE(npu_context->npdev[npu->index][nvlink_index], npdev);
  
When you're publishing a struct via a pointer you would typically have a
barrier between the stores that set the fields of the struct, and the
store that publishes the struct. Otherwise the reader can see a
partially setup struct.

I think here the npdev was setup somewhere else, and maybe there has
been an intervening barrier, but it's not clear. A comment at least
would be good.

In general I feel like a spinlock or two could significantly simply the
locking/ordering in this code, and given we're doing MMIOs anyway would
not affect performance.



cheers

Re: powerpc/powernv/mce: Don't silently restart the machine

[Michael Ellerman]

Balbir Singh  writes:

> On MCE the current code will restart the machine with
> ppc_md.restart(). This case was extremely unlikely since
> prior to that a skiboot call is made and that resulted in
> a checkstop for analysis.
>
> With newer skiboots, on P9 we don't checkstop the box by
> default, instead we return back to the kernel to extract
> useful information at the time of the MCE. While we still
> get this information, this patch converts the restart to
> a panic(), so that if configured a dump can be taken and
> we can track and probably debug the potential issue causing
> the MCE.
>
> Signed-off-by: Balbir Singh 
> Reviewed-by: Nicholas Piggin 
> ---
>  arch/powerpc/platforms/powernv/opal.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/platforms/powernv/opal.c 
> b/arch/powerpc/platforms/powernv/opal.c
> index 69b5263fc9e3..b510a6f41b00 100644
> --- a/arch/powerpc/platforms/powernv/opal.c
> +++ b/arch/powerpc/platforms/powernv/opal.c
> @@ -500,9 +500,12 @@ void pnv_platform_error_reboot(struct pt_regs *regs, 
> const char *msg)

^^^
Why don't we use the msg ..

>*opal to trigger checkstop explicitly for error analysis.
>*The FSP PRD component would have already got notified
>*about this error through other channels.
> +  * 4. We are running on a newer skiboot that by default does
> +  *not cause a checkstop, drops us back to the kernel to
> +  *extract context and state at the time of the error.
>*/
>  
> - ppc_md.restart(NULL);
> + panic("PowerNV Unrecovered Machine Check");
  ^
  Here.

Because we can get here from a HMI so it's confusing to print "Machine
Check" in that case, and we have the msg already.

So just:

> + panic(msg);

cheers

[PATCH] selftests/powerpc: Fix missing clean of pmu/lib.o

[Michael Ellerman]

The tm-resched-dscr test links against pmu/lib.o, but we don't have a
rule to clean pmu/lib.o. This can lead to a build break if you build
for big endian and then little, or vice versa.

Fix it by making tm-resched-dscr depend on pmu/lib.c, causing the code
to be built directly in, meaning no .o is generated.

Signed-off-by: Michael Ellerman 
---
 tools/testing/selftests/powerpc/tm/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/powerpc/tm/Makefile 
b/tools/testing/selftests/powerpc/tm/Makefile
index a23453943ad2..5c72ff978f27 100644
--- a/tools/testing/selftests/powerpc/tm/Makefile
+++ b/tools/testing/selftests/powerpc/tm/Makefile
@@ -16,7 +16,7 @@ $(OUTPUT)/tm-syscall: tm-syscall-asm.S
 $(OUTPUT)/tm-syscall: CFLAGS += -I../../../../../usr/include
 $(OUTPUT)/tm-tmspr: CFLAGS += -pthread
 $(OUTPUT)/tm-vmx-unavail: CFLAGS += -pthread -m64
-$(OUTPUT)/tm-resched-dscr: ../pmu/lib.o
+$(OUTPUT)/tm-resched-dscr: ../pmu/lib.c
 $(OUTPUT)/tm-unavailable: CFLAGS += -O0 -pthread -m64 -Wno-error=uninitialized 
-mvsx
 $(OUTPUT)/tm-trap: CFLAGS += -O0 -pthread -m64
 
-- 
2.14.1

Re: [PATCH] selftests/vm: Update max va test to check for high address return.

[Aneesh Kumar K.V]

"Aneesh Kumar K.V"  writes:

> mmap(-1,..) is expected to search from max supported VA top down. It should 
> find
> an address above ADDR_SWITCH_HINT. Explicitly check for this.
>
> Also derefer the address even if we failed the addr check.
>
> Signed-off-by: Aneesh Kumar K.V 

One issue I noticed is how to make this conditional so that we can still
run the test on x86 with 4 level page table?

> ---
>  tools/testing/selftests/vm/va_128TBswitch.c | 27 ---
>  1 file changed, 20 insertions(+), 7 deletions(-)
>
> diff --git a/tools/testing/selftests/vm/va_128TBswitch.c 
> b/tools/testing/selftests/vm/va_128TBswitch.c
> index e7fe734c374f..f68fa4bd8179 100644
> --- a/tools/testing/selftests/vm/va_128TBswitch.c
> +++ b/tools/testing/selftests/vm/va_128TBswitch.c
> @@ -44,6 +44,7 @@ struct testcase {
>   unsigned long flags;
>   const char *msg;
>   unsigned int low_addr_required:1;
> + unsigned int high_addr_required:1;
>   unsigned int keep_mapped:1;
>  };
>  
> @@ -108,6 +109,7 @@ static struct testcase testcases[] = {
>   .flags = MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(HIGH_ADDR)",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = HIGH_ADDR,
> @@ -115,12 +117,14 @@ static struct testcase testcases[] = {
>   .flags = MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(HIGH_ADDR) again",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = HIGH_ADDR,
>   .size = 2 * PAGE_SIZE,
>   .flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED,
>   .msg = "mmap(HIGH_ADDR, MAP_FIXED)",
> + .high_addr_required = 1,
>   },
>   {
>   .addr = (void *) -1,
> @@ -128,12 +132,14 @@ static struct testcase testcases[] = {
>   .flags = MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(-1)",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = (void *) -1,
>   .size = 2 * PAGE_SIZE,
>   .flags = MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(-1) again",
> + .high_addr_required = 1,
>   },
>   {
>   .addr = ((void *)(ADDR_SWITCH_HINT - PAGE_SIZE)),
> @@ -193,6 +199,7 @@ static struct testcase hugetlb_testcases[] = {
>   .flags = MAP_HUGETLB | MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(HIGH_ADDR, MAP_HUGETLB)",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = HIGH_ADDR,
> @@ -200,12 +207,14 @@ static struct testcase hugetlb_testcases[] = {
>   .flags = MAP_HUGETLB | MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(HIGH_ADDR, MAP_HUGETLB) again",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = HIGH_ADDR,
>   .size = HUGETLB_SIZE,
>   .flags = MAP_HUGETLB | MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED,
>   .msg = "mmap(HIGH_ADDR, MAP_FIXED | MAP_HUGETLB)",
> + .high_addr_required = 1,
>   },
>   {
>   .addr = (void *) -1,
> @@ -213,12 +222,14 @@ static struct testcase hugetlb_testcases[] = {
>   .flags = MAP_HUGETLB | MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(-1, MAP_HUGETLB)",
>   .keep_mapped = 1,
> + .high_addr_required = 1,
>   },
>   {
>   .addr = (void *) -1,
>   .size = HUGETLB_SIZE,
>   .flags = MAP_HUGETLB | MAP_PRIVATE | MAP_ANONYMOUS,
>   .msg = "mmap(-1, MAP_HUGETLB) again",
> + .high_addr_required = 1,
>   },
>   {
>   .addr = (void *)(ADDR_SWITCH_HINT - PAGE_SIZE),
> @@ -257,14 +268,16 @@ static int run_test(struct testcase *test, int count)
>   if (t->low_addr_required && p >= (void *)(ADDR_SWITCH_HINT)) {
>   printf("FAILED\n");
>   ret = 1;
> - } else {
> - /*
> -  * Do a dereference of the address returned so that we 
> catch
> -  * bugs in page fault handling
> -  */
> - memset(p, 0, t->size);
> + } else if (t->high_addr_required && p < (void 
> *)(ADDR_SWITCH_HINT)) {
> + printf("FAILED\n");
> + ret = 1;
> + } else
>   printf("OK\n");
> - }
> + /*
> +  * Do a dereference of the address returned so that we catch
> +  * bugs in page fault handling
> +  */
> + memset(p, 0, t->size);
>   if