Hello Nicholas,
On Fri, Aug 03, 2018 at 12:05:47AM +1000, Nicholas Piggin wrote:
> On Thu, 2 Aug 2018 10:21:32 +0530
> Akshay Adiga wrote:
>
> > From: Abhishek Goel
> >
> > If a state has "opal-supported" compat flag in device-tree, an opal call
> > needs to be made during the entry and exit
From: "Gautham R. Shenoy"
Each of the SMT4 cores forming a big-core are more or less independent
units. Thus when multiple tasks are scheduled to run on the fused
core, we get the best performance when the tasks are spread across the
pair of SMT4 cores.
This patch achieves this by setting the
From: "Gautham R. Shenoy"
On IBM POWER9, the device tree exposes a property array identifed by
"ibm,thread-groups" which will indicate which groups of threads share a
particular set of resources.
As of today we only have one form of grouping identifying the group of
threads in the core that
From: "Gautham R. Shenoy"
Hi,
This is the fifth iteration of the patchset to add support for
big-core on POWER9. This patch also optimizes the task placement on
such big-core systems.
The previous versions can be found here:
v5: https://lkml.org/lkml/2018/8/6/587
v4:
On 25/07/2018 19:50, Alexey Kardashevskiy wrote:
> I am trying to pass through a 3D controller:
> [0302]: NVIDIA Corporation GV100GL [Tesla V100 SXM2] [10de:1db1] (rev a1)
>
> which has a quite unique feature as coherent memory directly accessible
> from a POWER9 CPU via an NVLink2 transport.
On 08/08/2018 18:39, Alexey Kardashevskiy wrote:
>
>
> On 02/08/2018 02:16, Alex Williamson wrote:
>> On Wed, 1 Aug 2018 18:37:35 +1000
>> Alexey Kardashevskiy wrote:
>>
>>> On 01/08/2018 00:29, Alex Williamson wrote:
On Tue, 31 Jul 2018 14:03:35 +1000
Alexey Kardashevskiy wrote:
> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Wednesday, August 8, 2018 11:27 PM
> To: Bharat Bhushan ;
> b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au;
> ga...@kernel.crashing.org; mark.rutl...@arm.com;
> kstew...@linuxfoundation.org;
On 08/08/18 17:25, Michael Ellerman wrote:
> Christophe Leroy writes:
>> diff --git a/lib/test_hexdump.c b/lib/test_hexdump.c
>> index 3f415d8101f3..626f580b4ff7 100644
>> --- a/lib/test_hexdump.c
>> +++ b/lib/test_hexdump.c
>> @@ -32,16 +32,33 @@ static const char * const test_data_2_le[]
On Thu, 2018-08-09 at 08:13 +1000, Benjamin Herrenschmidt wrote:
> > For completeness, virtio could also have its own bounce buffer
> > outside of DMA API one. I don't see lots of benefits to this
> > though.
>
> Not fan of that either...
To elaborate a bit ...
For our secure VMs, we will need
On Thu, 2018-08-09 at 10:54 +1000, Benjamin Herrenschmidt wrote:
> On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> > These are identical to the arch specific ones, so remove them.
> >
> > Signed-off-by: Christoph Hellwig
>
> Acked-by: Benjamin Herrenschmidt
Note: We will still
On Thu, 09 Aug 2018 00:56:00 +1000
Michael Ellerman wrote:
> Mahesh J Salgaonkar writes:
> > From: Mahesh Salgaonkar
> >
> > Introduce recovery action for recovered memory errors (MCEs). There are
> > soft memory errors like SLB Multihit, which can be a result of a bad
> > hardware OR software
Mahesh J Salgaonkar writes:
> diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
> index 7f22929ce915..233d25ff6f64 100644
> --- a/arch/powerpc/include/asm/paca.h
> +++ b/arch/powerpc/include/asm/paca.h
> @@ -254,6 +254,10 @@ struct paca_struct {
> #endif
> #ifdef
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> The remaining implementation for coherent caches is functionally
> identical to the default provided in common code.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
>
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> The generic dma-noncoherent code provides all that is needed by powerpc.
>
> Note that the cache maintainance in the existing code is a bit odd
> as it implements both the sync_to_device and sync_to_cpu callouts,
> but never flushes
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> These are identical to the arch specific ones, so remove them.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/include/asm/dma-direct.h | 4
> arch/powerpc/include/asm/swiotlb.h
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> These do the same functionality as the existing helpers, but do it
> simpler, and also allow the (optional) use of CMA.
>
> Note that the swiotlb code now calls into the dma_direct code directly,
> given that it doesn't work with
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> These methods are optional to start with, no need to implement no-op
> versions.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/kernel/dma.c | 16
> 1 file changed, 16
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> The ppc32 case of dma_nommu_dma_supported already was a no-op, and the
> 64-bit case came to the same conclusion as dma_direct_supported, so
> replace it with the generic version.
It's not at all equivalent (see my review on your
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> Just fold the calculation into __phys_to_dma/__dma_to_phys as those are
> the only places that should know about it.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
>
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> Use the standard portable helper instead of the powerpc specific one,
> which is about to go away.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/kernel/dma-swiotlb.c | 5 ++---
>
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> The implemementation for the CONFIG_NOT_COHERENT_CACHE case doesn't share
> any code with the one for systems with coherent caches. Split it off
> and merge it with the helpers in dma-noncoherent.c that have no other
> callers.
>
>
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> The requirement to disable local irqs over kmap_atomic is long gone,
> so remove those calls.
Really ? I'm trying to verify that and getting lost in a mess of macros
from hell in the per-cpu stuff but if you look at our implementation
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/kernel/setup_32.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
>
On Tue, 2018-07-31 at 14:16 +0200, Christoph Hellwig wrote:
> It turns out cxl actually uses it. So for now skip this patch,
> although random code in drivers messing with dma ops will need to
> be sorted out sooner or later.
CXL devices are "special", they bypass the classic iommu in favor of
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> Signed-off-by: Christoph Hellwig
Acked-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/include/asm/dma-mapping.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/dma-mapping.h
>
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> We need to take the DMA offset and encryption bit into account when selecting
> a zone. Add a helper that takes those into account and use it.
That whole "encryption" stuff seems to be completely specific to the
way x86 does memory
On Mon, 2018-07-30 at 18:38 +0200, Christoph Hellwig wrote:
> When a device has a DMA offset the dma capable result will change due
> to the difference between the physical and DMA address. Take that into
> account.
The patch in itself makes sense.
However, there are a number of things in that
On Wed, Apr 11, 2018 at 02:35:46PM +0800, Ran Wang wrote:
> Also, unselect FSL_PMC which is for older platfroms instead.
>
> Signed-off-by: Ran Wang
> ---
> Changes in v2:
> - no change
>
> arch/powerpc/Kconfig |4 +---
> 1 files changed, 1 insertions(+), 3 deletions(-)
It's not
On Wed, Jul 18, 2018 at 02:46:50PM +0300, Camelia Groza wrote:
> The Cortina PHY requires the use of the dedicated Cortina PHY driver
> instead of the generic one.
>
> Signed-off-by: Camelia Groza
> ---
> arch/powerpc/boot/dts/fsl/t4240rdb.dts | 8
> 1 file changed, 4 insertions(+), 4
On Wed, 8 Aug 2018 22:22:52 +0200
Michal Suchánek wrote:
> On Fri, 3 Aug 2018 14:13:49 +1000
> Nicholas Piggin wrote:
>
> > The machine check code that flushes and restores bolted segments in
> > real mode belongs in mm/slb.c. This will be used by pseries machine
> > check and idle code.
> >
On Wed, 2018-08-08 at 23:31 +0300, Michael S. Tsirkin wrote:
> On Wed, Aug 08, 2018 at 11:18:13PM +1000, Benjamin Herrenschmidt wrote:
> > Sure, but all of this is just the configuration of the iommu. But I
> > think we agree here, and your point remains valid, indeed my proposed
> > hack:
> >
>
On 08/08/2018 04:57 AM, Dan Carpenter wrote:
> The problem is the the calculation should be "end - start + 1" but the
> plus one is missing in this calculation.
>
> Fixes: 8626816e905e ("powerpc: add support for MPIC message register API")
> Signed-off-by: Dan Carpenter
> ---
> Static analysis.
On Wed, Aug 08, 2018 at 11:18:13PM +1000, Benjamin Herrenschmidt wrote:
> Sure, but all of this is just the configuration of the iommu. But I
> think we agree here, and your point remains valid, indeed my proposed
> hack:
>
> > if ((flags & VIRTIO_F_IOMMU_PLATFORM) ||
On Fri, 3 Aug 2018 14:13:49 +1000
Nicholas Piggin wrote:
> The machine check code that flushes and restores bolted segments in
> real mode belongs in mm/slb.c. This will be used by pseries machine
> check and idle code.
>
> Signed-off-by: Nicholas Piggin
> ---
>
On Wed, 2018-08-08 at 06:28 +, Bharat Bhushan wrote:
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Wednesday, August 8, 2018 11:26 AM
> > To: Bharat Bhushan ;
> > b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au;
> >
Le 23/07/2018 à 17:07, Michael Ellerman a écrit :
Add a macro and some helper C functions for patching single asm
instructions.
The gas macro means we can do something like:
1: nop
patch_site 1b, patch__foo
Which is less visually distracting than defining a GLOBAL symbol at 1,
On Wed, 8 Aug 2018 21:07:11 +0530
"Aneesh Kumar K.V" wrote:
> On 08/08/2018 08:26 PM, Michael Ellerman wrote:
> > Mahesh J Salgaonkar writes:
> >> From: Mahesh Salgaonkar
> >>
> >> Introduce recovery action for recovered memory errors (MCEs).
> >> There are soft memory errors like SLB
Hi Leroy,
On 08/07/2018 03:57 PM, LEROY Christophe wrote:
> Breno Leitao a écrit :
>> On 08/07/2018 02:15 PM, Christophe LEROY wrote:
>>> Le 07/08/2018 à 15:35, Breno Leitao a écrit :
>>> I think it would be better to change 'reason' to 'unsigned long' instead of
>>> replacing it by regs->msr
I will update the header files 'of_private.h' and 'of.h' and repost.
Michael
On 08/08/2018 10:37 AM, Michael Bringmann wrote:
> On 08/08/2018 09:02 AM, Michael Ellerman wrote:
>> Michael Bringmann writes:
>>> diff --git a/arch/powerpc/platforms/pseries/mobility.c
>>>
On 08/08/2018 09:02 AM, Michael Ellerman wrote:
> Michael Bringmann writes:
>> diff --git a/arch/powerpc/platforms/pseries/mobility.c
>> b/arch/powerpc/platforms/pseries/mobility.c
>> index e245a88..efc9442 100644
>> --- a/arch/powerpc/platforms/pseries/mobility.c
>> +++
On 08/08/2018 08:26 PM, Michael Ellerman wrote:
Mahesh J Salgaonkar writes:
From: Mahesh Salgaonkar
Introduce recovery action for recovered memory errors (MCEs). There are
soft memory errors like SLB Multihit, which can be a result of a bad
hardware OR software BUG. Kernel can easily recover
huge_pte_offset_and_shift() has never existed
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/hugetlb.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/powerpc/include/asm/hugetlb.h
b/arch/powerpc/include/asm/hugetlb.h
index 3225eb6402cc..2d00cc530083 100644
---
When a PRRN event is being handled and another PRRN event comes in, the
second event will block rtas polling waiting on the first to complete,
preventing any further rtas events from being handled. This can be
especially problematic in case that PRRN events are continuously being
queued in which
While handling PRRN events, the time to handle the actual hotplug events
dwarfs the time it takes to perform the device tree updates and queue the
hotplug events. In the case that PRRN events are being queued continuously,
hotplug events have been observed to be queued faster than the kernel can
Stress testing has uncovered issues with handling continuously queued PRRN
events. Running PRRN events in this way can seriously load the system given
the sheer volume of dlpar being handled. This patchset ensures that PRRN
events are handled more synchronously, only allowing the PRRN handler to
Mahesh J Salgaonkar writes:
> From: Mahesh Salgaonkar
>
> Introduce recovery action for recovered memory errors (MCEs). There are
> soft memory errors like SLB Multihit, which can be a result of a bad
> hardware OR software BUG. Kernel can easily recover from these soft errors
> by flushing SLB
Michael Ellerman wrote:
Nicholas Piggin writes:
On Thu, 26 Jul 2018 23:01:51 +1000
Michael Ellerman wrote:
If we take an SLB miss while MSR[RI]=0 we can't recover and have to
oops. Currently this is reported by faking up a 0x4100 exception, eg:
Unrecoverable exception 4100 at 0
Oops:
Hi Mahesh,
A few nitpicks.
Mahesh J Salgaonkar writes:
> From: Mahesh Salgaonkar
>
> On pseries, the machine check error details are part of RTAS extended
> event log passed under Machine check exception section. This patch adds
> the definition of rtas MCE event section and related helper
>
On Tue, 2018-08-07 at 11:48:46 UTC, Michael Ellerman wrote:
> We recently added a warning in arch_local_irq_restore() to check that
> the soft masking state matches reality.
>
> Unfortunately it trips in a few places, which are not entirely trivial
> to fix. The key problem is if we're doing
On Mon, 2018-08-06 at 16:42:03 UTC, "Rodrigo R. Galvao" wrote:
> In Makefiles if we're testing a CONFIG_FOO symbol for equality with 'y'
> we can instead just use ifdef. The latter reads easily, so convert to
> it where possible.
>
> Signed-off-by: Rodrigo R. Galvao
> Reviewed-by: Mauro S. M.
On Fri, 2018-08-03 at 10:20:38 UTC, Parth Y Shah wrote:
> Resolved <"foo* bar" should be "foo *bar"> error
>
> Signed-off-by: Parth Y Shah
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/a0ac3687fb404d59296ecba4642071
cheers
On Sat, 2018-08-04 at 14:25:00 UTC, zhong jiang wrote:
> for_each_node_by_name iterators only exit normally when the loop
> cursor is NULL, So there is no point to call of_node_put.
>
> Signed-off-by: zhong jiang
> Reviewed-by: Tyrel Datwyler
Applied to powerpc next, thanks.
On Wed, 2018-08-01 at 21:33:15 UTC, Murilo Opsfelder Araujo wrote:
> Isolate the logic of printing unhandled signals out of _exception_pkey().
> No functional change, only code rearrangement.
>
> Signed-off-by: Murilo Opsfelder Araujo
Series applied to powerpc next, thanks.
On Fri, 2018-08-03 at 10:13:03 UTC, Paul Mackerras wrote:
> This aims to make the generation of exception table entries for the
> loads and stores in __copy_tofrom_user_base clearer and easier to
> verify. Instead of having a series of local labels on the loads and
> stores, with a series of
On Fri, 2018-07-27 at 23:06:39 UTC, Michael Ellerman wrote:
> From: Diana Craciun
>
> Currently only supported on powerpc.
>
> Signed-off-by: Diana Craciun
> Signed-off-by: Michael Ellerman
Applied to powerpc next.
https://git.kernel.org/powerpc/c/26cb1f36c43ee6e89d2a9f48a5a750
cheers
On Wed, 2018-08-01 at 09:01:10 UTC, Christophe Leroy wrote:
> This patch renames memcmp test to memcmp_64 and adds
> a memcmp_32 test for testing the 32 bits version of memcmp()
>
> Signed-off-by: Christophe Leroy
Series applied to powerpc next, thanks.
On Tue, 2018-07-31 at 12:08:41 UTC, Michael Ellerman wrote:
> Currently the alignment_handler test prints "Can't open /dev/fb0"
> about 80 times per run, which is a little annoying.
>
> Refactor it to check earlier if it can open /dev/fb0 and skip if not,
> this results in each test printing
On Fri, 2018-07-27 at 23:06:32 UTC, Michael Ellerman wrote:
> From: Diana Craciun
>
> The speculation barrier can be disabled from the command line
> with the parameter: "nospectre_v1".
>
> Signed-off-by: Diana Craciun
> Signed-off-by: Michael Ellerman
Series applied to powerpc next.
On Fri, 2018-07-27 at 11:48:17 UTC, Nicholas Piggin wrote:
> The page table fragment allocator uses the main page refcount racily
> with respect to speculative references. A customer observed a BUG due
> to page table page refcount underflow in the fragment allocator. This
> can be caused by the
On Thu, 2018-07-26 at 13:07:02 UTC, Michael Ellerman wrote:
> EXCEPTION_PROLOG_PSERIES() only has two users, STD_EXCEPTION_PSERIES()
> and STD_EXCEPTION_HV() both of which "call" SET_SCRATCH0(), so just
> move SET_SCRATCH0() into EXCEPTION_PROLOG_PSERIES().
>
> Signed-off-by: Michael Ellerman
On Thu, 2018-07-26 at 12:24:57 UTC, Michael Ellerman wrote:
> Some of our selftests have only been tested on ppc64le and crash or
> behave weirdly on ppc64/ppc32. So add a helper for checking the UTS
> machine.
>
> Signed-off-by: Michael Ellerman
Series applied to powerpc next.
On Thu, 2018-07-26 at 12:42:44 UTC, Michael Ellerman wrote:
> Because rfi_flush_fallback runs immediately before the return to
> userspace it currently runs with the user r1 (stack pointer). This
> means if we oops in there we will report a bad kernel stack pointer in
> the exception entry path,
On Wed, 2018-07-25 at 20:45:01 UTC, Darren Stevens wrote:
> Pasemi code still uses printk(KERN_ERR/KERN_WARN ... change these to
> pr_err(, pr_warn(... to match other powerpc arch code.
>
> No functional changes.
>
> Signed-off-by: Darren Stevens
Applied to powerpc next, thanks.
On Wed, 2018-07-25 at 20:55:18 UTC, Darren Stevens wrote:
> Pasemi arch code finds the root of the PCI-e bus by searching the
> device-tree for a node called 'pxp'. But the root bus has a
> compatible property of 'pasemi,rootbus' so search for that instead.
>
> Signed-off-by: Darren Stevens
>
On Wed, 2018-07-25 at 09:54:28 UTC, Nicholas Piggin wrote:
> The kernel page table caches are tied to init_mm, so there is no
> more need for them after userspace is finished.
>
> Signed-off-by: Nicholas Piggin
> Reviewed-by: Aneesh Kumar K.V
Applied to powerpc next, thanks.
On Wed, 2018-07-25 at 13:58:06 UTC, Nicholas Piggin wrote:
> When the mm is being torn down there will be a full PID flush so
> there is no need to flush the TLB on page size changes.
>
> Signed-off-by: Nicholas Piggin
> Reviewed-by: Aneesh Kumar K.V
Applied to powerpc next, thanks.
On Tue, 2018-07-24 at 14:03:46 UTC, Michael Ellerman wrote:
> This makes it easy to run checkpatch with settings that we have agreed
> on (bwhahahahah).
>
> Usage is eg:
>
> $ ./arch/powerpc/tools/checkpatch.sh -g origin/master..
>
> To check all commits since origin/master.
>
>
On Mon, 2018-07-23 at 15:07:52 UTC, Michael Ellerman wrote:
> Add a macro and some helper C functions for patching single asm
> instructions.
>
> The gas macro means we can do something like:
>
> 1: nop
> patch_site 1b, patch__foo
>
> Which is less visually distracting than defining a
On Sun, 2018-07-15 at 17:34:46 UTC, Randy Dunlap wrote:
> From: Randy Dunlap
>
> Fix build errors and warnings in t1042rdb_diu.c by adding header files
> and MODULE_LICENSE().
>
> ../arch/powerpc/platforms/85xx/t1042rdb_diu.c:152:1: warning: data definition
> has no type or storage class
>
On Wed, 2018-07-04 at 17:57:21 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> rtas_log_buf is a buffer to hold RTAS event data that are communicated
> to kernel by hypervisor. This buffer is then used to pass RTAS event
> data to user through proc fs. This buffer is allocated from
On Wed, 2018-07-04 at 17:57:02 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> The global mce data buffer that used to copy rtas error log is of 2048
> (RTAS_ERROR_LOG_MAX) bytes in size. Before the copy we read
> extended_log_length from rtas error log header, then use max of
>
On Wed, 2018-06-13 at 07:32:40 UTC, Haren Myneni wrote:
> NX increments readOffset by FIFO size in receive FIFO control register
> when CRB is read. But the index in RxFIFO has to match with the
> corresponding entry in FIFO maintained by VAS in kernel. Otherwise NX
> may be processing incorrect
On Wed, 2018-06-13 at 07:28:57 UTC, Haren Myneni wrote:
> Export opal_check_token symbol for modules to check the availability
> of OPAL calls before using them.
>
> Signed-off-by: Haren Myneni
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/6e708000ec2c93c2bde6a46aa2d6c3
On Fri, 2018-05-18 at 07:35:25 UTC, Anju T Sudhakar wrote:
> Call trace observed while running perf-fuzzer:
>
> [ 329.228068] CPU: 43 PID: 9088 Comm: perf_fuzzer Not tainted
> 4.13.0-32-generic #35~lp1746225
> [ 329.228070] task: c03f776ac900 task.stack: c03f77728000
> [ 329.228071]
On Thu, 2018-06-07 at 10:10:18 UTC, Christophe Leroy wrote:
> At the time being, when adding a new CPU for selection, both
> Kconfig.cputype and Makefile have to be modified.
>
> This patch moves into Kconfig.cputype the name of the CPU to me
> passed to the -mcpu= argument.
>
> Signed-off-by:
On Wed, 2018-04-11 at 05:18:00 UTC, Benjamin Herrenschmidt wrote:
> Those overly verbose statement in the setup of the pool VP
> aren't particularly useful (esp. considering we don't actually
> use the pool, we configure it bcs HW requires it only). So
> remove them which improves the code
On Wed, 2018-04-11 at 05:18:01 UTC, Benjamin Herrenschmidt wrote:
> It's identical to xive_teardown_cpu() so just use the latter
>
> Signed-off-by: Benjamin Herrenschmidt
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/e27e0a94651e30912443e88642e698
cheers
On Tue, 2018-04-10 at 07:16:10 UTC, Benjamin Herrenschmidt wrote:
> For (bad) historical reasons, OPAL used to create a non-standard pair of
> properties "opal-interrupts" and "opal-interrupts-names" for representing
> the list of interrupts it wants Linux to request on its behalf.
>
> Among
Nicholas Piggin writes:
> On Thu, 26 Jul 2018 23:01:51 +1000
> Michael Ellerman wrote:
>
>> If we take an SLB miss while MSR[RI]=0 we can't recover and have to
>> oops. Currently this is reported by faking up a 0x4100 exception, eg:
>>
>> Unrecoverable exception 4100 at 0
>> Oops:
Diana Madalina Craciun writes:
> Hi Michael,
>
> Sorry for the late answer, I was out of the office last week.
>
> It looks fine to me, I have tested the patches on NXP PowerPC Book 3E
> platforms and it worked well.
Thanks.
cheers
Michael Bringmann writes:
> diff --git a/arch/powerpc/platforms/pseries/mobility.c
> b/arch/powerpc/platforms/pseries/mobility.c
> index e245a88..efc9442 100644
> --- a/arch/powerpc/platforms/pseries/mobility.c
> +++ b/arch/powerpc/platforms/pseries/mobility.c
> @@ -22,6 +22,9 @@
> #include
>
"Robert P. J. Day" writes:
> given that there are no .dts files in the current kernel code base
> that define the node name "/chosen@0" instead of the proper "/chosen",
A good portion of PPC machines get their device tree from firmware, not
from a dts that's in the kernel tree, so that's not a
Catalin Marinas writes:
> On Wed, 11 Jul 2018 at 00:40, Benjamin Herrenschmidt
> wrote:
>> On Tue, 2018-07-10 at 17:17 +0200, Paul Menzel wrote:
>> > On a the IBM S822LC (8335-GTA) with Ubuntu 18.04 I built Linux master
>> > – 4.18-rc4+, commit 092150a2 (Merge branch 'for-linus'
>> > of
John Allen writes:
> On Wed, Aug 01, 2018 at 11:16:22PM +1000, Michael Ellerman wrote:
>>John Allen writes:
>>> On Mon, Jul 23, 2018 at 11:41:24PM +1000, Michael Ellerman wrote:
John Allen writes:
> While handling PRRN events, the time to handle the actual hotplug events
>
On Wed, 2018-08-08 at 05:30 -0700, Christoph Hellwig wrote:
> On Wed, Aug 08, 2018 at 08:07:49PM +1000, Benjamin Herrenschmidt wrote:
> > Qemu virtio bypasses that iommu when the VIRTIO_F_IOMMU_PLATFORM flag
> > is not set (default) but there's nothing in the device-tree to tell the
> > guest
Today, when stack size is set to unlimited (ulimit -s unlimited),
mmap() doesn't randomise the stack address returned by mmap()
This patch fixes it by applying the random factor on
TASK_UNMAPPED_BASE when setting mm->mmap_base
Link: https://github.com/linuxppc/linux/issues/59
Signed-off-by:
Michael Ellerman writes:
> Andrew Morton writes:
>> On Mon, 6 Aug 2018 12:39:21 +0200 Geert Uytterhoeven
>> wrote:
>>
>>> CC Dan, Michael, AKPM, powerpc
>>>
>>> On Mon, Apr 16, 2018 at 3:10 PM Geert Uytterhoeven
>>> wrote:
>>> > Below is the list of build error/warning
On Wed, Aug 08, 2018 at 08:07:49PM +1000, Benjamin Herrenschmidt wrote:
> Qemu virtio bypasses that iommu when the VIRTIO_F_IOMMU_PLATFORM flag
> is not set (default) but there's nothing in the device-tree to tell the
> guest about this since it's a violation of our pseries architecture, so
> we
On Wed, Aug 8, 2018 at 12:32 PM Michael Ellerman wrote:
> Also I haven't been seeing this in my local builds because I have:
>
> CONFIG_LD_DEAD_CODE_DATA_ELIMINATION=y
>
> So I guess we need to work out why that's interfering with section
> mismatch analysis.
One other common case of missing
On Wed, 2018-08-08 at 06:37 +, Christophe Leroy wrote:
> On a big endian cpu, test_hexdump fails as follows. The logs show
> that bytes are expected in reversed order.
>
> [...]
> [ 16.643648] test_hexdump: Len: 24 buflen: 130 strlen: 97
> [ 16.648681] test_hexdump: Result: 97 'be32db7b
The problem is the the calculation should be "end - start + 1" but the
plus one is missing in this calculation.
Fixes: 8626816e905e ("powerpc: add support for MPIC message register API")
Signed-off-by: Dan Carpenter
---
Static analysis. Not tested.
diff --git a/arch/powerpc/sysdev/mpic_msgr.c
On Wed, Aug 8, 2018 at 12:34 PM Michael Ellerman wrote:
>
> Andrew Morton writes:
> > On Mon, 6 Aug 2018 12:39:21 +0200 Geert Uytterhoeven
> > wrote:
> >
> >> CC Dan, Michael, AKPM, powerpc
> >>
> >> On Mon, Apr 16, 2018 at 3:10 PM Geert Uytterhoeven
> >> wrote:
> >> > Below is the list of
Hi guys,
On 08.08.2018 11:29, Geert Uytterhoeven wrote:
> [...]
> Acked-by: Geert Uytterhoeven
>
> However, recently Dominik (CC) send me an enquiry about it, so perhaps
> he is a happy user?
Nope - don't have one either, so go ahead :)
Regards,
Dominik
Andrew Morton writes:
> On Mon, 6 Aug 2018 12:39:21 +0200 Geert Uytterhoeven
> wrote:
>
>> CC Dan, Michael, AKPM, powerpc
>>
>> On Mon, Apr 16, 2018 at 3:10 PM Geert Uytterhoeven
>> wrote:
>> > Below is the list of build error/warning regressions/improvements in
>> > v4.17-rc1[1] compared to
On Tue, 2018-08-07 at 23:31 -0700, Christoph Hellwig wrote:
>
> You don't need to set them the time you go secure. You just need to
> set the flag from the beginning on any VM you might want to go secure.
> Or for simplicity just any VM - if the DT/ACPI tables exposed by
> qemu are good enough
With dynamic memory allocation support for crash memory ranges array,
there is no hard limit on the no. of crash memory ranges kernel could
export, but program headers count could overflow in the /proc/vmcore
ELF file while exporting each memory range as PT_LOAD segment. Reduce
the likelihood of a
Crash memory ranges is an array of memory ranges of the crashing kernel
to be exported as a dump via /proc/vmcore file. The size of the array
is set based on INIT_MEMBLOCK_REGIONS, which works alright in most cases
where memblock memory regions count is less than INIT_MEMBLOCK_REGIONS
value. But
On Wednesday 08 August 2018 02:38 PM, Mahesh Jagannath Salgaonkar wrote:
On 08/07/2018 02:12 AM, Hari Bathini wrote:
With dynamic memory allocation support for crash memory ranges array,
there is no hard limit on the no. of crash memory ranges kernel could
export, but program headers count
Hi Michael,
On Fri, Jul 27, 2018 at 7:36 AM Michael Ellerman wrote:
> When the OF code was originally made common by Grant in commit
> 51975db0b733 ("of/flattree: merge early_init_dt_scan_memory() common
> code") (Feb 2010), the common code inherited a hack to handle
> PPC "longtrail" machines,
Hello Michael,
I haven't reached Darren yet but I try to help a little bit.
On 03 May 2018 at 3:06PM, Michael Ellerman wrote:
Darren Stevens writes:
diff --git a/arch/powerpc/platforms/pasemi/setup.c
b/arch/powerpc/platforms/pasemi/setup.c
index c4a3e93..c583c17 100644
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