Le 22/02/2019 à 08:14, Stephen Rothwell a écrit :
Hi all,
After merging the powerpc tree, today's linux-next build (powerpc
allyesconfig) failed like this:
make[4]: *** No rule to make target 'arch/powerpc/mm/ptdump/core.o', needed by
'arch/powerpc/mm/ptdump/built-in.a'.
Caused by commit
Hi all,
After merging the powerpc tree, today's linux-next build (powerpc
allyesconfig) failed like this:
make[4]: *** No rule to make target 'arch/powerpc/mm/ptdump/core.o', needed by
'arch/powerpc/mm/ptdump/built-in.a'.
Caused by commit
5df1cfa43394 ("powerpc: Move page table dump files in
This adds emulation support for the following integer instructions:
* Modulo Signed Doubleword (modsd)
* Modulo Unsigned Doubleword (modud)
Signed-off-by: Sandipan Das
---
arch/powerpc/lib/sstep.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/pow
From: PrasannaKumar Muralidharan
This adds emulation support for the following integer instructions:
* Modulo Signed Word (modsw)
* Modulo Unsigned Word (moduw)
Signed-off-by: PrasannaKumar Muralidharan
Signed-off-by: Sandipan Das
---
arch/powerpc/lib/sstep.c | 14 ++
1 file c
This adds emulation support for the following integer instructions:
* Extend-Sign Word and Shift Left Immediate (extswsli[.])
Signed-off-by: Sandipan Das
---
arch/powerpc/lib/sstep.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib
This adds emulation support for the following integer instructions:
* Count Trailing Zeros Word (cnttzw[.])
* Count Trailing Zeros Doubleword (cnttzd[.])
Signed-off-by: Sandipan Das
---
arch/powerpc/lib/sstep.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/
This adds emulation support for the following integer instructions:
* Deliver A Random Number (darn)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using inline assembly to retain compatibility
with older binutils.
Signed-off-by: Sandipan Das
---
arch/
This adds emulation support for the following integer instructions:
* Multiply-Add High Doubleword (maddhd)
* Multiply-Add High Doubleword Unsigned (maddhdu)
* Multiply-Add Low Doubleword (maddld)
As suggested by Michael, this uses a raw .long for specifying the
instruction word when using i
This series adds emulation support for some additional ISA 3.0
instructions, most of which are now generated by a recent compiler
(e.g. gcc-8.x) when building the kernel with CONFIG_POWER9_CPU=y.
Changelog:
v1 -> v2:
- Use a conservative approach when using the multiply-add and
darn in
Hi Michael,
On 21/02/19 4:43 PM, Michael Ellerman wrote:
> Sandipan Das writes:
>> This enhances the current selftest framework for validating
>> the in-kernel instruction emulation infrastructure by adding
>> support for compute type instructions i.e. integer ALU-based
>> instructions. Originall
On Fri, Feb 22, 2019 at 03:31:57PM +1100, Oliver wrote:
> On Fri, Feb 22, 2019 at 2:24 PM Sam Bobroff wrote:
> >
> > Hey all,
> >
> > After some consideration, I've decided to post a v2 of this patch that
> > will make it a bit safer (although I haven't seen any problems with it)
> > and make it a
Russell Currey's on February 21, 2019 7:36 pm:
> Kernel Userspace Access Prevention utilises a feature of the Radix MMU
> which disallows read and write access to userspace addresses. By
> utilising this, the kernel is prevented from accessing user data from
> outside of trusted paths that perform
On Fri, Feb 22, 2019 at 2:24 PM Sam Bobroff wrote:
>
> Hey all,
>
> After some consideration, I've decided to post a v2 of this patch that
> will make it a bit safer (although I haven't seen any problems with it)
> and make it a little easier to refactor some of the EEH code that
> interacts with
Kees Cook writes:
> On Thu, Feb 21, 2019 at 4:09 PM Russell Currey wrote:
>> On Thu, 2019-02-21 at 08:07 -0800, Kees Cook wrote:
>> > On Thu, Feb 21, 2019 at 1:36 AM Russell Currey
>> > wrote:
>> > > The first three patches of these series are from Christophe's work
>> > > and are
>> > > the bar
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the powerpc tree got a conflict in:
>
> arch/powerpc/kernel/dma-swiotlb.c
>
> between commit:
>
> cfced786969c ("dma-mapping: remove the default map_resource implementation")
>
> from the dma-mapping tree and commit:
>
> 680
On 02/21/2019 09:14 AM, Will Deacon wrote:
> On Wed, Feb 13, 2019 at 05:00:17PM -0500, Waiman Long wrote:
>> Modify __down_read_trylock() to optimize for an unlocked rwsem and make
>> it generate slightly better code.
>>
>> Before this patch, down_read_trylock:
>>
>>0x <+0>:
Hey all,
After some consideration, I've decided to post a v2 of this patch that
will make it a bit safer (although I haven't seen any problems with it)
and make it a little easier to refactor some of the EEH code that
interacts with the hooks.
Cheers,
Sam.
On Thu, Feb 14, 2019 at 04:14:42PM +110
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the swiotlb tree got a conflict in:
>
> kernel/dma/swiotlb.c
>
> between commit:
>
> feee96440c9c ("swiotlb: remove swiotlb_dma_supported")
>
> from the powerpc tree and commit:
>
> 71602fe6d4e9 ("swiotlb: add debugfs to trac
Hi Andrew,
> kcov provides kernel coverage data that's useful for fuzzing tools like
> syzkaller.
>
> Wire up kcov support on powerpc. Disable kcov instrumentation on the same
> files where we currently disable gcov and UBSan instrumentation, plus some
> additional exclusions which appear necessar
On 21/02/2019 17:26, Michael Ellerman wrote:
> Alexey Kardashevskiy writes:
>
>> The anon fd's ops releases the KVM reference in the release hook.
>> However we reference the KVM object after we create the fd so there is
>> small window when the release function can be called and
>> dereferenc
From: Michael Ellerman
In cpufeatures_process_feature(), if a provided CPU feature is unknown and
enable_unknown is false, we erroneously print that the feature is being
enabled and return true, even though no feature has been enabled, and
may also set feature bits based on the last entry in the
kcov provides kernel coverage data that's useful for fuzzing tools like
syzkaller.
Wire up kcov support on powerpc. Disable kcov instrumentation on the same
files where we currently disable gcov and UBSan instrumentation, plus some
additional exclusions which appear necessary to boot on book3e mac
Hi all,
Today's linux-next merge of the swiotlb tree got a conflict in:
kernel/dma/swiotlb.c
between commit:
feee96440c9c ("swiotlb: remove swiotlb_dma_supported")
from the powerpc tree and commit:
71602fe6d4e9 ("swiotlb: add debugfs to track swiotlb buffer usage")
from the swiotlb tre
On Thu, Feb 21, 2019 at 4:09 PM Russell Currey wrote:
> On Thu, 2019-02-21 at 08:07 -0800, Kees Cook wrote:
> > On Thu, Feb 21, 2019 at 1:36 AM Russell Currey
> > wrote:
> > > The first three patches of these series are from Christophe's work
> > > and are
> > > the bare minimum framework needed
On Thu, 2019-02-21 at 14:48 +, Mark Rutland wrote:
> On Thu, Feb 21, 2019 at 11:46:06AM +0100, Christophe Leroy wrote:
> >
> > Le 21/02/2019 à 10:35, Russell Currey a écrit :
> > > From: Christophe Leroy
> > >
> > > This patch implements a framework for Kernel Userspace Access
> > > Protecti
On Thu, 2019-02-21 at 08:07 -0800, Kees Cook wrote:
> On Thu, Feb 21, 2019 at 1:36 AM Russell Currey
> wrote:
> > The first three patches of these series are from Christophe's work
> > and are
> > the bare minimum framework needed to implement the support for
> > radix.
> >
> > In patch 3, I have
Hi all,
Today's linux-next merge of the powerpc tree got a conflict in:
kernel/dma/Kconfig
between commits:
ff4c25f26a71 ("dma-mapping: improve selection of dma_declare_coherent
availability")
from the dma-mapping tree and commit:
11ddce15451e ("dma-mapping, powerpc: simplify the arch
Hi all,
Today's linux-next merge of the powerpc tree got a conflict in:
arch/powerpc/kernel/dma.c
between commit:
cfced786969c ("dma-mapping: remove the default map_resource implementation")
from the dma-mapping tree and commit:
68005b67d15a ("powerpc/dma: use the generic direct mapping
On Thu, Feb 21, 2019 at 08:48:41AM +0530, Souptick Joarder wrote:
> Hi Ira,
>
> On Wed, Feb 20, 2019 at 11:01 AM wrote:
> >
> > From: Ira Weiny
> >
> > To facilitate additional options to get_user_pages_fast() change the
> > singular write parameter to be gup_flags.
> >
> > This patch does not c
Hi all,
Today's linux-next merge of the powerpc tree got a conflict in:
arch/powerpc/kernel/dma-swiotlb.c
between commit:
cfced786969c ("dma-mapping: remove the default map_resource implementation")
from the dma-mapping tree and commit:
68005b67d15a ("powerpc/dma: use the generic direct
Quote from the ssi manual:
"The word length is fixed to 32 in I2S Master mode and
the WL bits determine the number of bits that will
contain valid data (out of the 32 transmitted/received
bits in each channel)."
(61.8.1.4, page 5138, IMX6DQRM Rev. 3, 07/2015)
In other words, in i2s master mode, we
Michael S. Tsirkin writes:
> On Mon, Jan 21, 2019 at 11:29:05AM +, Jean-Philippe Brucker wrote:
>> Hi,
>>
>> On 18/01/2019 15:51, Michael S. Tsirkin wrote:
>> >
>> > On Tue, Jan 15, 2019 at 12:19:52PM +, Jean-Philippe Brucker wrote:
>> >> Implement the virtio-iommu driver, following spe
On 8xx, large pages (512kb or 8M) are used to map kernel linear
memory. Aligning to 8M reduces TLB misses as only 8M pages are used
in that case. We make 8M the default for data.
This patchs allows the user to do it via Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig
This patch implements handling of STRICT_KERNEL_RWX with
large TLBs directly in the TLB miss handlers.
To do so, etext and sinittext are aligned on 512kB boundaries
and the miss handlers use 512kB pages instead of 8Mb pages for
addresses close to the boundaries.
It sets RO PP flags for addresses
Depending on the number of available BATs for mapping the different
kernel areas, it might be needed to increase the alignment of _etext
and/or of data areas.
This patchs allows the user to do it via Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 32
Today, STRICT_KERNEL_RWX is based on the use of regular pages
to map kernel pages.
On Book3s 32, it has three consequences:
- Using pages instead of BAT for mapping kernel linear memory severely
impacts performance.
- Exec protection is not effective because no-execute cannot be set at
page level
setibat() and clearibat() allows to manipulate IBATs independently
of DBATs.
update_bats() allows to update bats after init. This is done
with MMU off.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/32/mmu-hash.h | 2 ++
arch/powerpc/kernel/head_32.S | 35 +
CONFIG_STRICT_KERNEL_RWX requires a special alignment
for DATA for some subarches. Today it is just defined
as an #ifdef in vmlinux.lds.S
In order to get more flexibility, this patch moves the
definition of this alignment in Kconfig
On some subarches, CONFIG_STRICT_KERNEL_RWX will
require a speci
This patch defined CONFIG_PPC_PAGE_SHIFT in order
to be able to use PAGE_SHIFT value inside Kconfig.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig| 7 +++
arch/powerpc/include/asm/page.h | 13 ++---
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git
Add a helper to know whether STRICT_KERNEL_RWX is enabled.
This is based on rodata_enabled flag which is defined only
when CONFIG_STRICT_KERNEL_RWX is selected.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/mmu.h | 11 +++
arch/powerpc/mm/init_32.c | 4 +---
2 files
This patch add an helper which wraps 'mtsrin' instruction
to write into segment registers.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/reg.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 1c98ef1f2d5
Do not set IBAT when setbat() is called without _PAGE_EXEC
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/ppc_mmu_32.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 5fc59b195fef..ff8580c6ab11
wii_mmu_mapin_mem2() is not used anymore, remove it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/platforms/embedded6xx/wii.c | 28
1 file changed, 28 deletions(-)
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c
b/arch/powerpc/platforms/embedded6xx/wii.c
When CONFIG_BDI_SWITCH is set, the page tables have to be populated
allthough large TLBs are used, because the BDI switch knows nothing
about those large TLBs which are handled directly in TLB miss logic.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 5 -
1 file changed,
Now that mmu_mapin_ram() is able to handle other blocks
than the one starting at 0, the WII can use it for all
its blocks.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/powerp
This patch reworks mmu_mapin_ram() to be more generic and map as much
blocks as possible. It now supports blocks not starting at address 0.
It scans DBATs array to find free ones instead of forcing the use of
BAT2 and BAT3.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/ppc_mmu_32.c | 63 +
At the time being, mmu_mapin_ram() always maps RAM from the beginning.
But some platforms like the WII have to map a second block of RAM.
This patch adds to mmu_mapin_ram() the base address of the block.
At the moment, only base address 0 is supported.
Signed-off-by: Christophe Leroy
---
arch/p
The purpose of this serie is to:
- use BATs with STRICT_KERNEL_RWX on book3s (See patch 13 for details.)
- use LTLBs with STRICT_KERNEL_RWX on 8xx (See patch 15 for a few details.)
v5:
- Changed var type from unsigned long to phys_addr_t in mapin_ram()
to fix build failure due to type mismatch in
'nobats' kernel parameter or some options like CONFIG_DEBUG_PAGEALLOC
deny the use of BATS for mapping memory.
This patch makes sure that the specific wii RAM mapping function
takes it into account as well.
Fixes: de32400dd26e ("wii: use both mem1 and mem2 as ram")
Cc: sta...@vger.kernel.org
Revi
On 02/21/2019 01:51 PM, Michael Ellerman wrote:
Christophe Leroy writes:
Now that mmu_mapin_ram() is able to handle other blocks
than the one starting at 0, the WII can use it for all
its blocks.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 27 +
With backup area support available for FADump on PowerNV platform,
update FADump documentation with these details.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 71 +-
1 file changed, 43 insertions(+), 28 deletions(-)
diff --git a/Docum
OPAL loads kernel & initrd at 512MB offset (256MB size), also exported
as ibm,opal/dump/fw-load-area. So, if boot memory size of FADump is
less than 768MB, kernel memory to be exported as '/proc/vmcore' would
be overwritten by f/w while loading kernel & initrd. To avoid such a
scenario, enforce a m
Firmware provides architected register state data but it doesn't have
corresponding logical CPU number used in the kernel. So, populate a
backup area storing logical CPU number and PIR values while registering
FADump and use it to correlate the register state data to corresponding
logical CPU while
With /proc/opalcore support available on OPAL based machines and an
option to release memory used by kernel in exporting /proc/opalcore,
update FADump documentation with these details.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 19 +++
1
Writing '1' to /sys/kernel/fadump_release_opalcore would release the
memory held by kernel in exporting /proc/opalcore file.
Signed-off-by: Hari Bathini
---
arch/powerpc/platforms/powernv/opal-core.c | 39
1 file changed, 39 insertions(+)
diff --git a/arch/powerpc
If OPAL crashes when the kernel is not registered for FADump, F/W still
exports OPAL core through result-table DT node. Make sure '/proc/vmcore'
processing is skipped as only data relevant to OPAL core is exported in
such scenario.
Signed-off-by: Hari Bathini
---
arch/powerpc/platforms/powernv/o
Commit 0962e8004e97 ("powerpc/prom: Scan reserved-ranges node for
memory reservations") enabled support to parse 'reserved-ranges' DT
node to reserve kernel memory falling in these ranges for firmware
purposes. Along with the preserved area memory, also ensure memory
in reserved ranges is not overl
From: Hari Bathini
Export /proc/opalcore file to analyze opal crashes. Since opalcore can
be generated independent of CONFIG_FA_DUMP support in kernel, add this
support under a new kernel config option CONFIG_OPAL_CORE. Also, avoid
code duplication by moving common code used for processing the re
Kernel config option CONFIG_PRESERVE_FA_DUMP is introduced to ensure
crash data, from previously crash'ed kernel, is preserved. Update
documentation with this details.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt |9 +
1 file changed, 9 insertions(
Add a new kernel config option, CONFIG_PRESERVE_FA_DUMP that ensures
that crash data, from previously crash'ed kernel, is preserved. This
helps in cases where FADump is not enabled but the subsequent memory
preserving kernel boot is likely to process this crash data. One
typical usecase for this co
Commit 0962e8004e97 ("powerpc/prom: Scan reserved-ranges node for
memory reservations") enabled support to parse reserved-ranges DT
node and reserve kernel memory falling in these ranges for F/W
purposes. Ensure memory in these ranges is not overlapped with
memory reserved for FADump.
Also, use a
From: Hari Bathini
Firmware provides architected register state data at the time of crash.
Process this data and build CPU notes to append to ELF core.
Signed-off-by: Hari Bathini
Signed-off-by: Vasant Hegde
---
arch/powerpc/include/asm/opal-api.h | 23 +++
arch/powerpc/kernel/fadu
With FADump support now available on both pseries and OPAL platforms,
update FADump documentation with these details.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 90 --
1 file changed, 51 insertions(+), 39 deletions(-)
diff --git a/Do
From: Hari Bathini
Firmware-assisted dump support is enabled for OPAL based POWER platforms
in P9 firmware. Make the corresponding updates in kernel to enable fadump
support for such platforms.
Signed-off-by: Hari Bathini
---
arch/powerpc/Kconfig|5
arch/powerp
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 56 +++---
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/Documentation/powerpc/firmware-assisted-dump.txt
b/Documentation/powerpc/firmware-assisted-dump.txt
index 059993b..62e75
The figures depicting FADump's (Firmware-Assisted Dump) memory layout
are missing some finer details like different memory regions and what
they represent. Improve the documentation by updating those details.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 65
Introduce callbacks for platform specific operations like register,
unregister, invalidate & such, and move pseries specific code into
platform code.
Signed-off-by: Hari Bathini
---
arch/powerpc/include/asm/fadump.h | 75 ---
arch/powerpc/kernel/fadump.c| 501
Firmware-Assisted Dump (FADump) is currently supported only on pseries
platform. This patch series adds support for powernv platform too.
The first and third patches refactor the FADump code to make use of common
code across multiple platforms. The fifth patch adds basic FADump support
for powernv
Refactoring fadump code means internal fadump code is referenced from
different places. For ease, move internal code to a new file.
Signed-off-by: Hari Bathini
---
arch/powerpc/include/asm/fadump.h | 112 ---
arch/powerpc/kernel/Makefile |2
arch/powerpc/kernel
On Thu, Feb 21, 2019 at 1:36 AM Russell Currey wrote:
> The first three patches of these series are from Christophe's work and are
> the bare minimum framework needed to implement the support for radix.
>
> In patch 3, I have removed from Christophe's patch my implementation of
> the 64-bit except
Le 21/02/2019 à 14:51, Michael Ellerman a écrit :
Christophe Leroy writes:
Now that mmu_mapin_ram() is able to handle other blocks
than the one starting at 0, the WII can use it for all
its blocks.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/pgtable_32.c | 27 +--
On Thu, Feb 21, 2019 at 11:46:06AM +0100, Christophe Leroy wrote:
>
>
> Le 21/02/2019 à 10:35, Russell Currey a écrit :
> > From: Christophe Leroy
> >
> > This patch implements a framework for Kernel Userspace Access
> > Protection.
> >
> > Then subarches will have to possibility to provide th
On Wed, Feb 13, 2019 at 05:00:17PM -0500, Waiman Long wrote:
> Modify __down_read_trylock() to optimize for an unlocked rwsem and make
> it generate slightly better code.
>
> Before this patch, down_read_trylock:
>
>0x <+0>: callq 0x5
>0x0005 <+5>: jm
Christophe Leroy writes:
> Now that mmu_mapin_ram() is able to handle other blocks
> than the one starting at 0, the WII can use it for all
> its blocks.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/mm/pgtable_32.c | 27 +--
> 1 file changed, 9 insertions(+),
Hi Christophe,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v5.0-rc4 next-20190221]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Sandipan Das writes:
> This enhances the current selftest framework for validating
> the in-kernel instruction emulation infrastructure by adding
> support for compute type instructions i.e. integer ALU-based
> instructions. Originally, this framework was limited to only
> testing load and store i
Le 21/02/2019 à 10:35, Russell Currey a écrit :
From: Christophe Leroy
This patch implements a framework for Kernel Userspace Access
Protection.
Then subarches will have to possibility to provide their own
implementation by providing setup_kuap() and lock/unlock_user_access()
Some platform
The export of fsl_guts_get_svr() is a left-over, it's currently used
only internally and users needing SoC information should use the generic
soc_device infrastructure.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/guts.c | 3 +--
include/linux/fsl/guts.h | 2 --
2 files changed, 1 insertion
PP bits take user access into account, so no need to check _PAGE_USER
here. A DSI or ISI will be generated if needed.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/head_32.S b
PAGE_ACCESSED is only needed for CONFIG_SWAP. When CONFIG_SWAP
is not set, just ignore it. If CONFIG_SWAP is set and PAGE_ACCESSED
is not, let's take a minor fault.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 24 +---
1 file changed, 13 insertions(+),
PAGE_DIRTY corresponds to the C bit. If writing on
a page for which the C bit is not set, a DataStoreTLBMiss
is generated. No need to check it in DataLoadTLBMiss.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff -
_PAGE_RW and _PAGE_DIRTY do not matter for ITLB misses.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index e4338d785a94..6db54425f1d9 100
Since commit c62ce9ef97ba ("powerpc: remove remaining bits from
CONFIG_APUS"), tophys() has become a pure constant operation.
PAGE_OFFSET is known at compile time so the physical address
can be builtin directly.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/hash_low_32.S | 62 +
ITLB miss on kernel pages only occur with CONFIG_MODULES and
CONFIG_DEBUG_PAGEALLOC.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 4c2cc42399aa..e4338d7
Since commit c62ce9ef97ba ("powerpc: remove remaining bits from
CONFIG_APUS"), tophys() has become a pure constant operation.
PAGE_OFFSET is known at compile time so the physical address
can be builtin directly.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_32.S | 15 ++---
Use SPRN_SPRG2 to store the current thread PGDIR and
avoid reading thread_struct.pgdir at every TLB miss.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/cpu_setup_6xx.S | 4
arch/powerpc/kernel/head_32.S | 25 --
When calling RTAS, the stack pointer is stored in SPRN_SPRG2
in order to be able to restore it in case of machine check in RTAS.
As machine check is not a perfomance critical path, this patch
frees SPRN_SPRG2 by using a field in thread struct instead.
Signed-off-by: Christophe Leroy
---
arch/po
There is no reason to re-read each time the pointer at
location 0xf0 as it is fixed and known.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/mmu.h | 2 ++
arch/powerpc/kernel/head_32.S | 5 ++---
arch/powerpc/kernel/head_40x.S | 5 ++---
arch/powerpc/kernel/head_8xx.S | 1 +
arch
The main purpose of this series is to optimise the handling of
TLB misses on the 603/e300.
Today the TLB miss handlers are implemented by more or less
copying the actions performed by the hash page handlers used
on processors having HASH pagetable.
This series brings some simplification.
It also
Hi Shengjiu.
On Thu, Feb 21, 2019 at 6:53 AM S.j. Wang wrote:
>
> From: Shengjiu Wang
Better use your nxp.com address as the freescale.com domain is gone
for a long time.
> There is very low possibility ( < 0.1% ) that channel swap happened
> in beginning when multi output/input pin is enabled
Nicholas Piggin writes:
> Nicholas Piggin's on January 22, 2019 4:46 pm:
>> HV interrupts that use HSRR registers do not clear MSR[RI], but
>> NMI entry code is not recoverable early on due to both using HSPRG
>> for a scratch register.
>>
>> This bug means that a system reset or machine check ca
From: Shengjiu Wang
There is very low possibility ( < 0.1% ) that channel swap happened
in beginning when multi output/input pin is enabled. The issue is
that hardware can't send data to correct pin in the begginning with
the normal enable flow.
This is hardware issue, the workaround flow is tha
Kernel Userspace Access Prevention utilises a feature of the Radix MMU
which disallows read and write access to userspace addresses. By
utilising this, the kernel is prevented from accessing user data from
outside of trusted paths that perform proper safety checks, such as
copy_{to/from}_user() and
__patch_instruction() is called in early boot, and uses
__put_user_size(), which includes the locks and unlocks for KUAP,
which could either be called too early, or in the Radix case, forced to
use "early_" versions of functions just to safely handle this one case.
__put_user_asm() does not do thi
Execution protection already exists on radix, this just refactors
the radix init to provide the KUEP setup function instead.
Thus, the only functional change is that it can now be disabled.
Signed-off-by: Russell Currey
---
arch/powerpc/mm/pgtable-radix.c| 12 +---
arch/powerpc/
Some platforms (i.e. Radix MMU) need per-CPU initialisation for KUP.
Any platforms that only want to do KUP initialisation once
globally can just check to see if they're running on the boot CPU, or
check if whatever setup they need has already been performed.
Note that this is only for 64-bit.
S
From: Christophe Leroy
This patch implements a framework for Kernel Userspace Access
Protection.
Then subarches will have to possibility to provide their own
implementation by providing setup_kuap() and lock/unlock_user_access()
Some platform will need to know the area accessed and whether it i
From: Christophe Leroy
This patch adds a skeleton for Kernel Userspace Execution Prevention.
Then subarches implementing it have to define CONFIG_PPC_HAVE_KUEP
and provide setup_kuep() function.
Signed-off-by: Christophe Leroy
---
Documentation/admin-guide/kernel-parameters.txt | 2 +-
arch/
From: Christophe Leroy
This patch adds a skeleton for Kernel Userspace Protection
functionnalities like Kernel Userspace Access Protection and
Kernel Userspace Execution Prevention
The subsequent implementation of KUAP for radix makes use of a MMU
feature in order to patch out assembly when KUAP
The first three patches of these series are from Christophe's work and are
the bare minimum framework needed to implement the support for radix.
In patch 3, I have removed from Christophe's patch my implementation of
the 64-bit exception handling code, since we don't have an answer for
making nest
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