Include "linux/of_address.h" to fix the compile error for
mpc85xx_l2ctlr_of_probe() when compiling fsl_85xx_cache_sram.c.
CC arch/powerpc/sysdev/fsl_85xx_l2ctlr.o
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c: In function ‘mpc85xx_l2ctlr_of_probe’:
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:90:11:
发件人：Christophe Leroy
发送日期：2020-03-14 03:24:20
收件人："王文虎"
抄送人：Benjamin Herrenschmidt ,Paul Mackerras
,Michael Ellerman ,Richard Fontana
,Kate Stewart ,Allison
Randal ,Thomas Gleixner
,linuxppc-dev@lists.ozlabs.org,linux-ker...@vger.kernel.org,ker...@vivo.com,triv...@kernel.org
主题：Re: [PATCH
Ganesh Goudar's on March 14, 2020 12:04 am:
> MCE handling on pSeries platform fails as recent rework to use common
> code for pSeries and PowerNV in machine check error handling tries to
> access per-cpu variables in realmode. The per-cpu variables may be
> outside the RMO region on pSeries
Add LS1088a in pci_device_id table so that pci-epf-test can be used
for testing PCIe EP in LS1088a.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- No change.
v3:
- No change.
v4:
- Use a maco to define the LS1088a device ID.
v5:
- No change.
v6:
- No change.
Add PCIe EP node for ls1088a to support EP mode.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- Remove the pf-offset proparty.
v3:
- No change.
v4:
- No change.
v5:
- No change.
v6:
- No change.
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
Add PCIe EP mode support for ls1088a and ls2088a, there are some
difference between LS1 and LS2 platform, so refactor the code of
the EP driver.
Signed-off-by: Xiaowei Bao
---
v2:
- This is a new patch for supporting the ls1088a and ls2088a platform.
v3:
- Adjust the some struct assignment
dw_pcie_ep_raise_msix_irq was never called in the exisitng driver
before, because the ls1046a platform don't support the MSIX feature
and msix_capable was always set to false.
Now that add the ls1088a platform with MSIX support, use the doorbell
method to support the MSIX feature.
Signed-off-by:
The different PCIe controller in one board may be have different
capability of MSI or MSIX, so change the way of getting the MSI
capability, make it more flexible.
Signed-off-by: Xiaowei Bao
---
v2:
- Remove the repeated assignment code.
v3:
- Use ep_func msi_cap and msix_cap to decide the
Fix some format issue of the code in EP driver.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- No change.
v3:
- No change.
v4:
- No change.
v5:
- No change.
v6:
- No change.
drivers/pci/controller/dwc/pci-layerscape-ep.c | 4 ++--
1 file changed, 2 insertions(+), 2
Add compatible strings for ls1088a and ls2088a.
Signed-off-by: Xiaowei Bao
Acked-by: Rob Herring
---
v2:
- No change.
v3:
- Use one valid combination of compatible strings.
v4:
- Add the comma between the two compatible.
v5:
- No change.
v6:
- No change.
Each PF of EP device should have it's own MSI or MSIX capabitily
struct, so create a dw_pcie_ep_func struct and remove the msi_cap
and msix_cap to this struct from dw_pcie_ep, and manage the PFs
with a list.
Signed-off-by: Xiaowei Bao
---
v3:
- This is a new patch, to fix the issue of MSI and
Move the function of getting MSI capability to the front of init
function, because the init function of the EP platform driver will use
the return value by the function of getting MSI capability.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- No change.
v3:
- No change.
v4:
Add multiple PFs support for DWC, due to different PF have different
config space, we use func_conf_select callback function to access
the different PF's config space, the different chip company need to
implement this callback function when use the DWC IP core and intend
to support multiple PFs
Add the doorbell mode of MSI-X in DWC EP driver.
Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
---
v2:
- Remove the macro of no used.
v3:
- No change.
v4:
- Modify the commit message.
v5:
- No change.
v6:
- No change.
drivers/pci/controller/dwc/pcie-designware-ep.c | 14
Add the PCIe EP multiple PF support for DWC and Layerscape, add
the doorbell MSIX function for DWC, use list to manage the PF of
one PCIe controller, and refactor the Layerscape EP driver due to
some platforms difference.
Xiaowei Bao (11):
PCI: designware-ep: Add multiple PFs support for DWC
Daniel Axtens's on March 11, 2020 9:03 am:
So:
- change the test when setting up a PACA to consider the actual value of
the MSR rather than the CPU feature.
- move the PACA setup to before the cpu feature parsing.
>>>
>>> Hmm. Problem is that equally we want PACA to
Le 13/03/2020 à 19:17, 王文虎 a écrit :
发件人：Christophe Leroy
发送日期：2020-03-14 01:45:11
收件人：WANG Wenhu ,Benjamin Herrenschmidt ,Paul Mackerras
,Michael Ellerman ,Richard Fontana ,Kate Stewart
,Allison Randal ,Thomas Gleixner
,linuxppc-dev@lists.ozlabs.org,linux-ker...@vger.kernel.org
发件人：Christophe Leroy
发送日期：2020-03-14 01:45:11
收件人：WANG Wenhu ,Benjamin Herrenschmidt
,Paul Mackerras ,Michael Ellerman
,Richard Fontana ,Kate Stewart
,Allison Randal ,Thomas
Gleixner
,linuxppc-dev@lists.ozlabs.org,linux-ker...@vger.kernel.org
抄送人：ker...@vivo.com,triv...@kernel.org
主题：Re:
On Fri, Mar 13, 2020 at 01:49:07PM -0400, Athira Rajeev wrote:
> Sampled instruction address register (SIER), is a PMU register,
SIER stands for "Sampled Instruction Event Register", instead. With that
change, your patch is totally clear :-)
Segher
Sampled instruction address register (SIER), is a PMU register,
captures architecture state for a given sample. And sier_user_mask
defined in commit 330a1eb7775b ("powerpc/perf: Core EBB support for 64-bit
book3s") defines the architected bits that needs to be saved from the SPR.
Currently all of
Le 13/03/2020 à 18:19, WANG Wenhu a écrit :
Include "linux/of_address.h" to fix the compile error for
mpc85xx_l2ctlr_of_probe() when compiling fsl_85xx_cache_sram.c.
CC arch/powerpc/sysdev/fsl_85xx_l2ctlr.o
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c: In function ‘mpc85xx_l2ctlr_of_probe’:
Include "linux/of_address.h" to fix the compile error for
mpc85xx_l2ctlr_of_probe() when compiling fsl_85xx_cache_sram.c.
CC arch/powerpc/sysdev/fsl_85xx_l2ctlr.o
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c: In function ‘mpc85xx_l2ctlr_of_probe’:
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:90:11:
* Michael Ellerman [2020-03-13 22:20:20]:
> We can avoid the #ifdef by using IS_ENABLED() in the existing
> condition check.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju
> Signed-off-by: Michael Ellerman
> ---
> arch/powerpc/kernel/smp.c | 5 ++---
> 1 file changed, 2 insertions(+),
* Michael Ellerman [2020-03-13 22:20:19]:
> We don't need the NULL check of np, the result is the same because the
> OF helpers cope with NULL, of_node_to_nid(NULL) == NUMA_NO_NODE (-1).
>
Looks good to me.
Reviewed-by: Srikar Dronamraju
> Signed-off-by: Michael Ellerman
> ---
>
If we hit UE at an instruction with a fixup entry, flag to
ignore the event and set nip to continue execution at the
fixup entry.
For powernv this changes are already made by commit
895e3dceeb97 ("powerpc/mce: Handle UE event for memcpy_mcsafe")
Signed-off-by: Ganesh Goudar
---
MCE handling on pSeries platform fails as recent rework to use common
code for pSeries and PowerNV in machine check error handling tries to
access per-cpu variables in realmode. The per-cpu variables may be
outside the RMO region on pSeries platform and needs translation to be
enabled for access.
On 3/12/20 4:22 PM, Jiri Olsa wrote:
> On Mon, Mar 09, 2020 at 11:55:50AM +0530, Kajol Jain wrote:
>
> SNIP
>
>> +static int metricgroup__add_metric_runtime_param(struct strbuf *events,
>> +struct list_head *group_list, struct pmu_event *pe)
>> +{
>> +int i, count;
>>
Alexey Kardashevskiy writes:
> The "os-term" RTAS calls has one argument with a message address of
> OS termination cause. rtas_os_term() already passes it but the recently
> added prom_init's version of that missed it; it also does not fill args
> correctly.
>
> This passes the message address
On 3/13/20 12:04 PM, Srikar Dronamraju wrote:
>> I lost all the memory about it. :)
>> Anyway, how about this?
>>
>> 1. make node_present_pages() safer
>> static inline node_present_pages(nid)
>> {
>> if (!node_online(nid)) return 0;
>> return (NODE_DATA(nid)->node_present_pages);
>> }
>>
>
>
On 3/13/20 12:12 PM, Srikar Dronamraju wrote:
> * Michael Ellerman [2020-03-13 21:48:06]:
>
>> Sachin Sant writes:
>> >> The patch below might work. Sachin can you test this? I tried faking up
>> >> a system with a memoryless node zero but couldn't get it to even start
>> >> booting.
>> >>
>>
* Vlastimil Babka [2020-03-12 17:41:58]:
> On 3/12/20 5:13 PM, Srikar Dronamraju wrote:
> > * Vlastimil Babka [2020-03-12 14:51:38]:
> >
> >> > * Vlastimil Babka [2020-03-12 10:30:50]:
> >> >
> >> >> On 3/12/20 9:23 AM, Sachin Sant wrote:
> >> >> >> On 12-Mar-2020, at 10:57 AM, Srikar
We can avoid the #ifdef by using IS_ENABLED() in the existing
condition check.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/smp.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index
We don't need the NULL check of np, the result is the same because the
OF helpers cope with NULL, of_node_to_nid(NULL) == NUMA_NO_NODE (-1).
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/smp.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git
* Michael Ellerman [2020-03-13 21:48:06]:
> Sachin Sant writes:
> >> The patch below might work. Sachin can you test this? I tried faking up
> >> a system with a memoryless node zero but couldn't get it to even start
> >> booting.
> >>
> > The patch did not help. The kernel crashed during
> >
* Joonsoo Kim [2020-03-13 18:47:49]:
> > >>
> > >> > Also for a memoryless/cpuless node or possible but not present nodes,
> > >> > node_to_mem_node(node) will still end up as node (atleast on powerpc).
> > >>
> > >> I think that's the place where this would be best to fix.
> > >>
> > >
> > >
Sachin Sant writes:
>> The patch below might work. Sachin can you test this? I tried faking up
>> a system with a memoryless node zero but couldn't get it to even start
>> booting.
>>
> The patch did not help. The kernel crashed during
> the boot with the same call trace.
>
> BUG_ON() introduced
Bjorn Helgaas writes:
> On Thu, Mar 12, 2020 at 09:38:02AM -0500, Bjorn Helgaas wrote:
>> On Thu, Mar 12, 2020 at 10:04:12PM +0800, Chen Zhou wrote:
>> > Fixes gcc '-Wunused-but-set-variable' warning:
>> >
>> > drivers/pci/hotplug/rpaphp_core.c: In function is_php_type:
>> >
H_PAGE_THP_HUGE is used to differentiate between a THP hugepage and hugetlb
hugepage entries. The difference is w.r.t how we handle hash fault on these
address. THP address enables MPSS in segments. We want to manage devmap hugepage
entries similar to THP pt entries. Hence use H_PAGE_THP_HUGE for
2020년 3월 13일 (금) 오전 1:42, Vlastimil Babka 님이 작성:
>
> On 3/12/20 5:13 PM, Srikar Dronamraju wrote:
> > * Vlastimil Babka [2020-03-12 14:51:38]:
> >
> >> > * Vlastimil Babka [2020-03-12 10:30:50]:
> >> >
> >> >> On 3/12/20 9:23 AM, Sachin Sant wrote:
> >> >> >> On 12-Mar-2020, at 10:57 AM, Srikar
Le 11/03/2020 à 12:52, Philippe Bergheaud a écrit :
Some opencapi FPGA images allow to control if the FPGA should be reloaded
on the next adapter reset. If it is supported, the image specifies it
through a Vendor Specific DVSEC in the config space of function 0.
This patch adds an interface
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