Hello Alexey, thanks for the feedback!
On Tue, 2020-09-29 at 13:57 +1000, Alexey Kardashevskiy wrote:
>
> On 12/09/2020 03:07, Leonardo Bras wrote:
> > diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
> > index ffb2637dc82b..c838da3d8f32 100644
> > --- a/arch/powerpc/kernel/
onfig-a004-20210409
i386 randconfig-a002-20210409
i386 randconfig-a005-20210409
x86_64 randconfig-a014-20210410
x86_64 randconfig-a015-20210410
x86_64 randconfig-a011-20210410
x86_64 randconfig-a013-20210
Changes to export the following NXGZIP capabilities through sysfs:
/sys/devices/vio/ibm,compression-v1/NxGzCaps:
min_compress_len /*Recommended minimum compress length in bytes*/
min_decompress_len /*Recommended minimum decompress length in bytes*/
req_max_processed_len /* Maximum number of byt
phyp provides NX capabilities which gives recommended minimum
compression / decompression length and maximum request buffer size
in bytes.
Changes to get NX overall capabilities which points to the specific
features phyp supports. Then retrieve NXGZIP specific capabilities.
Signed-off-by: Haren
Changes to create /dev/crypto/nx-gzip interface with VAS register
and to remove this interface with VAS unregister.
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/nx-common-pseries.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/crypto/nx/nx-common-pseries.c
b/driver
Rename nx-842-pseries.c to nx-common-pseries.c to add code for new
GZIP compression type. The actual functionality is not changed in
this patch.
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/Makefile | 2 +-
drivers/crypto/nx/{nx-842-pseries.c => nx-common-
pHyp provides GZIP default and GZIP QoS capabilities which gives
the total number of credits are available in LPAR. This patch
creates sysfs entries and exports LPAR credits, the currently used
and the available credits for each feature.
/sys/kernel/vas/VasCaps/VDefGzip: (default GZIP capabiliti
When NX sees a fault on the user space buffer, generates a fault
interrupt and pHyp forwards that interrupt to OS. Then the kernel
makes H_GET_NX_FAULT HCALL to retrieve the fault CRB information.
This patch adds changes to setup IRQ per each window and handles
fault by updating CSB.
Signed-off
This patch adds VAS window allocatioa/close with the corresponding
HCALLs. Also changes to integrate with the existing user space VAS
API and provide register/unregister functions to NX pseries driver.
The driver register function is used to create the user space
interface (/dev/crypto/nx-gzip)
pHyp provides various VAS capabilities such as GZIP default and QoS
capabilities which are used to determine total number of credits
available in LPAR, maximum window credits, maximum LPAR credits,
whether usermode copy/paste is supported, and etc.
So first retrieve overall vas capabilities usin
This patch adds the following HCALLs which are used to allocate,
modify and deallocate VAS windows.
H_ALLOCATE_VAS_WINDOW: Allocate VAS window
H_DEALLOCATE_VAS_WINDOW: Close VAS window
H_MODIFY_VAS_WINDOW: Setup window before using
Also adds phyp call (H_QUERY_VAS_CAPABILITIES) to get all VAS
c
pHyp introduces two different type of credits: Default and Quality
of service (QoS).
The total number of default credits available on each LPAR depends
on CPU resources configured. But these credits can be shared or
over-committed across LPARs in shared mode which can result in
paste command fai
This patch adds HCALLs and other definitions. Also define structs
that are used in VAS implementation on powerVM.
Signed-off-by: Haren Myneni
---
arch/powerpc/include/asm/hvcall.h| 7 ++
arch/powerpc/include/asm/vas.h | 28
arch/powerpc/platforms/pseries/vas.h | 96
Same vas_window struct is used on powerNV and pseries. So this patch
changes in struct vas_window to support both platforms and also the
corresponding modifications in powerNV vas code.
On powerNV vas_window is used for both TX and RX windows, whereas
only for TX windows on powerVM. So some elem
NX issues an interrupt when sees fault on user space buffer. The
kernel processes the fault by updating CSB. This functionality is
same for both powerNV and pseries. So this patch moves these
functions to vas-api.c and the actual functionality is not changed.
Signed-off-by: Haren Myneni
---
ar
Take task reference when each window opens and drops during close.
This functionality is needed for powerNV and pseries. So this patch
defines the existing code as functions in powerpc platform
independent vas-api.c
Signed-off-by: Haren Myneni
---
arch/powerpc/include/asm/vas.h |
Using the same /dev/crypto/nx-gzip interface for both powerNV and
pseries. So this patcb moves VAS API to powerpc platform indepedent
directory. The actual functionality is not changed in this patch.
Signed-off-by: Haren Myneni
---
arch/powerpc/Kconfig | 15 +
arch
powerNV and pseries drivers register / unregister to the corresponding
VAS code separately. So rename powerNV VAS API register/unregister
functions.
Signed-off-by: Haren Myneni
---
arch/powerpc/include/asm/vas.h | 6 +++---
arch/powerpc/platforms/powernv/vas-api.c | 10 +-
d
This patch series enables VAS / NX-GZIP on powerVM which allows
the user space to do copy/paste with the same existing interface
that is available on powerNV.
VAS Enablement:
- Get all VAS capabilities using H_QUERY_VAS_CAPABILITIES that are
available in the hypervisor. These capabilities tell
On Fri, Mar 19, 2021 at 11:06:57AM +, Christophe Leroy wrote:
> Convert restore_user_regs() and restore_tm_user_regs()
> to use user_access_read_begin/end blocks.
>
> Signed-off-by: Christophe Leroy
> ---
...
> static long restore_user_regs(struct pt_regs *regs,
>
32-bit architectures which expect 8-byte alignment for 8-byte integers
and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
page inadvertently expanded in 2019. When the dma_addr_t was added,
it forced the alignment of the union to 8 bytes, which inserted a 4 byte
gap between 'flag
I'd really appreciate people testing this, particularly on
arm32/mips32/ppc32 systems with a 64-bit dma_addr_t.
Matthew Wilcox (Oracle) (1):
mm: Fix struct page layout on 32-bit systems
include/linux/mm_types.h | 38 ++
1 file changed, 26 insertions(+), 12 d
On Sat, Apr 10, 2021 at 4:44 AM Matthew Wilcox wrote:
> + dma_addr_t dma_addr __packed;
> };
> struct {/* slab, slob and slub */
> union {
>
> but I don't know if GCC is smart enough to realise that dma_addr is n
The pull request you sent on Sun, 11 Apr 2021 00:43:49 +1000:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.12-6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/95c7b07551879c8ad4d6dca10c02de46ddbf55a8
Thank you!
--
Deet-doot-d
On Sat, Apr 10, 2021 at 11:42:41AM +0200, Christophe Leroy wrote:
> Le 10/04/2021 à 02:04, Michael Ellerman a écrit :
> >I think these can all be avoided by defining most of the values
> >regardless of what platform we're building for. Only the values that
> >overlap need to be kept behind an ifdef
On Sat, Apr 10, 2021 at 03:06:52PM +0100, Matthew Wilcox wrote:
> How about moving the flags into the union? A bit messy, but we don't
> have to play games with __packed__.
Yes, that is probably the better solution, avoiding the games to try
and get the union appropriately placed on 32-bit system
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Linus,
Please pull some more powerpc fixes for 5.12:
The following changes since commit 53f1d31708f6240e4615b0927df31f182e389e2f:
powerpc/mm/book3s64: Use the correct storage key value when calling H_PROTECT
(2021-03-26 22:19:39 +1100)
are
On Tue, 6 Apr 2021 09:33:05 +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./arch/powerpc/platforms/pseries/lpar.c:1633:2-3: Unneeded semicolon
Applied to powerpc/next.
[1/1] powerpc/pseries: remove unneeded semicolon
https://git.kernel.org/powerpc/c/01ed0510941ae1350
On Sun, 4 Apr 2021 12:26:23 -0700, Randy Dunlap wrote:
> When neither CONFIG_PCI nor CONFIG_IBMVIO is set/enabled, iommu.c has a
> build error. The fault injection code is not useful in that kernel config,
> so make the FAIL_IOMMU option depend on PCI || IBMVIO.
>
> Prevents this build error (warn
On Tue, 6 Apr 2021 12:55:08 +1000, Nicholas Piggin wrote:
> There is no need for this to be in asm, use the new intrrupt entry wrapper.
Applied to powerpc/next.
[1/1] powerpc/64s: power4 nap fixup in C
https://git.kernel.org/powerpc/c/98db179a78dd8379e9d2cbfc3f00224168a9344c
cheers
On Fri, 12 Mar 2021 11:20:44 +1000, Nicholas Piggin wrote:
> There is no need for this to be in asm, use the new intrrupt entry wrapper.
Applied to powerpc/next.
[1/1] powerpc/64s: power4 nap fixup in C
https://git.kernel.org/powerpc/c/98db179a78dd8379e9d2cbfc3f00224168a9344c
cheers
On Wed, 31 Mar 2021 11:38:40 +1100, Michael Ellerman wrote:
> In the past we had a fallback definition for _PAGE_KERNEL_ROX, but we
> removed that in commit d82fd29c5a8c ("powerpc/mm: Distribute platform
> specific PAGE and PMD flags and definitions") and added definitions
> for each MMU family.
>
On Thu, 18 Mar 2021 09:18:55 +0530, Aneesh Kumar K.V wrote:
> This reverts commit 675bceb097e6 ("powerpc/mm: Remove DEBUG_VM_PGTABLE
> support on powerpc")
>
> All the related issues are fixed by the series
> https://lore.kernel.org/linux-mm/20200902114222.181353-1-aneesh.ku...@linux.ibm.com
>
>
On Tue, 16 Mar 2021 12:09:38 +1100, Michael Ellerman wrote:
> The vio bus is a fake bus, which we use on pseries LPARs (guests) to
> discover devices provided by the hypervisor. There's no need or sense
> in creating the vio bus on bare metal systems.
>
> Which is why commit 4336b9337824 ("powerpc
On Mon, 15 Mar 2021 14:41:59 +1100, Michael Ellerman wrote:
> The ".machine" directive allows changing the machine for which code is
> being generated. It's equivalent to passing an -mcpu option on the
> command line.
>
> Although it can be useful, it's generally a bad idea because it adds
> anoth
On Fri, 26 Mar 2021 21:12:01 +1100, Michael Ellerman wrote:
> When the original spectre/meltdown mitigations were merged we put them
> in setup_64.c for lack of a better place.
>
> Since then we created security.c for some of the other mitigation
> related code. But it should all be in there.
>
>
On Fri, 12 Feb 2021 00:51:25 +1100, Michael Ellerman wrote:
> In the past we had a fallback definition for _PAGE_KERNEL_ROX, but we
> removed that in commit d82fd29c5a8c ("powerpc/mm: Distribute platform
> specific PAGE and PMD flags and definitions") and added definitions
> for each MMU family.
>
On Fri, 12 Mar 2021 13:25:11 + (UTC), Christophe Leroy wrote:
> This patch converts emulate_spe() to using user_access_begin
> logic.
>
> Since commit 662bbcb2747c ("mm, sched: Allow uaccess in atomic with
> pagefault_disable()"), might_fault() doesn't fire when called from
> sections where pa
On Fri, 19 Mar 2021 11:06:49 + (UTC), Christophe Leroy wrote:
> Similarly to the work done earlier with writes, this series
> converts signal32 to using user_read_access_begin/end and
> unsafe_get_user() and friends.
>
> Applies on to of the signal64 series, ie on merge-test (ca6e327fefb2)
>
On Mon, 8 Feb 2021 14:29:56 +1100, Jordan Niethe wrote:
> When adding a pte a ptesync is needed to order the update of the pte
> with subsequent accesses otherwise a spurious fault may be raised.
>
> radix__set_pte_at() does not do this for performance gains. For
> non-kernel memory this is not an
On Thu, 25 Feb 2021 14:21:06 +1100, Jordan Niethe wrote:
> Let the memory removed from the linear mapping to be used for the trace
> buffers be mmaped. This is a useful way of providing cache-inhibited
> memory for the alignment_handler selftest.
Patches 1 & 2 applied to powerpc/next.
[1/3] power
On Mon, 22 Mar 2021 16:37:45 + (UTC), Christophe Leroy wrote:
> This series implements extended BPF on powerpc32. For the implementation
> details, see the patch before the last.
>
> The following operations are not implemented:
>
> case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= sr
On Tue, 23 Mar 2021 15:47:59 + (UTC), Christophe Leroy wrote:
> Convert powerpc to relative jump labels.
>
> Before the patch, pseries_defconfig vmlinux.o has:
> 9074 __jump_table 0003f2a0 01321fa8
> 2**0
>
> With the patch, the same config gets:
> 9074
On Wed, 10 Mar 2021 17:46:39 + (UTC), Christophe Leroy wrote:
> This series cleans up uaccess.h and adds asm goto for get_user()
>
> v2:
> - Further clean ups
> - asm goto for get_user()
> - Move a few patches unrelated to put_user/get_user into another misc series.
>
> [...]
Applied to powe
On Mon, 5 Apr 2021 09:57:27 + (UTC), Christophe Leroy wrote:
> For unknown reason, old commit d27dfd388715 ("Import pre2.0.8")
> changed 'ptrdiff_t' from 'int' to 'long'.
>
> GCC expects it as 'int' really, and this leads to the following
> warning when building KFENCE:
>
> CC mm/kfenc
On Tue, 6 Apr 2021 12:16:01 -0400, Athira Rajeev wrote:
> The power PMU group constraints includes check for EBB events
> to make sure all events in a group must agree on EBB. This
> will prevent scheduling EBB and non-EBB events together.
> But in the existing check, settings for constraint mask a
From: Matthew Wilcox
> Sent: 10 April 2021 03:43
> On Sat, Apr 10, 2021 at 06:45:35AM +0800, kernel test robot wrote:
> > >> include/linux/mm_types.h:274:1: error: static_assert failed due to
> > >> requirement
> '__builtin_offsetof(struct page, lru) == __builtin_offsetof(struct folio,
> lru)' "o
How about moving the flags into the union? A bit messy, but we don't
have to play games with __packed__.
diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h
index 1210a8e41fad..f374d2f06255 100644
--- a/include/linux/mm_types.h
+++ b/include/linux/mm_types.h
@@ -68,16 +68,22 @@ struc
+CC Grygorii for the cpsw part as Ivan's email is not valid anymore
Thanks for catching this. Interesting indeed...
On Sat, 10 Apr 2021 at 09:22, Jesper Dangaard Brouer wrote:
>
> On Sat, 10 Apr 2021 03:43:13 +0100
> Matthew Wilcox wrote:
>
> > On Sat, Apr 10, 2021 at 06:45:35AM +0800, kernel t
During the EEH MMIO error checking, the current implementation fails to map
the (virtual) MMIO address back to the pci device on radix with hugepage
mappings for I/O. This results into failure to dispatch EEH event with no
recovery even when EEH capability has been enabled on the device.
eeh_check
Le 10/04/2021 à 02:04, Michael Ellerman a écrit :
Christophe Leroy writes:
Le 08/04/2021 à 16:07, Xiongwei Song a écrit :
From: Xiongwei Song
Create a new header named traps.h, define macros to list ppc interrupt
types in traps.h, replace the reference of the trap hex values with these
ma
> On Apr 10, 2021, at 8:35 AM, Nicholas Piggin wrote:
>
> Thanks for working on this, I think it's a nice cleanup and helps
> non-powerpc people understand the code a bit better.
>
My pleasure.
> Excerpts from Xiongwei Song's message of April 10, 2021 12:28 am:
>> From: Xiongwei Song
>>
>>
> On Apr 10, 2021, at 8:04 AM, Michael Ellerman wrote:
>
> Christophe Leroy writes:
>> Le 08/04/2021 à 16:07, Xiongwei Song a écrit :
>>> From: Xiongwei Song
>>>
>>> Create a new header named traps.h, define macros to list ppc interrupt
>>> types in traps.h, replace the reference of the trap
> On Apr 10, 2021, at 12:14 AM, Christophe Leroy
> wrote:
>
>
>
> Le 08/04/2021 à 16:07, Xiongwei Song a écrit :
>> From: Xiongwei Song
>> Create a new header named traps.h, define macros to list ppc interrupt
>> types in traps.h, replace the reference of the trap hex values with these
>> m
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