On 6/20/2021 4:59 PM, Nicholas Piggin wrote:
Excerpts from kernel test robot's message of April 3, 2021 8:47 pm:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: d93a0d43e3d0ba9e19387be4dae4a8d5b175a8d7
commit: 97e4910232fa1f81e806aa60c25a0450276d99a2
On 20/06/21 8:15 pm, Athira Rajeev wrote:
Patch set adds PMU registers namely Sampled Instruction Address Register
(SIAR) and Sampled Data Address Register (SDAR) as part of extended regs
in PowerPC. These registers provides the instruction/data address and
adding these to extended regs helps
allyesconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a001-20210620
i386 randconfig-a002-20210620
i386 randconfig-a003-20210620
i386 randconfig-a006
Hi Chris,
> + /*
> + * Choose a randomized, page-aligned address from the range:
> + * [PAGE_SIZE, DEFAULT_MAP_WINDOW - PAGE_SIZE]
> + * The lower address bound is PAGE_SIZE to avoid the zero-page.
> + * The upper address bound is DEFAULT_MAP_WINDOW - PAGE_SIZE to stay
> +
"Christopher M. Riedl" writes:
> Switching to a different mm with Hash translation causes SLB entries to
> be preloaded from the current thread_info. This reduces SLB faults, for
> example when threads share a common mm but operate on different address
> ranges.
>
> Preloading entries from the
Hi All,
On Mon, Jun 07, 2021 at 04:29:50AM -0700, Guenter Roeck wrote:
> On Mon, Jun 07, 2021 at 11:43:26AM +1000, Michael Ellerman wrote:
> > Guenter Roeck writes:
> > > On 5/17/21 4:17 AM, Michael Ellerman wrote:
> > >> Guenter Roeck writes:
> > >>> On 3/18/21 10:25 AM, Christophe Leroy
Excerpts from kernel test robot's message of April 3, 2021 8:47 pm:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: d93a0d43e3d0ba9e19387be4dae4a8d5b175a8d7
> commit: 97e4910232fa1f81e806aa60c25a0450276d99a2 linux/compiler-clang.h:
> define
On Sat, Jun 19, 2021 at 09:26:16AM -0500, Segher Boessenkool wrote:
> On Fri, Jun 18, 2021 at 01:44:16PM +1000, Paul Mackerras wrote:
> > Microwatt currently runs with MSR[HV] = 0,
>
> That isn't compliant though? If your implementation does not have LPAR
> it must set MSR[HV]=1 always.
True -
The pull request you sent on Sun, 20 Jun 2021 09:40:38 +1000:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.13-6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/b84a7c286cecf0604a5f8bd5dfcd5e1ca7233e15
Thank you!
--
Patch set adds PMU registers namely Sampled Instruction Address Register
(SIAR) and Sampled Data Address Register (SDAR) as part of extended regs
in PowerPC. These registers provides the instruction/data address and
adding these to extended regs helps in debug purposes.
Patch 1/2 adds SIAR and
Patch adds support to include Sampled Instruction Address Register
(SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended
registers. Update the definition of PERF_REG_PMU_MASK_300/31 and
PERF_REG_EXTENDED_MAX to include these SPR's.
Signed-off-by: Athira Rajeev
---
Patch enables presenting of Sampled Instruction Address Register (SIAR)
and Sampled Data Address Register (SDAR) SPRs as part of extended regsiters
for perf tool. Add these SPR's to sample_reg_mask in the tool side (to use
with -I? option).
Signed-off-by: Athira Rajeev
---
allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a001-20210620
i386 randconfig-a002-20210620
i386 randconfig-a003-20210620
i386
by kconfigs:
gcc_recent_errors
|-- powerpc-mpc885_ads_defconfig
| `--
arch-powerpc-lib-code-patching.c:error:no-previous-prototype-for-poking_init
`-- powerpc64-randconfig-r011-20210620
`--
arch-powerpc-lib-code-patching.c:warning:no-previous-prototype-for-poking_init
clang_recent_errors
allmodconfig
powerpc allyesconfig
powerpc allmodconfig
powerpc allnoconfig
i386 randconfig-a001-20210620
i386 randconfig-a002-20210620
i386 randconfig-a003-20210620
On Thu, Jun 17, 2021 at 12:30 PM Daniel Axtens wrote:
>
> powerpc has a variable number of PTRS_PER_*, set at runtime based
> on the MMU that the kernel is booted under.
>
> This means the PTRS_PER_* are no longer constants, and therefore
> breaks the build. Switch to using MAX_PTRS_PER_*, which
On Thu, Jun 17, 2021 at 12:30 PM Daniel Axtens wrote:
>
> Commit c65e774fb3f6 ("x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable")
> made PTRS_PER_P4D variable on x86 and introduced MAX_PTRS_PER_P4D as a
> constant for cases which need a compile-time constant (e.g. fixed-size
> arrays).
>
>
On Thu, Jun 17, 2021 at 12:30 PM Daniel Axtens wrote:
>
> Allow architectures to define a kasan_arch_is_ready() hook that bails
> out of any function that's about to touch the shadow unless the arch
> says that it is ready for the memory to be accessed. This is fairly
> uninvasive and should have
On Thu, Jun 17, 2021 at 12:30 PM Daniel Axtens wrote:
>
> For annoying architectural reasons, it's very difficult to support inline
> instrumentation on powerpc64.*
>
> Add a Kconfig flag to allow an arch to disable inline. (It's a bit
> annoying to be 'backwards', but I'm not aware of any way to
Excerpts from Segher Boessenkool's message of June 20, 2021 12:36 am:
> On Sat, Jun 19, 2021 at 01:08:51PM +1000, Nicholas Piggin wrote:
>> Excerpts from Paul Mackerras's message of June 18, 2021 1:47 pm:
>> > Microwatt's hardware RNG is accessed using the DARN instruction.
>>
>> I think we're
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