Hi Parth,
Sorry for the late review.
On Tue, Jun 15, 2021 at 12:38:04PM +0530, Parth Shah wrote:
> On POWER10 systems, the "ibm,thread-groups" property "2" indicates the cpus
> in thread-group share both L2 and L3 caches. Hence, use cache_property = 2
> itself to find both the L2 and L3 cache sib
While you already CCed a bunch of people stuff like that needs to go to
the appropriate mailing list and not just amd-gfx.
Especially LKML so that other core devs can take a look as well.
Regards,
Christian.
Am 19.07.21 um 21:52 schrieb Anson Jacob:
This is an attempt to have generic FPU enab
> #define DC_FP_END() kernel_fpu_end()
> #elif defined(CONFIG_PPC64)
> #include
> +#define DC_FP_START() kernel_fpu_begin()
> +#define DC_FP_END() kernel_fpu_end()
> #endif
Please use the same header as x86 in your first patch and then kill
this ifdefered and the DC_FP_START/DC_FP_END definit
On Mon, Jul 19, 2021 at 03:52:10PM -0400, Anson Jacob wrote:
> - Add kernel_fpu_begin & kernel_fpu_end API as x86
> - Add logic similar to x86 to ensure fpu
> begin/end call correctness
> - Add kernel_fpu_enabled to know if FPU is enabled
>
> Signed-off-by: Anson Jacob
All the x86 FPU support
Hello Fred, thanks for this feedback!
Sorry if I miss anything, this snippet was written for v1 over an year
ago, and I have not taken a look at it ever since.
On Mon, 2021-07-19 at 15:53 +0200, Frederic Barrat wrote:
>
>
> On 16/07/2021 10:27, Leonardo Bras wrote:
> > @@ -1099,18 +1105,13 @@ i
Adds a generic interface to represent the energy and frequency related
PAPR attributes on the system using the new H_CALL
"H_GET_ENERGY_SCALE_INFO".
H_GET_EM_PARMS H_CALL was previously responsible for exporting this
information in the lparcfg, however the H_GET_EM_PARMS H_CALL
will be deprecated
RFC: https://lkml.org/lkml/2021/6/4/791
PATCH v1: https://lkml.org/lkml/2021/6/16/805
PATCH v2: https://lkml.org/lkml/2021/7/6/138
PATCH v3: https://lkml.org/lkml/2021/7/12/2799
PATCH v4: https://lkml.org/lkml/2021/7/16/532
PATCH v5: https://lkml.org/lkml/2021/7/19/247
Changelog v5 --> v6
1. On al
On 20/07/21 12:39 am, Fabiano Rosas wrote:
"Pratik R. Sampat" writes:
+ pgs = kcalloc(num_attrs, sizeof(*pgs), GFP_KERNEL);
+ if (!pgs)
+ goto out;
+
+ papr_kobj = kobject_create_and_add("papr", firmware_kobj);
+ if (!papr_kobj) {
+ pr_war
- Add kernel_fpu_begin & kernel_fpu_end API as x86
- Add logic similar to x86 to ensure fpu
begin/end call correctness
- Add kernel_fpu_enabled to know if FPU is enabled
Signed-off-by: Anson Jacob
---
arch/powerpc/include/asm/switch_to.h | 29 ++
arch/powerpc/kernel/process.c| 130
Use kernel_fpu_begin & kernel_fpu_end for PPC
Depends on "ppc/fpu: Add generic FPU api similar to x86"
Signed-off-by: Anson Jacob
---
drivers/gpu/drm/amd/display/dc/os_types.h | 28 ++-
1 file changed, 2 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/displa
This is an attempt to have generic FPU enable/disable
calls similar to x86.
So that we can simplify gpu/drm/amd/display/dc/os_types.h
Also adds FPU correctness logic seen in x86.
Anson Jacob (2):
ppc/fpu: Add generic FPU api similar to x86
drm/amd/display: Use PPC FPU functions
arch/powerp
On 7/15/21 12:45 PM, Logan Gunthorpe wrote:
> From: Martin Oliveira
>
> The .map_sg() op now expects an error code instead of zero on failure.
>
> xen_swiotlb_map_sg() may only fail if xen_swiotlb_map_page() fails, but
> xen_swiotlb_map_page() only supports returning errors as
> DMA_MAPPING_ERRO
"Pratik R. Sampat" writes:
> + pgs = kcalloc(num_attrs, sizeof(*pgs), GFP_KERNEL);
> + if (!pgs)
> + goto out;
> +
> + papr_kobj = kobject_create_and_add("papr", firmware_kobj);
> + if (!papr_kobj) {
> + pr_warn("kobject_create_and_add papr failed\n");
> +
On Mon, 2021-07-19 at 16:14 +0200, Frederic Barrat wrote:
>
>
> On 16/07/2021 10:27, Leonardo Bras wrote:
> > There are two functions creating direct_window_list entries in a
> > similar way, so create a ddw_list_new_entry() to avoid duplicity
> > and
> > simplify those functions.
> >
> > Signed
On Mon, 2021-07-19 at 16:04 +0200, Frederic Barrat wrote:
>
>
> On 16/07/2021 10:27, Leonardo Bras wrote:
> > Creates a helper to allow allocating a new iommu_table without the
> > need
> > to reallocate the iommu_group.
> >
> > This will be helpful for replacing the iommu_table for the new DMA
On Mon, 2021-07-19 at 15:48 +0200, Frederic Barrat wrote:
>
>
> On 16/07/2021 10:27, Leonardo Bras wrote:
> > Some functions assume IOMMU page size can only be 4K (pageshift ==
> > 12).
> > Update them to accept any page size passed, so we can use 64K
> > pages.
> >
> > In the process, some defi
On Mon, Jul 19, 2021 at 06:12:05PM +0200, Christophe Leroy wrote:
> Salah Triki a écrit :
> >Replace if with min in order to make code more clean.
> >--- a/drivers/crypto/nx/nx-842.c
> >+++ b/drivers/crypto/nx/nx-842.c
> >@@ -134,8 +134,7 @@ EXPORT_SYMBOL_GPL(nx842_crypto_exit);
> > static void c
From: Kajol Jain
[ Upstream commit dea8cfcc33695f70f56023b416cf88ae44c8a45a ]
Commit 48a1f565261d2ab1 ("perf script python: Add more PMU fields to
event handler dict") added functionality to report fields like weight,
iregs, uregs etc via perf report. That commit predefined buffer size to
512 b
From: Kajol Jain
[ Upstream commit dea8cfcc33695f70f56023b416cf88ae44c8a45a ]
Commit 48a1f565261d2ab1 ("perf script python: Add more PMU fields to
event handler dict") added functionality to report fields like weight,
iregs, uregs etc via perf report. That commit predefined buffer size to
512 b
Salah Triki a écrit :
Replace if with min in order to make code more clean.
Signed-off-by: Salah Triki
---
drivers/crypto/nx/nx-842.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/nx/nx-842.c b/drivers/crypto/nx/nx-842.c
index 2ab90ec10e61..0d1d5a463899
On 19 July 2021 04:58 pm, Christian Zigotzky wrote:
On 19 July 2021 at 04:32 pm, Stan Johnson wrote:
On 7/18/21 10:23 PM, Christian Zigotzky wrote:
Hello Stan,
We had the same issue during the 5.14 merge window. Please look in the
following thread:
https://forum.hyperion-entertainment.com/vie
On 19 July 2021 at 04:32 pm, Stan Johnson wrote:
On 7/18/21 10:23 PM, Christian Zigotzky wrote:
Hello Stan,
We had the same issue during the 5.14 merge window. Please look in the
following thread:
https://forum.hyperion-entertainment.com/viewtopic.php?p=53511#p53511
There is a patch available
Since 5.13 QE's ucc nodes can't get interrupts from devicetree:
ucc@2000 {
cell-index = <1>;
reg = <0x2000 0x200>;
interrupts = <32>;
interrupt-parent = <&qeic>;
};
Now fw_devlink expects driver to create and probe a
On 16/07/2021 10:27, Leonardo Bras wrote:
There are two functions creating direct_window_list entries in a
similar way, so create a ddw_list_new_entry() to avoid duplicity and
simplify those functions.
Signed-off-by: Leonardo Bras
Reviewed-by: Alexey Kardashevskiy
---
LGTM
Reviewed-by: Fr
On 16/07/2021 10:27, Leonardo Bras wrote:
Creates a helper to allow allocating a new iommu_table without the need
to reallocate the iommu_group.
This will be helpful for replacing the iommu_table for the new DMA window,
after we remove the old one with iommu_tce_table_put().
Signed-off-by: L
On 16/07/2021 10:27, Leonardo Bras wrote:
@@ -1099,18 +1105,13 @@ int iommu_take_ownership(struct iommu_table *tbl)
for (i = 0; i < tbl->nr_pools; i++)
spin_lock_nest_lock(&tbl->pools[i].lock, &tbl->large_pool.lock);
- iommu_table_release_pages(tbl);
-
- if (!
On 16/07/2021 10:27, Leonardo Bras wrote:
Some functions assume IOMMU page size can only be 4K (pageshift == 12).
Update them to accept any page size passed, so we can use 64K pages.
In the process, some defines like TCE_SHIFT were made obsolete, and then
removed.
IODA3 Revision 3.0_prd1 (Op
There is no need to use the lockup detector ("noirqdebug") for IPIs.
The ipistorm benchmark measures a ~10% improvement on high systems
when this flag is set.
Cc: Thomas Gleixner
Signed-off-by: Cédric Le Goater
---
arch/powerpc/sysdev/xics/xics-common.c | 2 +-
arch/powerpc/sysdev/xive/common.c
The helper function pci_dev_is_added() from drivers/pci/pci.h is used in
PCI arch code of both s390 and powerpc leading to awkward relative
includes. Move it to the global include/linux/pci.h and get rid of these
includes just for that one function.
Signed-off-by: Niklas Schnelle
---
arch/powerp
15.07.2021 01:29, Li Yang wrote:
From the original code, this should be type = "qeic". It is not
defined in current binding but probably needed for backward
compatibility.
I took these strings from this part:
np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
if (!np) {
RFC: https://lkml.org/lkml/2021/6/4/791
PATCH v1: https://lkml.org/lkml/2021/6/16/805
PATCH v2: https://lkml.org/lkml/2021/7/6/138
PATCH v3: https://lkml.org/lkml/2021/7/12/2799
PATCH v4: https://lkml.org/lkml/2021/7/16/532
Changelog v4 --> v5
Based on comments from Fabiano
1. Cleaned up unused/re
Adds a generic interface to represent the energy and frequency related
PAPR attributes on the system using the new H_CALL
"H_GET_ENERGY_SCALE_INFO".
H_GET_EM_PARMS H_CALL was previously responsible for exporting this
information in the lparcfg, however the H_GET_EM_PARMS H_CALL
will be deprecated
Hi Michael,
Is there a way to get that patch in 5.14?
Thanks,
Laurent.
Le 29/04/2021 à 19:49, Laurent Dufour a écrit :
When a CPU is hot added, the CPU ids are taken from the available mask from
the lower possible set. If that set of values was previously used for CPU
attached to a different n
Hi Michael,
Is there a way to get that patch in 5.14?
Thanks,
Laurent.
Le 11/05/2021 à 09:31, Laurent Dufour a écrit :
When a LPAR is migratable, we should consider the maximum possible NUMA
node instead the number of NUMA node from the actual system.
The DT property 'ibm,current-associativit
Hi Michael,
Is there a way to get that patch in 5.14?
Thanks,
Laurent.
Le 17/05/2021 à 11:06, Laurent Dufour a écrit :
After a LPM, the device tree node ibm,dynamic-reconfiguration-memory may be
updated by the hypervisor in the case the NUMA topology of the LPAR's
memory is updated.
This is h
On 29/06/2021 15:15, Cédric Le Goater wrote:
> On PowerVM, CPU-less nodes can be populated with hot-plugged CPUs at
> runtime. Today, the IPI is not created for such nodes, and hot-plugged
> CPUs use a bogus IPI, which leads to soft lockups.
>
> We could create the node IPI on demand but it is a b
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