Le 27/01/2022 à 08:20, Kajol Jain a écrit :
> From: Athira Rajeev
>
> The testcase uses event code "0x134001c040" to verify
> the settings for different fields in Monitor Mode Control
> Register 1 (MMCR1). The fields include PMCxSEL, PMCXCOMB
> PMCxUNIT, cache. Checks if these fields are
Hi Michael, hi Andrew
Le 09/03/2022 à 18:44, Christophe Leroy a écrit :
> Rebased on top of powerpc/next branch
>
> This series converts powerpc to default topdown mmap layout.
>
> powerpc requires its own arch_get_unmapped_area() only when
> slices are needed, which is only for book3s/64.
On Mon, Mar 7, 2022 at 9:27 PM kajoljain wrote:
>
> Hi Dan,
> Can you take this patch-set if it looks fine to you.
>
Pushed out to my libnvdimm-pending branch for a 0day confirmation
before heading over to linux-next.
se7705_defconfig
sh se7722_defconfig
armkeystone_defconfig
powerpc mpc837x_rdb_defconfig
mips xway_defconfig
arm randconfig-c002-20220309
ia64
On Thu, Mar 10, 2022 at 10:37:12AM +0800, Zhouyi Zhou wrote:
> Dear Paul
>
> I try to reproduce the bug in ppc64 VM in Oregon State University
> using the vmlinux extracted from
> https://owww.molgen.mpg.de/~pmenzel/rcutorture-2022.02.01-21.52.37-torture-locktorture-kasan-lock01.tar.xz
>
> the
Dear Paul
I try to reproduce the bug in ppc64 VM in Oregon State University
using the vmlinux extracted from
https://owww.molgen.mpg.de/~pmenzel/rcutorture-2022.02.01-21.52.37-torture-locktorture-kasan-lock01.tar.xz
the ppc64 VM in which I run the qemu without hardware acceleration is:
Linux
Christophe Leroy writes:
> Le 09/03/2022 à 11:46, Michael Ellerman a écrit :
>> Christophe Leroy writes:
>>> Le 09/03/2022 à 04:24, Michael Ellerman a écrit :
Hangyu Hua writes:
> mpc8xx_pic_init() should return -ENOMEM instead of 0 when
> irq_domain_add_linear() return NULL. This
Nicholas Piggin writes:
> The L1 should not be able to adjust LPES mode for the L2. Setting LPES
> if the L0 needs it clear would cause external interrupts to be sent to
> L2 and missed by the L0.
>
> Clearing LPES when it may be set, as typically happens with XIVE enabled
> could cause a
Le 05/03/2020 à 16:08, Arvind Sankar a écrit :
For security, don't display the kernel's virtual memory layout.
Kees Cook points out:
"These have been entirely removed on other architectures, so let's
just do the same for ia32 and remove it unconditionally."
071929dbdd86 ("arm64: Stop
On Mon, Mar 07, 2022 at 11:48:01AM +0200, Ilpo Järvinen wrote:
> On Sun, 6 Mar 2022, Lukas Wunner wrote:
> > On Wed, Mar 02, 2022 at 11:56:05AM +0200, Ilpo Järvinen wrote:
> > > This change is necessary for supporting devices with RS485
> > > multipoint addressing [*].
> >
> > If this is only
On Tue, Mar 08, 2022 at 09:51:18PM -0800, Fangrui Song wrote:
> DT_RELACOUNT is an ELF dynamic tag inherited from SunOS indicating the
> number of R_*_RELATIVE relocations. It is optional but {ld.lld,ld.lld}
^ ld.{bfd,lld} ?
> -z combreloc
Le 23/04/2020 à 17:17, Naveen N. Rao a écrit :
From: Balamuruhan S
Change use of %p to %pK when printing address of the instruction slot so
that the actual kernel address is visible for privileged users.
Signed-off-by: Balamuruhan S
Signed-off-by: Naveen N. Rao
This series doesn't
Unlike most architectures, powerpc can only define at runtime
if it is going to use the generic arch_get_unmapped_area() or not.
Today, powerpc has a copy of the generic arch_get_unmapped_area()
because when selection HAVE_ARCH_UNMAPPED_AREA the generic
arch_get_unmapped_area() is not available.
CONFIG_PPC_MM_SLICES is always selected by hash book3s/64.
CONFIG_PPC_MM_SLICES is never selected by other platforms.
Remove it.
Signed-off-by: Christophe Leroy
Reviewed-by: Nicholas Piggin
---
arch/powerpc/include/asm/hugetlb.h | 2 +-
arch/powerpc/include/asm/paca.h| 7 ---
arch_randomize_brk() is only needed for hash on book3s/64, for other
platforms the one provided by the default mmap layout is good enough.
Move it to hash_utils.c and use randomize_page() like the generic one.
And properly opt out the radix case instead of making an assumption
on
Use the generic version of arch_get_unmapped_area() which
is now available at all time instead of its copy
radix__arch_get_unmapped_area()
To allow that for PPC64, add arch_get_mmap_base() and
arch_get_mmap_end() macros.
Instead of setting mm->get_unmapped_area() to either
Powerpc needs flags and len to make decision on arch_get_mmap_end().
So add them as parameters to arch_get_mmap_end().
Signed-off-by: Christophe Leroy
Cc: Steve Capper
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/processor.h | 4 ++--
mm/mmap.c
hugetlb_get_unmapped_area() is now identical to the
generic version if only RADIX is enabled, so move it
to slice.c and let it fallback on the generic one
when HASH MMU is not compiled in.
Do the same with arch_get_unmapped_area() and
arch_get_unmapped_area_topdown().
Signed-off-by: Christophe
Commit e7142bf5d231 ("arm64, mm: make randomization selected by
generic topdown mmap layout") introduced a default version of
arch_randomize_brk() provided when
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT is selected.
powerpc could select CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
but needs to
Since commit 555904d07eef ("powerpc/8xx: MM_SLICE is not needed
anymore") only book3s/64 selects CONFIG_PPC_MM_SLICES.
Move slice.c into mm/book3s64/
Move necessary stuff in asm/book3s/64/slice.h and
remove asm/slice.h
Signed-off-by: Christophe Leroy
Reviewed-by: Nicholas Piggin
---
Select CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT and
remove arch/powerpc/mm/mmap.c
This change reuses the generic framework added by
commit 67f3977f805b ("arm64, mm: move generic mmap layout
functions to mm") without any functional change.
Comparison between powerpc implementation and the
vma_mmu_pagesize() is only required for slices,
otherwise there is a generic weak version doing the
exact same thing.
Move it to slice.c
Signed-off-by: Christophe Leroy
Reviewed-by: Nicholas Piggin
---
arch/powerpc/mm/hugetlbpage.c | 11 ---
arch/powerpc/mm/slice.c | 9
This is a complement of f6795053dac8 ("mm: mmap: Allow for "high"
userspace addresses") for hugetlb.
This patch adds support for "high" userspace addresses that are
optionally supported on the system and have to be requested via a hint
mechanism ("high" addr parameter to mmap).
Architectures
Today drivers/pci/controller/pci-xgene.c defines SZ_1T
Move it into linux/sizes.h so that it can be re-used elsewhere.
Link:
https://lore.kernel.org/r/575cb7164cf124c75df7cb9242ea7374733942bf.1642752946.git.christophe.le...@csgroup.eu
Signed-off-by: Christophe Leroy
Signed-off-by: Lorenzo
Rebased on top of powerpc/next branch
This series converts powerpc to default topdown mmap layout.
powerpc requires its own arch_get_unmapped_area() only when
slices are needed, which is only for book3s/64. First part of
the series moves slices into book3s/64 specific directories
and cleans up
Do like most other architectures and provide randomisation also to
"legacy" memory mappings, by adding the random factor to
mm->mmap_base in arch_pick_mmap_layout().
See commit 8b8addf891de ("x86/mm/32: Enable full randomization on
i386 and X86_32") for all explanations and benefits of that mmap
Use the generic version of arch_hugetlb_get_unmapped_area()
which is now available at all time.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/book3s/64/hugetlb.h | 4 --
arch/powerpc/mm/book3s64/radix_hugetlbpage.c | 55
arch/powerpc/mm/hugetlbpage.c
Le 24/05/2020 à 11:38, Aneesh Kumar K.V a écrit :
With Hard Lockup watchdog, we can hit a BUG() if we take a watchdog
interrupt when in OPAL mode. This happens in show_instructions()
where the kernel takes the watchdog NMI IPI with MSR_IR == 0.
With that show_instructions() updates the
Nicholas Piggin writes:
> The differences between nested and !nested will become larger in
> later changes so split them out for readability.
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Fabiano Rosas
When certain PHB HW failure causes phyp to recover PHB, it marks the PE
state as temporarily unavailable until recovery is complete. This also
triggers an EEH handler in Linux which needs to notify drivers, and perform
recovery. But before notifying the driver about the pci error it uses
Stop using uie_unsupported and clear RTC_FEATURE_UPDATE_INTERRUPT instead.
Signed-off-by: Alexandre Belloni
---
drivers/rtc/rtc-opal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-opal.c b/drivers/rtc/rtc-opal.c
index f8f49a969c23..ad41aaf8a17f 100644
---
On Wed, Mar 09, 2022 at 12:37:14PM +1100, Michael Ellerman wrote:
> Michael Ellerman writes:
> > On Tue, 15 Feb 2022 13:40:55 +0100, Christophe Leroy wrote:
> >> PPC64/IA64/PARISC have function descriptors. LKDTM doesn't work
> >> on those three architectures because LKDTM messes up function
> >>
Reviewed-by: Christophe Leroy
Reviewed-by: Christophe Leroy
Le 03/11/2020 à 18:13, Laurent Dufour a écrit :
The check introduced by the commit 83d3f0e90c6c ("powerpc/mm: tracking vDSO
remap") is wrong and is missing some partial unmaps of the VDSO.
To be complete the check needs the base and end address of the
VDSO. Currently only the base is
On 3/9/22 1:18 AM, Christoph Hellwig wrote:
On Tue, Mar 08, 2022 at 04:38:21PM -0500, Boris Ostrovsky wrote:
On 3/1/22 5:53 AM, Christoph Hellwig wrote:
Allow to pass a remap argument to the swiotlb initialization functions
to handle the Xen/x86 remap case. ARM/ARM64 never did any remapping
On 3/3/22 06:33, Nicholas Piggin wrote:
Move the cede abort logic out of xive escalation rearming and into
the caller to prepare for handling a similar case with nested guest
entry.
Signed-off-by: Nicholas Piggin
Reviewed-by: Cédric Le Goater
In xive_esc_irq() :
if
Nicholas Piggin writes:
> Move the cede abort logic out of xive escalation rearming and into
> the caller to prepare for handling a similar case with nested guest
> entry.
>
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/include/asm/kvm_ppc.h | 4 ++--
> arch/powerpc/kvm/book3s_hv.c
Nicholas Piggin writes:
> When new work is created that requires attention from the hypervisor
> (e.g., to inject an interrupt into the guest), fast_vcpu_kick is used to
> pull the target vcpu out of the guest if it may have been running.
>
> Therefore the work creation side looks like this:
>
>
The of_find_compatible_node() function returns a node pointer with
refcount incremented, We should use of_node_put() on it when done
Add the missing of_node_put() to release the refcount.
Fixes: e95f287deed2 ("soc: fsl: handle RCPM errata A-008646 on SoC LS1021A")
Signed-off-by: Miaoqian Lin
---
Christophe Leroy wrote:
Le 03/03/2022 à 17:59, Naveen N. Rao a écrit :
Christophe Leroy wrote:
The ability to disable ftrace in certain code paths through
paca_struct->ftrace_enabled will also be relevant on ppc32 - it will be
nice if it can be introduced there.
Ah ? I understood from
On 3/2/22 16:44, Geert Uytterhoeven wrote:
> Hi Anshuman,
>
> On Wed, Mar 2, 2022 at 12:07 PM Anshuman Khandual
> wrote:
>> On 3/2/22 3:35 PM, Geert Uytterhoeven wrote:
>>> On Wed, Mar 2, 2022 at 10:51 AM Anshuman Khandual
>>> wrote:
On 3/2/22 12:35 PM, Christophe Leroy wrote:
> Le
On 3/3/22 20:58, Catalin Marinas wrote:
> Hi Anshuman,
>
> On Mon, Feb 28, 2022 at 04:17:28PM +0530, Anshuman Khandual wrote:
>> +static inline pgprot_t __vm_get_page_prot(unsigned long vm_flags)
>> +{
>> +switch (vm_flags & (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)) {
>> +case
Le 09/03/2022 à 11:46, Michael Ellerman a écrit :
> Christophe Leroy writes:
>> Le 09/03/2022 à 04:24, Michael Ellerman a écrit :
>>> Hangyu Hua writes:
mpc8xx_pic_init() should return -ENOMEM instead of 0 when
irq_domain_add_linear() return NULL. This cause mpc8xx_pics_init to
Christophe Leroy writes:
> Le 09/03/2022 à 04:24, Michael Ellerman a écrit :
>> Hangyu Hua writes:
>>> mpc8xx_pic_init() should return -ENOMEM instead of 0 when
>>> irq_domain_add_linear() return NULL. This cause mpc8xx_pics_init to continue
>>> executing even if mpc8xx_pic_host is NULL.
>>>
>>>
Christophe Leroy writes:
> Le 21/05/2020 à 03:43, Alistair Popple a écrit :
>> Setting the FSCR bit directly in the SPR only sets it during the initial
>> boot and early init of the kernel but not for the init process or any
>> subsequent kthreads. This is because the thread_struct for those is
From: Christophe Leroy
> Sent: 09 March 2022 07:56
...
> diff --git a/arch/powerpc/include/asm/checksum.h
> b/arch/powerpc/include/asm/checksum.h
> index 8321f6053a67..4b573a3b7e17 100644
> --- a/arch/powerpc/include/asm/checksum.h
> +++ b/arch/powerpc/include/asm/checksum.h
> @@ -38,14 +38,15 @@
Last usage of find_current_mm_pte() was removed by
commit 15759cb054ef ("powerpc/perf/callchain: Use
__get_user_pages_fast in read_user_stack_slow")
Remove it.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/pte-walk.h | 25 -
Le 05/04/2018 à 09:14, Balbir Singh a écrit :
The code currently assumes PAGE_SHIFT as the shift value of
the pfn, this works correctly (mostly) for user space pages,
but the correct thing to do is
1. Extract the shift value returned via the pte-walk API's
2. Use the shift value to access
Le 12/05/2017 à 07:36, Balbir Singh a écrit :
On powernv/pseries and ppc64 defconfigs
Most distros will want it on by default and I've missed
turning it on during developer testing. Having it on ensures
we are testing our patches with the config enabled.
Signed-off-by: Balbir Singh
Today
Le 28/03/2018 à 05:09, Balbir Singh a écrit :
New changes to %p cause the information printed at boot
about radix-mmu partition and process table opaque, if
we really want to protect those values, we should make
dmesg more secure using CONFIG_SECURITY_DMESG_RESTRICT
Before the patches:
On Tue, Mar 08, 2022 at 10:23:38PM -0300, Fabiano Rosas wrote:
> This patch adds a new KVM capability to address a crash we're
> currently having inside the nested guest kernel when running with
> GTSE disabled in the nested hypervisor.
I think the patch needs to add a description of
> On 07-Mar-2022, at 8:21 PM, Nicholas Piggin wrote:
>
> When a synchronous interrupt[1] is taken in a local_irq_disable() region
> which has MSR[EE]=1, the interrupt handler will enable MSR[EE] as part
> of enabling MSR[RI], for peformance and profiling reasons.
>
> [1] Typically a hash
Hi,
Le 21/05/2020 à 03:43, Alistair Popple a écrit :
Setting the FSCR bit directly in the SPR only sets it during the initial
boot and early init of the kernel but not for the init process or any
subsequent kthreads. This is because the thread_struct for those is
copied from the current
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