Srikar Dronamraju writes:
> There are some variables that are only updated at boot time.
> So add read_mostly attribute to such variables
If they're only updated at boot time then __ro_after_init would be the
better annotation.
cheers
> diff --git a/arch/powerpc/kernel/smp.c
Srikar Dronamraju writes:
> Like L2-cache info, coregroup information which is used to determine MC
> sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
> export coregroup information for shared processor LPARs. Hence disable
> creating MC domains on shared LPAR Systems.
>
>
Srikar Dronamraju writes:
> The ability to detect if the system is running in a shared processor
> mode is helpful in few more generic cases not just in
> paravirtualization.
> For example: At boot time, different scheduler/ topology flags may be
> set based on the processor mode. Hence move it
Srikar Dronamraju writes:
> If there are shared processor LPARs, underlying Hypervisor can have more
> virtual cores to handle than actual physical cores.
>
> Starting with Power 9, a core has 2 nearly independent thread groups.
You need to be clearer here that you're talking about "big cores",
Srikar Dronamraju writes:
> Currently cpu feature flag is checked whenever powerpc_smt_flags gets
> called. This is an unnecessary overhead. CPU_FTR_ASYM_SMT is set based
> on the processor and all processors will either have this set or will
> have it unset.
The cpu_has_feature() test is
On Thu, Oct 19, 2023 at 12:41:45PM +1100, Michael Ellerman wrote:
> Kuan-Wei Chiu writes:
> > This patch improves the performance of event alternative lookup by
> > replacing the previous linear search with a more efficient binary
> > search. This change reduces the time complexity for the search
Kuan-Wei Chiu writes:
> This patch improves the performance of event alternative lookup by
> replacing the previous linear search with a more efficient binary
> search. This change reduces the time complexity for the search process
> from O(n) to O(log(n)). A pre-sorted table of event values and
devm_kasprintf() returns a pointer to dynamically allocated memory
which can be NULL upon failure. Ensure the allocation was successful by
checking the pointer validity.
Fixes: acfe63ec1c59 ("mtd: Convert to using %pOFn instead of device_node.name")
Signed-off-by: Yi Yang
---
On 2023/10/19 9:16, Michael Ellerman wrote:
Yi Yang writes:
The devm_kasprintf() returns a pointer to dynamically allocated memory.
that will return NULL when allocate failed.
Fix it by check return value of devm_kasprintf().
Fixes: acfe63ec1c59 ("mtd: Convert to using %pOFn instead of
Yi Yang writes:
> The devm_kasprintf() returns a pointer to dynamically allocated memory.
> that will return NULL when allocate failed.
> Fix it by check return value of devm_kasprintf().
>
> Fixes: acfe63ec1c59 ("mtd: Convert to using %pOFn instead of
> device_node.name")
> Signed-off-by: Yi
Hi Srikar,
Srikar Dronamraju writes:
> PowerVM Hypervisor dispatches on a whole core basis. In a shared LPAR, a
> CPU from a core that is CEDED or preempted may have a larger latency. In
> such a scenario, its preferable to choose a different CPU to run.
>
> If one of the CPUs in the core is
Haren Myneni writes:
> The hypervisor returns migration failure if all VAS windows are not
> closed. During pre-migration stage, vas_migration_handler() sets
> migration_in_progress flag and closes all windows from the list.
> The allocate VAS window routine checks the migration flag, setup
> the
The 10/17/2023 18:14, Peter Bergner wrote:
> CCing linux-kernel for more exposure.
>
> PING. I'm waiting on a reply from anyone on the kernel side of things
> to see whether they have an issue with reserving values for AT_HWCAP3
> and AT_HWCAP4.
>
> I'll note reviews from the GLIBC camp did
Hi Tasmiya,
> -Original Message-
> From: Tasmiya Nalatwad
> Sent: Wednesday, October 18, 2023 6:51 PM
> To: linux-s...@vger.kernel.org; linux-ker...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; linux-bl...@vger.kernel.org; linux-n...@vger.kernel.org
> Cc: Quinn Tran ; Nilesh
The devm_kasprintf() returns a pointer to dynamically allocated memory.
that will return NULL when allocate failed.
Fix it by check return value of devm_kasprintf().
Fixes: acfe63ec1c59 ("mtd: Convert to using %pOFn instead of device_node.name")
Signed-off-by: Yi Yang
---
On Thu, 19 Oct 2023 04:07:35 +0800
kernel test robot wrote:
> Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml:
> Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml:
> fs/tracefs/event_inode.c:782:11-21: ERROR: ei is NULL but dereferenced.
This was already reported and I'm currently
On 10/13/2023 11:02 AM, Johannes Berg wrote:
On Fri, 2023-10-13 at 17:44 +0200, Arnd Bergmann wrote:
On Thu, Oct 12, 2023, at 18:36, Geoff Levand wrote:
On 10/12/23 17:41, Johannes Berg wrote:
But seriously - is it worth to try to keep a wireless driver for it if
we don't even know anyone
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 2dac75696c6da3c848daa118a729827541c89d33 Add linux-next specific
files for 20231018
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202309200103.grxwdktx-...@intel.com
https
AER corrected and uncorrectable internal errors (CIE/UIE) are masked
in their corresponding mask registers per default once in power-up
state. [1][2] Enable internal errors for RCECs to receive CXL
downstream port errors of Restricted CXL Hosts (RCHs).
[1] CXL 3.0 Spec, 12.2.1.1 - RCH Downstream
In Restricted CXL Device (RCD) mode a CXL device is exposed as an
RCiEP, but CXL downstream and upstream ports are not enumerated and
not visible in the PCIe hierarchy. [1] Protocol and link errors from
these non-enumerated ports are signaled as internal AER errors, either
Uncorrectable Internal
From: Terry Bowman
The CXL driver plans to use cper_print_aer() for logging restricted CXL
host (RCH) AER errors. cper_print_aer() is not currently exported and
therefore not usable by the CXL drivers built as loadable modules. Export
the cper_print_aer() function. Use the EXPORT_SYMBOL_NS_GPL()
Thanks Nilesh. The patch fixes the issue.
On 10/18/23 19:59, Nilesh Javali wrote:
Hi Tasmiya,
-Original Message-
From: Tasmiya Nalatwad
Sent: Wednesday, October 18, 2023 6:51 PM
To: linux-s...@vger.kernel.org; linux-ker...@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org;
Currently cpu feature flag is checked whenever powerpc_smt_flags gets
called. This is an unnecessary overhead. CPU_FTR_ASYM_SMT is set based
on the processor and all processors will either have this set or will
have it unset.
Hence only check for the feature flag once and cache it to be used
If there are shared processor LPARs, underlying Hypervisor can have more
virtual cores to handle than actual physical cores.
Starting with Power 9, a core has 2 nearly independent thread groups.
On a shared processors LPARs, it helps to pack threads to lesser number
of cores so that the overall
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
---
There are some variables that are only updated at boot time.
So add read_mostly attribute to such variables
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c
PowerVM Hypervisor will schedule at a core granularity. However each
core can have more than one thread_groups. For better utilization in
case of a shared processor, its preferable for the scheduler to pack to
the lowest core. However there is no benefit of moving a thread between
two thread
The ability to detect if the system is running in a shared processor
mode is helpful in few more generic cases not just in
paravirtualization.
For example: At boot time, different scheduler/ topology flags may be
set based on the processor mode. Hence move it to a more generic file.
PowerVM systems configured in shared processors mode have some unique
challenges. Some device-tree properties will be missing on a shared
processor. Hence some sched domains may not make sense for shared processor
systems.
Most shared processor systems are over-provisioned. Underlying PowerVM
PowerVM Hypervisor dispatches on a whole core basis. In a shared LPAR, a
CPU from a core that is CEDED or preempted may have a larger latency. In
such a scenario, its preferable to choose a different CPU to run.
If one of the CPUs in the core is active, i.e neither CEDED nor
preempted, then
When the PMU is disabled, MMCRA is not updated to disable BHRB and
instruction sampling. This can lead to those features remaining enabled,
which can slow down a real or emulated CPU.
Fixes: 1cade527f6e9 ("powerpc/perf: BHRB control to disable BHRB logic when not
used")
Signed-off-by: Nicholas
The '%.ko' rule in arch/*/Makefile.postlink does nothing but call the
'true' command.
Remove the meaningless code.
Signed-off-by: Masahiro Yamada
Reviewed-by: Nicolas Schier
---
(no changes since v1)
arch/mips/Makefile.postlink| 3 ---
arch/powerpc/Makefile.postlink | 3 ---
On 18/10/2023 15:50, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 9:09 PM Hans Verkuil wrote:
>>
>> On 18/10/2023 14:52, Shengjiu Wang wrote:
>>> On Wed, Oct 18, 2023 at 3:58 PM Hans Verkuil wrote:
On 18/10/2023 09:40, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 3:31 PM Hans
From: Christophe Leroy
[ Upstream commit 8e8a12ecbc86700b5e1a3596ce2b3c43dafad336 ]
Booting mpc85xx_defconfig kernel on QEMU leads to:
Bad trap at PC: fe9bab0, SR: 2d000, vector=800
awk[82]: unhandled trap (5) at 0 nip fe9bab0 lr fe9e01c code 5 in
libc-2.27.so[fe5a000+17a000]
awk[82]: code:
From: Christophe Leroy
[ Upstream commit 8e8a12ecbc86700b5e1a3596ce2b3c43dafad336 ]
Booting mpc85xx_defconfig kernel on QEMU leads to:
Bad trap at PC: fe9bab0, SR: 2d000, vector=800
awk[82]: unhandled trap (5) at 0 nip fe9bab0 lr fe9e01c code 5 in
libc-2.27.so[fe5a000+17a000]
awk[82]: code:
From: Christophe Leroy
[ Upstream commit 8e8a12ecbc86700b5e1a3596ce2b3c43dafad336 ]
Booting mpc85xx_defconfig kernel on QEMU leads to:
Bad trap at PC: fe9bab0, SR: 2d000, vector=800
awk[82]: unhandled trap (5) at 0 nip fe9bab0 lr fe9e01c code 5 in
libc-2.27.so[fe5a000+17a000]
awk[82]: code:
From: Shengjiu Wang
[ Upstream commit 2b21207afd06714986a3d22442ed4860ba4f9ced ]
As the pll_id and pll_id can be zero (WM8960_SYSCLK_AUTO)
with the commit 2bbc2df46e67 ("ASoC: wm8960: Make automatic the
default clocking mode")
Then the machine driver will skip to call set_sysclk() and
On Wed, Oct 18, 2023 at 9:09 PM Hans Verkuil wrote:
>
> On 18/10/2023 14:52, Shengjiu Wang wrote:
> > On Wed, Oct 18, 2023 at 3:58 PM Hans Verkuil wrote:
> >>
> >> On 18/10/2023 09:40, Shengjiu Wang wrote:
> >>> On Wed, Oct 18, 2023 at 3:31 PM Hans Verkuil wrote:
>
> On 18/10/2023
Greetings,
OOPs Kernel crash while performing Block device module parameter test
[qla2xxx / FC] on linux-next 6.6.0-rc5-next-20231010
--- Traces ---
[30876.431678] Kernel attempted to read user page (30) - exploit
attempt? (uid: 0)
[30876.431687] BUG: Kernel NULL pointer dereference on
On 18/10/2023 14:52, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 3:58 PM Hans Verkuil wrote:
>>
>> On 18/10/2023 09:40, Shengjiu Wang wrote:
>>> On Wed, Oct 18, 2023 at 3:31 PM Hans Verkuil wrote:
On 18/10/2023 09:23, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 10:27 AM
On 18/10/2023 14:53, Shengjiu Wang wrote:
> On Mon, Oct 16, 2023 at 10:01 PM Hans Verkuil wrote:
>>
>> On 13/10/2023 10:31, Shengjiu Wang wrote:
>>> Implement the ASRC memory to memory function using
>>> the v4l2 framework, user can use this function with
>>> v4l2 ioctl interface.
>>>
>>> User
On Mon, Oct 16, 2023 at 10:01 PM Hans Verkuil wrote:
>
> On 13/10/2023 10:31, Shengjiu Wang wrote:
> > Implement the ASRC memory to memory function using
> > the v4l2 framework, user can use this function with
> > v4l2 ioctl interface.
> >
> > User send the output and capture buffer to driver and
On Wed, Oct 18, 2023 at 3:58 PM Hans Verkuil wrote:
>
> On 18/10/2023 09:40, Shengjiu Wang wrote:
> > On Wed, Oct 18, 2023 at 3:31 PM Hans Verkuil wrote:
> >>
> >> On 18/10/2023 09:23, Shengjiu Wang wrote:
> >>> On Wed, Oct 18, 2023 at 10:27 AM Shengjiu Wang
> >>> wrote:
>
> On Tue,
Add new defines for DPC reason fields and use them instead of literals.
Signed-off-by: Ilpo Järvinen
---
drivers/pci/pcie/dpc.c| 27 +--
include/uapi/linux/pci_regs.h | 6 ++
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git
Instead of using a literal to clear bits, add PCI_EXP_DPC_CTL_EN_MASK
and use the usual pattern to modify a bitfield.
While at it, rearrange RMW code more logically together.
Signed-off-by: Ilpo Järvinen
---
drivers/pci/pcie/dpc.c | 10 +++---
1 file changed, 7 insertions(+), 3
From: Bjorn Helgaas
Use FIELD_GET() to remove dependencies on the field position, i.e., the
shift value. No functional change intended.
Signed-off-by: Ilpo Järvinen
Signed-off-by: Bjorn Helgaas
---
drivers/pci/pcie/dpc.c| 5 +++--
drivers/pci/quirks.c | 2 +-
Instead of handcrafted shifts to handle register fields, use
FIELD_GET/FIELD_PREP().
Signed-off-by: Ilpo Järvinen
---
drivers/pci/hotplug/pciehp_core.c | 3 ++-
drivers/pci/hotplug/pciehp_hpc.c | 5 +++--
drivers/pci/hotplug/pnv_php.c | 3 ++-
3 files changed, 7 insertions(+), 4
Thomas Zimmermann writes:
> FYI, I intent to merge patches 1 and 2 of this patchset into
> drm-misc-next. The updates for PowerPC can be merged through PPC trees
> later. Let me know if this does not work for you.
Hi Thomas,
Sorry for the late reply, I was on leave.
Yeah that's fine.
cheers
On Wed, 18 Oct 2023 16:45:04 +1100
Michael Ellerman wrote:
> Thanks. Yeah text is generally better, it archives better and can be
> grepped etc. but in this case I was going a bit mad trying to make sense
> of the oops :)
>
> In hindsight the bug is an obvious boot time ordering problem, can
Daniel Borkmann writes:
> On 10/13/23 7:31 AM, Muhammad Muzammil wrote:
>> Fixed 'instead' typo
>>
>> Signed-off-by: Muhammad Muzammil
>
> Michael, I presume you'll pick it up?
Will do.
cheers
Haren Myneni writes:
> The VAS open window call prints error message and returns -EBUSY
> after the migration suspend event initiated and until the resume
> event completed on the destination system. It can cause the log
> buffer filled with these error messages if the user space issues
>
Aneesh Kumar K V writes:
> On 10/18/23 11:25 AM, Christophe Leroy wrote:
>>
>>
>> Le 18/10/2023 à 06:55, Aneesh Kumar K.V a écrit :
>>> With commit 9fee28baa601 ("powerpc: implement the new page table range
>>> API") we added set_ptes to powerpc architecture but the implementation
>>> missed
On Tue, Oct 17, 2023 at 6:39 PM Hari Bathini wrote:
>
>
>
> On 17/10/23 7:58 am, Pingfan Liu wrote:
> > *** Idea ***
> > For kexec -p, the boot cpu can be not the cpu0, this causes the problem
> > of allocating memory for paca_ptrs[]. However, in theory, there is no
> > requirement to assign
On 18/10/2023 09:40, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 3:31 PM Hans Verkuil wrote:
>>
>> On 18/10/2023 09:23, Shengjiu Wang wrote:
>>> On Wed, Oct 18, 2023 at 10:27 AM Shengjiu Wang
>>> wrote:
On Tue, Oct 17, 2023 at 9:37 PM Hans Verkuil wrote:
>
> On 17/10/2023
On 10/16/23 6:12 PM, Nicholas Piggin wrote:
> This fixes a long-standing latency bug in the powerpc qspinlock
> implementation that quite a few people have reported and helped
> out with debugging.
>
> The first patch is a minimal fix that avoids the problem. The
> other patches are
On Wed, Oct 18, 2023 at 3:31 PM Hans Verkuil wrote:
>
> On 18/10/2023 09:23, Shengjiu Wang wrote:
> > On Wed, Oct 18, 2023 at 10:27 AM Shengjiu Wang
> > wrote:
> >>
> >> On Tue, Oct 17, 2023 at 9:37 PM Hans Verkuil wrote:
> >>>
> >>> On 17/10/2023 15:11, Shengjiu Wang wrote:
> On Mon, Oct
On 18/10/2023 09:23, Shengjiu Wang wrote:
> On Wed, Oct 18, 2023 at 10:27 AM Shengjiu Wang
> wrote:
>>
>> On Tue, Oct 17, 2023 at 9:37 PM Hans Verkuil wrote:
>>>
>>> On 17/10/2023 15:11, Shengjiu Wang wrote:
On Mon, Oct 16, 2023 at 9:16 PM Hans Verkuil wrote:
>
> Hi Shengjiu,
On Wed, Oct 18, 2023 at 10:27 AM Shengjiu Wang wrote:
>
> On Tue, Oct 17, 2023 at 9:37 PM Hans Verkuil wrote:
> >
> > On 17/10/2023 15:11, Shengjiu Wang wrote:
> > > On Mon, Oct 16, 2023 at 9:16 PM Hans Verkuil wrote:
> > >>
> > >> Hi Shengjiu,
> > >>
> > >> On 13/10/2023 10:31, Shengjiu Wang
On 10/18/23 11:25 AM, Christophe Leroy wrote:
>
>
> Le 18/10/2023 à 06:55, Aneesh Kumar K.V a écrit :
>> With commit 9fee28baa601 ("powerpc: implement the new page table range
>> API") we added set_ptes to powerpc architecture but the implementation
>> missed calling the pte filter for all the
Le 17/10/2023 à 08:56, Benjamin Gray a écrit :
> On 17/10/23 5:39 pm, Christophe Leroy wrote:
>> Le 16/10/2023 à 07:01, Benjamin Gray a écrit :
>>> Currently patch_instruction() bases the write length on the value being
>>> written. If the value looks like a prefixed instruction it writes 8
>>>
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