-by: Aaron Sierra asie...@xes-inc.com
---
include/linux/fsl_ifc.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/linux/fsl_ifc.h b/include/linux/fsl_ifc.h
index f49ddb1..84d60cb 100644
--- a/include/linux/fsl_ifc.h
+++ b/include/linux/fsl_ifc.h
@@ -781,13 +781,13
Freescale's QorIQ T Series processors support 8 IFC chip selects
within a memory map backward compatible with previous P Series
processors which supported only 4 chip selects.
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
include/linux/fsl_ifc.h | 10 +-
1 file changed, 5
-#define FSL_IFC_BANK_COUNT 4
+#define FSL_IFC_BANK_COUNT 8
First please modify fsl_ifc_nand.c to limit itself to the number of
banks it dynamically determines are present based on the IFC version.
Number of available bank/chip select are defined by SoC and it is
independent of
- Original Message -
From: Gokul C G goku...@kalkitech.in
Sent: Tuesday, August 19, 2014 9:43:38 AM
HI,
I am facing problem with PCIE driver in new Linux kernel compiled for powerpc
architecture (Big endian) ,freescales P2040 processor.I was using old kernel
Linux version 3.0.48
-by: Aaron Sierra asie...@xes-inc.com
---
arch/powerpc/sysdev/fsl_pci.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4bd091a..88d8844 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch
- Original Message -
From: Scott Wood scottw...@freescale.com
Sent: Thursday, August 21, 2014 4:19:56 PM
On Wed, 2014-08-20 at 18:51 -0500, Aaron Sierra wrote:
@@ -520,9 +520,22 @@ int fsl_add_bridge(struct platform_device *pdev, int
is_primary)
goto
- Original Message -
From: Scott Wood scottw...@freescale.com
Sent: Thursday, August 21, 2014 5:01:46 PM
On Thu, 2014-08-21 at 16:54 -0500, Aaron Sierra wrote:
- Original Message -
From: Scott Wood scottw...@freescale.com
Sent: Thursday, August 21, 2014 4:19:56 PM
- Original Message -
From: Scott Wood scottw...@freescale.com
To: Aaron Sierra asie...@xes-inc.com
Cc: linuxppc-dev@lists.ozlabs.org, Minghuan Lian
minghuan.l...@freescale.com
Sent: Friday, August 22, 2014 1:36:31 PM
Subject: Re: [PATCH] powerpc: fsl_pci: Fix PCI/PCI-X regression
to
enumerate the bus.
Cc: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
.../bindings/pci/fsl,pci-agent-force-enum.txt | 27 ++
arch/powerpc/sysdev/fsl_pci.c | 3 ++-
2 files changed, 29 insertions(+), 1
Freescale's QorIQ T Series processors support 8 IFC chip selects
within a memory map backward compatible with previous P Series
processors which supported only 4 chip selects.
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
drivers/memory/fsl_ifc.c| 2 +-
drivers/mtd/nand
- Original Message -
From: Scott Wood scottw...@freescale.com
Sent: Tuesday, August 26, 2014 3:52:56 PM
On Mon, 2014-08-25 at 18:54 -0500, Aaron Sierra wrote:
The following commit prevents the MPC8548E on the XPedite5200 PrPMC
module from enumerating its PCI/PCI-X bus
- Original Message -
From: Scott Wood scottw...@freescale.com
Sent: Tuesday, August 26, 2014 3:48:51 PM
On Tue, 2014-08-26 at 12:31 -0500, Aaron Sierra wrote:
Freescale's QorIQ T Series processors support 8 IFC chip selects
within a memory map backward compatible with previous P
to
enumerate the bus.
Cc: Minghuan Lian minghuan.l...@freescale.com
Signed-off-by: Aaron Sierra asie...@xes-inc.com
---
Documentation/devicetree/bindings/pci/fsl,pci.txt | 27 +++
arch/powerpc/sysdev/fsl_pci.c | 3 ++-
2 files changed, 29 insertions(+), 1
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