[v3 2/2] dts: ppc: t1024rdb: remove interrupts property
From: Biwen Li
Since the interrupt pin for RTC DS1339 is not connected
to the CPU on T1024RDB, remove the interrupt property
from the device tree.
This also fix the following warning for hwclock.util-linux:
$ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t1024rdb.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..605ceec66af3 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,6 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
};
};
--
2.17.1
[v3 1/2] dts: ppc: t4240rdb: remove interrupts property
From: Biwen Li
Since the interrupt pin for RTC DS1374 is not connected
to the CPU on T4240RDB, remove the interrupt property
from the device tree.
This also fix the following warning for hwclock.util-linux:
$ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t4240rdb.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..145896f2eef6 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,6 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
};
};
--
2.17.1
[v2 1/2] dts: ppc: t4240rdb: remove interrupts property
From: Biwen Li
This removes interrupts property to drop warning as follows:
- $ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
My case:
- RTC ds1374's INT pin is connected to VCC on T4240RDB,
then the RTC cannot inform cpu about the alarm interrupt
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t4240rdb.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..145896f2eef6 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,6 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
};
};
--
2.17.1
[v2 2/2] dts: ppc: t1024rdb: remove interrupts property
From: Biwen Li
This removes interrupts property to drop warning as follows:
- $ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
My case:
- RTC ds1339s INT pin isn't connected to cpus INT pin on T1024RDB,
then the RTC cannot inform cpu about alarm interrupt
How to fix it?
- remove IRQ line
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t1024rdb.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..605ceec66af3 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,6 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
};
};
--
2.17.1
RE: [PATCH 2/3] dts: ppc: t4240rdb: add uie_unsupported property to drop warning
>
> On 08/05/2020 13:49:24+0800, Biwen Li wrote:
> > From: Biwen Li
> >
> > This adds uie_unsupported property to drop warning as follows:
> > - $ hwclock.util-linux
> > hwclock.util-linux: select() to /dev/rtc0
> > to wait for clock tick timed out
> >
> > My case:
> > - RTC ds1374's INT pin is connected to VCC on T4240RDB,
> > then the RTC cannot inform cpu about the alarm interrupt
> >
> > Signed-off-by: Biwen Li
> > ---
> > arch/powerpc/boot/dts/fsl/t4240rdb.dts | 6 +-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > index a56a705d41f7..ccdd10202e56 100644
> > --- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > +++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
> > @@ -144,7 +144,11 @@
> > rtc@68 {
> > compatible = "dallas,ds1374";
> > reg = <0x68>;
> > - interrupts = <0x1 0x1 0 0>;
>
> removing the interrupt should be enough to solve your issue
Okay, got it. Thanks.
>
> > + // The ds1374's INT pin isn't
> > + // connected to cpu's INT pin,
> > + // so the rtc cannot synchronize
> > + // clock tick per second.
> > + uie_unsupported;
> > };
> > };
> >
> > --
> > 2.17.1
> >
>
> --
> Alexandre Belloni, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
RE: [PATCH 1/3] rtc: ds1374: add uie_unsupported property to drop warning
> > Hi, > > On 08/05/2020 13:49:23+0800, Biwen Li wrote: > > From: Biwen Li > > > > Add uie_unsupported property to drop warning as follows: > > - $ hwclock.util-linux > > hwclock.util-liux: select() /dev/rtc0 > > to wait for clock tick timed out > > > > My case: > > - RTC ds1374's INT pin is connected to VCC on T4240RDB, > > then the RTC cannot inform cpu about the alarm > > interrupt > > > > Signed-off-by: Biwen Li > > --- > > drivers/rtc/rtc-ds1374.c | 4 > > 1 file changed, 4 insertions(+) > > > > diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index > > 9c51a12cf70f..e530e887a17e 100644 > > --- a/drivers/rtc/rtc-ds1374.c > > +++ b/drivers/rtc/rtc-ds1374.c > > @@ -651,6 +651,10 @@ static int ds1374_probe(struct i2c_client *client, > > if (ret) > > return ret; > > > > + if (of_property_read_bool(client->dev.of_node, > > +"uie_unsupported")) > > + ds1374->rtc->uie_unsupported = true; > > + > > This is not how this is supposed to work, either the RTC support uie or > don't, it is > not board dependent and certainly doesn't require an > (undocumented) DT property. Okay, got it. Thanks. > > > #ifdef CONFIG_RTC_DRV_DS1374_WDT > > save_client = client; > > ret = misc_register(_miscdev); > > -- > > 2.17.1 > > > > -- > Alexandre Belloni, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com
[PATCH 3/3] dts: ppc: t1024rdb: add wakeup-source property to drop warning
From: Biwen Li
This adds wakeup-source property to drop warning as follows:
- $ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
My case:
- RTC ds1339s INT pin isn't connected to cpus INT pin on T1024RDB,
then the RTC cannot inform cpu about alarm interrupt
How to fix it?
- add wakeup-source property and remove IRQ line
to set uie_unsupported flag
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t1024rdb.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 645caff98ed1..191cbf5cda4e 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -161,7 +161,7 @@
rtc@68 {
compatible = "dallas,ds1339";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
+ wakeup-source;
};
};
--
2.17.1
[PATCH 2/3] dts: ppc: t4240rdb: add uie_unsupported property to drop warning
From: Biwen Li
This adds uie_unsupported property to drop warning as follows:
- $ hwclock.util-linux
hwclock.util-linux: select() to /dev/rtc0
to wait for clock tick timed out
My case:
- RTC ds1374's INT pin is connected to VCC on T4240RDB,
then the RTC cannot inform cpu about the alarm interrupt
Signed-off-by: Biwen Li
---
arch/powerpc/boot/dts/fsl/t4240rdb.dts | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
index a56a705d41f7..ccdd10202e56 100644
--- a/arch/powerpc/boot/dts/fsl/t4240rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t4240rdb.dts
@@ -144,7 +144,11 @@
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
- interrupts = <0x1 0x1 0 0>;
+ // The ds1374's INT pin isn't
+ // connected to cpu's INT pin,
+ // so the rtc cannot synchronize
+ // clock tick per second.
+ uie_unsupported;
};
};
--
2.17.1
[PATCH 1/3] rtc: ds1374: add uie_unsupported property to drop warning
From: Biwen Li Add uie_unsupported property to drop warning as follows: - $ hwclock.util-linux hwclock.util-liux: select() /dev/rtc0 to wait for clock tick timed out My case: - RTC ds1374's INT pin is connected to VCC on T4240RDB, then the RTC cannot inform cpu about the alarm interrupt Signed-off-by: Biwen Li --- drivers/rtc/rtc-ds1374.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index 9c51a12cf70f..e530e887a17e 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c @@ -651,6 +651,10 @@ static int ds1374_probe(struct i2c_client *client, if (ret) return ret; + if (of_property_read_bool(client->dev.of_node, +"uie_unsupported")) + ds1374->rtc->uie_unsupported = true; + #ifdef CONFIG_RTC_DRV_DS1374_WDT save_client = client; ret = misc_register(_miscdev); -- 2.17.1
RE: [v5 1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Hi All,
1.Need apply below patches before apply these patches.
1.1 Flextimer dts
https://lore.kernel.org/patchwork/series/405653/mbox/
(https://lore.kernel.org/patchwork/patch/1112493/)
1.2 RCPM driver
https://lore.kernel.org/patchwork/patch/1143809/mbox/ [v10,1/3] PM: wakeup: Add
routine to help fetch wakeup source object)
https://lore.kernel.org/patchwork/patch/1143810/mbox/ ([v10,2/3] Documentation:
dt: binding: fsl: Add 'little-endian' and update Chassis define)
https://lore.kernel.org/patchwork/patch/1143811/mbox/ ([v10,3/3] soc: fsl: add
RCPM driver)
> Subject: [v5 1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
>
> Description:
> - Reading configuration register RCPM_IPPDEXPCR1
> always return zero
>
> Workaround:
> - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
>
> Impact:
> - FlexTimer module will cannot wakeup system in
> deep sleep on SoC LS1021A
>
> Signed-off-by: Biwen Li
> ---
> Change in v5:
> - update the patch, because of rcpm driver has updated.
>
> Change in v4:
> - rename property name
> fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
>
> Change in v3:
> - update commit message
> - rename property name
> fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
>
> Change in v2:
> - fix stype problems
>
> drivers/soc/fsl/rcpm.c | 47
> --
> 1 file changed, 45 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> a093dbe6d2cb..775c618f0456 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -6,13 +6,16 @@
> //
> // Author: Ran Wang
>
> +#include
> #include
> +#include
> +#include
> #include
> -#include
> #include
> +#include
> +#include
> #include
> #include
> -#include
>
> #define RCPM_WAKEUP_CELL_MAX_SIZE7
>
> @@ -37,6 +40,9 @@ static int rcpm_pm_prepare(struct device *dev)
> struct device_node *np = dev->of_node;
> u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
> + struct regmap *scfg_addr_regmap = NULL;
> + u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
>
> rcpm = dev_get_drvdata(dev);
> if (!rcpm)
> @@ -90,6 +96,43 @@ static int rcpm_pm_prepare(struct device *dev)
> tmp |= ioread32be(address);
> iowrite32be(tmp, address);
> }
> + /*
> + * Workaround of errata A-008646 on SoC LS1021A:
> + * There is a bug of register ippdexpcr1.
> + * Reading configuration register RCPM_IPPDEXPCR1
> + * always return zero. So save ippdexpcr1's value
> + * to register SCFG_SPARECR8.And the value of
> + * ippdexpcr1 will be read from SCFG_SPARECR8.
> + */
> + if (device_property_present(dev, "fsl,ippdexpcr1-alt-addr")) {
> + if (dev_of_node(dev)) {
> + scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> "fsl,ippdexpcr1-alt-addr");
> + } else if (is_acpi_node(dev->fwnode)) {
> + dev_err(dev, "not support acpi for rcpm\n");
> + continue;
> + }
> +
> + if (scfg_addr_regmap && (i == 1)) {
> + if (device_property_read_u32_array(dev,
> + "fsl,ippdexpcr1-alt-addr",
> + reg_offset,
> + 1 + sizeof(u64)/sizeof(u32))) {
> + scfg_addr_regmap = NULL;
> + continue;
> + }
> + /* Read value from register SCFG_SPARECR8 */
> + regmap_read(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1] <<
> (sizeof(u32) * 8) |
> + reg_offset[2])) & 0x),
> + _value);
> + /* Write value to register SCFG_SPARECR8 */
> + regmap_write(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1] <<
> (sizeof(u32) * 8) |
> + reg_offset[2])) & 0x),
> + tmp | reg_value);
> + }
> + }
> }
>
> return 0;
> --
> 2.17.1
[v5 1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Signed-off-by: Biwen Li
---
Change in v5:
- update the patch, because of rcpm driver has updated.
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update commit message
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 47 --
1 file changed, 45 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index a093dbe6d2cb..775c618f0456 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -6,13 +6,16 @@
//
// Author: Ran Wang
+#include
#include
+#include
+#include
#include
-#include
#include
+#include
+#include
#include
#include
-#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -37,6 +40,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct device_node *np = dev->of_node;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
+ struct regmap *scfg_addr_regmap = NULL;
+ u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -90,6 +96,43 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= ioread32be(address);
iowrite32be(tmp, address);
}
+ /*
+* Workaround of errata A-008646 on SoC LS1021A:
+* There is a bug of register ippdexpcr1.
+* Reading configuration register RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's value
+* to register SCFG_SPARECR8.And the value of
+* ippdexpcr1 will be read from SCFG_SPARECR8.
+*/
+ if (device_property_present(dev, "fsl,ippdexpcr1-alt-addr")) {
+ if (dev_of_node(dev)) {
+ scfg_addr_regmap =
syscon_regmap_lookup_by_phandle(np,
+
"fsl,ippdexpcr1-alt-addr");
+ } else if (is_acpi_node(dev->fwnode)) {
+ dev_err(dev, "not support acpi for rcpm\n");
+ continue;
+ }
+
+ if (scfg_addr_regmap && (i == 1)) {
+ if (device_property_read_u32_array(dev,
+ "fsl,ippdexpcr1-alt-addr",
+ reg_offset,
+ 1 + sizeof(u64)/sizeof(u32))) {
+ scfg_addr_regmap = NULL;
+ continue;
+ }
+ /* Read value from register SCFG_SPARECR8 */
+ regmap_read(scfg_addr_regmap,
+ (u32)(((u64)(reg_offset[1] <<
(sizeof(u32) * 8) |
+ reg_offset[2])) & 0x),
+ _value);
+ /* Write value to register SCFG_SPARECR8 */
+ regmap_write(scfg_addr_regmap,
+(u32)(((u64)(reg_offset[1] <<
(sizeof(u32) * 8) |
+reg_offset[2])) & 0x),
+tmp | reg_value);
+ }
+ }
}
return 0;
--
2.17.1
[v5 2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep
The patch fixes a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li
---
Change in v5:
- none
Change in v4:
- update property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- none
arch/arm/boot/dts/ls1021a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 816e2926c448..6659d83c3aa2 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -988,6 +988,12 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+ fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
};
ftm_alarm0: timer0@29d {
--
2.17.1
[v5 3/3] Documentation: dt: binding: fsl: Add 'fsl, ippdexpcr1-alt-addr' property
The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A
Signed-off-by: Biwen Li
---
Change in v5:
- none
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- update desc of the property
'fsl,rcpm-scfg'
.../devicetree/bindings/soc/fsl/rcpm.txt | 21 +++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..751a7655b694 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,13 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
+ on SoC LS1021A and only needed on SoC LS1021A.
+ Must include 1 + 2 entries.
+ The first entry must be a link to the SCFG device node.
+ The non-first entry must be offset of registers of SCFG.
+ The second and third entry compose an alt offset address
+ for IPPDEXPCR1(SCFG_SPARECR8)
Example:
The RCPM node for T4240:
@@ -43,6 +50,20 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+ fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
+ };
+
+
* Freescale RCPM Wakeup Source Device Tree Bindings
---
Required fsl,rcpm-wakeup property should be added to a device node if the
device
--
2.17.1
RE: [EXT] Re: [v4,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr1-alt-addr' property
>
> On Thu, Sep 26, 2019 at 10:41:18AM +0800, Biwen Li wrote:
> > The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata
> > A-008646 on LS1021A
> >
> > Signed-off-by: Biwen Li
> > ---
> > Change in v4:
> > - rename property name
> > fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
> >
> > Change in v3:
> > - rename property name
> > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> >
> > Change in v2:
> > - update desc of the property 'fsl,rcpm-scfg'
> >
> > .../devicetree/bindings/soc/fsl/rcpm.txt | 21
> +++
> > 1 file changed, 21 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > index 5a33619d881d..751a7655b694 100644
> > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -34,6 +34,13 @@ Chassis VersionExample Chips
> > Optional properties:
> > - little-endian : RCPM register block is Little Endian. Without it RCPM
> > will be Big Endian (default case).
> > + - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
> > + on SoC LS1021A and only needed on SoC LS1021A.
> > + Must include 1 + 2 entries.
> > + The first entry must be a link to the SCFG device node.
> > + The non-first entry must be offset of registers of SCFG.
> > + The second and third entry compose an alt offset address
> > + for IPPDEXPCR1(SCFG_SPARECR8)
>
> If only on 1 SoC, can't all this be implied by "fsl,ls1021a-rcpm"?
Currently on SoC LS1021A. Maybe other soc need this!
>
> Adding a property means you need both a new dtb and kernel to fix the
> errata. Using the compatible string means you only need a new kernel.
You are right, but it will be more flexible. Thanks.
>
> >
> > Example:
> > The RCPM node for T4240:
> > @@ -43,6 +50,20 @@ The RCPM node for T4240:
> > #fsl,rcpm-wakeup-cells = <2>;
> > };
> >
> > +The RCPM node for LS1021A:
> > + rcpm: rcpm@1ee2140 {
> > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
>
> Both of these compatible strings aren't documented.
These compatible strings is here: https://patchwork.kernel.org/patch/11105281/
>
> > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > + #fsl,rcpm-wakeup-cells = <2>;
> > +
> > + /*
> > + * The second and third entry compose an alt offset
> > + * address for IPPDEXPCR1(SCFG_SPARECR8)
> > + */
> > + fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
> > + };
> > +
> > +
> > * Freescale RCPM Wakeup Source Device Tree Bindings
> > ---
> > Required fsl,rcpm-wakeup property should be added to a device node if
> > the device
> > --
> > 2.17.1
> >
RE: [v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer dts,
need apply these patches as follows:
1. RCPM driver:
https://patchwork.kernel.org/series/162731/mbox/
(https://patchwork.kernel.org/patch/11105279/)
2. FlexTimer dts:
https://lore.kernel.org/patchwork/series/405653/mbox/
(https://lore.kernel.org/patchwork/patch/1112493/)
3. FlexTimer driver:
https://patchwork.ozlabs.org/series/124718/mbox/
(https://patchwork.ozlabs.org/patch/1145999/)
https://patchwork.ozlabs.org/series/126942/mbox/
(https://patchwork.ozlabs.org/patch/1152085/)
4. Adjust drivers/soc/fsl/Makefile:
remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to
resolve a compilation error
> Description:
> - Reading configuration register RCPM_IPPDEXPCR1
> always return zero
>
> Workaround:
> - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
>
> Impact:
> - FlexTimer module will cannot wakeup system in
> deep sleep on SoC LS1021A
>
> Signed-off-by: Biwen Li
> ---
> Change in v4:
> - rename property name
> fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
>
> Change in v3:
> - update commit message
> - rename property name
> fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
>
> Change in v2:
> - fix stype problems
>
> drivers/soc/fsl/rcpm.c | 33 +
> 1 file changed, 33 insertions(+)
>
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..9a29c482fc2e 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
> #include
> #include
> #include
> +#include
> +#include
>
> #define RCPM_WAKEUP_CELL_MAX_SIZE7
>
> @@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
> struct rcpm *rcpm;
> u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
> int i, ret, idx;
> + struct regmap *scfg_addr_regmap = NULL;
> + u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
>
> rcpm = dev_get_drvdata(dev);
> if (!rcpm)
> @@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
> tmp |= value[i + 1];
> iowrite32be(tmp, rcpm->ippdexpcr_base +
> i * 4);
> }
> + /* Workaround of errata A-008646 on SoC LS1021A:
> + * There is a bug of register ippdexpcr1.
> + * Reading configuration register
> RCPM_IPPDEXPCR1
> + * always return zero. So save ippdexpcr1's
> value
> + * to register SCFG_SPARECR8.And the value of
> + * ippdexpcr1 will be read from SCFG_SPARECR8.
> + */
> + scfg_addr_regmap =
> syscon_regmap_lookup_by_phandle(np,
> +
> "fsl,ippdexpcr1-alt-addr");
> + if (scfg_addr_regmap && (1 == i)) {
> + if
> (of_property_read_u32_array(dev->of_node,
> + "fsl,ippdexpcr1-alt-addr",
> + reg_offset,
> + 1 + sizeof(u64)/sizeof(u32))) {
> + scfg_addr_regmap = NULL;
> + continue;
> + }
> + /* Read value from register
> SCFG_SPARECR8 */
> + regmap_read(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1]
> << (sizeof(u32) *
> 8) |
> + reg_offset[2])) &
> 0x),
> + _value);
> + /* Write value to register
> SCFG_SPARECR8 */
> + regmap_write(scfg_addr_regmap,
> + (u32)(((u64)(reg_offset[1]
> << (sizeof(u32) *
> 8) |
> + reg_offset[2])) &
> 0x),
> + tmp | reg_value);
> + }
> }
> }
> } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1
[v4, 2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep
The patch fixes a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li
---
Change in v4:
- update property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- None
arch/arm/boot/dts/ls1021a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..ae427f039e8b 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,6 +1000,12 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+ fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
};
ftm_alarm0: timer0@29d {
--
2.17.1
[v4, 3/3] Documentation: dt: binding: fsl: Add 'fsl, ippdexpcr1-alt-addr' property
The 'fsl,ippdexpcr1-alt-addr' property is used to handle an errata A-008646
on LS1021A
Signed-off-by: Biwen Li
---
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- update desc of the property 'fsl,rcpm-scfg'
.../devicetree/bindings/soc/fsl/rcpm.txt | 21 +++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..751a7655b694 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,13 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr1-alt-addr : The property is related to a hardware issue
+ on SoC LS1021A and only needed on SoC LS1021A.
+ Must include 1 + 2 entries.
+ The first entry must be a link to the SCFG device node.
+ The non-first entry must be offset of registers of SCFG.
+ The second and third entry compose an alt offset address
+ for IPPDEXPCR1(SCFG_SPARECR8)
Example:
The RCPM node for T4240:
@@ -43,6 +50,20 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+
+ /*
+* The second and third entry compose an alt offset
+* address for IPPDEXPCR1(SCFG_SPARECR8)
+*/
+ fsl,ippdexpcr1-alt-addr = < 0x0 0x51c>;
+ };
+
+
* Freescale RCPM Wakeup Source Device Tree Bindings
---
Required fsl,rcpm-wakeup property should be added to a device node if the
device
--
2.17.1
[v4,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Signed-off-by: Biwen Li
---
Change in v4:
- rename property name
fsl,ippdexpcr-alt-addr -> fsl,ippdexpcr1-alt-addr
Change in v3:
- update commit message
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..9a29c482fc2e 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+ struct regmap *scfg_addr_regmap = NULL;
+ u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,34 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base +
i * 4);
}
+ /* Workaround of errata A-008646 on SoC LS1021A:
+* There is a bug of register ippdexpcr1.
+* Reading configuration register
RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's
value
+* to register SCFG_SPARECR8.And the value of
+* ippdexpcr1 will be read from SCFG_SPARECR8.
+*/
+ scfg_addr_regmap =
syscon_regmap_lookup_by_phandle(np,
+
"fsl,ippdexpcr1-alt-addr");
+ if (scfg_addr_regmap && (1 == i)) {
+ if
(of_property_read_u32_array(dev->of_node,
+ "fsl,ippdexpcr1-alt-addr",
+ reg_offset,
+ 1 + sizeof(u64)/sizeof(u32))) {
+ scfg_addr_regmap = NULL;
+ continue;
+ }
+ /* Read value from register
SCFG_SPARECR8 */
+ regmap_read(scfg_addr_regmap,
+ (u32)(((u64)(reg_offset[1]
<< (sizeof(u32) * 8) |
+ reg_offset[2])) &
0x),
+ _value);
+ /* Write value to register
SCFG_SPARECR8 */
+ regmap_write(scfg_addr_regmap,
+(u32)(((u64)(reg_offset[1]
<< (sizeof(u32) * 8) |
+reg_offset[2])) &
0x),
+tmp | reg_value);
+ }
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
RE: [EXT] Re: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> Caution: EXT Email > > On Tue, Sep 24, 2019 at 11:27 PM Biwen Li wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to > > > > > > > > > > > handle an errata > > > > > > > > > > > A-008646 on LS1021A > > > > > > > > > > > > > > > > > > > > > > Signed-off-by: Biwen Li > > > > > > > > > > > --- > > > > > > > > > > > Change in v3: > > > > > > > > > > > - rename property name > > > > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr > > > > > > > > > > > > > > > > > > > > > > Change in v2: > > > > > > > > > > > - update desc of the property 'fsl,rcpm-scfg' > > > > > > > > > > > > > > > > > > > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > > | 14 > > > > > > > > > > > ++ > > > > > > > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > > > > > > > > > > > > > diff --git > > > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > > index 5a33619d881d..157dcf6da17c 100644 > > > > > > > > > > > --- > > > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm > > > > > > > > > > > +++ .txt > > > > > > > > > > > @@ -34,6 +34,11 @@ Chassis VersionExample > > > > > Chips > > > > > > > > > > > Optional properties: > > > > > > > > > > > - little-endian : RCPM register block is Little Endian. > > > > > > > > > > > Without it > > > > > > RCPM > > > > > > > > > > > will be Big Endian (default case). > > > > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property > > > > > > > > > > > + for SoC LS1021A, > > > > > > > > > > > > > > > > > > > > You probably should mention this is related to a > > > > > > > > > > hardware issue on LS1021a and only needed on LS1021a. > > > > > > > > > Okay, got it, thanks, I will add this in v4. > > > > > > > > > > > > > > > > > > > > > + Must include n + 1 entries (n = > > > > > > > > > > > + #fsl,rcpm-wakeup-cells, such > > > > as: > > > > > > > > > > > + #fsl,rcpm-wakeup-cells equal to 2, then must > > > > > > > > > > > + include > > > > > > > > > > > + 2 > > > > > > > > > > > + + > > > > > > > > > > > + 1 > > > > > > entries). > > > > > > > > > > > > > > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR > > > > > > > > > > registers on an > > > > > > SoC. > > > > > > > > > > However you are defining an offset to scfg registers here. > > > > > > > > > > Why these two are related? The length here should > > > > > > > > > > actually be related to the #address-cells of the soc/. > > > > > > > > > > But since this is only needed for LS1021, you can > > > > > > > > > just make it 3. > > > > > > > > > I need set the value of IPPDEXPCR resgiters from > > > > > > > > > ftm_alarm0 device node(fsl,rcpm-wakeup = < 0x0 > > > > > > > > > 0x2000>; > > > > > > > > > 0x0 is a value for IPPDE
RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> > > > > > > > > > > > > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle > > > > > > > > > an errata > > > > > > > > > A-008646 on LS1021A > > > > > > > > > > > > > > > > > > Signed-off-by: Biwen Li > > > > > > > > > --- > > > > > > > > > Change in v3: > > > > > > > > > - rename property name > > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr > > > > > > > > > > > > > > > > > > Change in v2: > > > > > > > > > - update desc of the property 'fsl,rcpm-scfg' > > > > > > > > > > > > > > > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 > > > > > > > > > ++ > > > > > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > > > > > > > > > diff --git > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > index 5a33619d881d..157dcf6da17c 100644 > > > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > @@ -34,6 +34,11 @@ Chassis VersionExample > > > Chips > > > > > > > > > Optional properties: > > > > > > > > > - little-endian : RCPM register block is Little Endian. > > > > > > > > > Without it > > > > RCPM > > > > > > > > > will be Big Endian (default case). > > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for > > > > > > > > > + SoC LS1021A, > > > > > > > > > > > > > > > > You probably should mention this is related to a hardware > > > > > > > > issue on LS1021a and only needed on LS1021a. > > > > > > > Okay, got it, thanks, I will add this in v4. > > > > > > > > > > > > > > > > > + Must include n + 1 entries (n = > > > > > > > > > + #fsl,rcpm-wakeup-cells, such > > as: > > > > > > > > > + #fsl,rcpm-wakeup-cells equal to 2, then must include > > > > > > > > > + 2 > > > > > > > > > + + > > > > > > > > > + 1 > > > > entries). > > > > > > > > > > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR > > > > > > > > registers on an > > > > SoC. > > > > > > > > However you are defining an offset to scfg registers here. > > > > > > > > Why these two are related? The length here should > > > > > > > > actually be related to the #address-cells of the soc/. > > > > > > > > But since this is only needed for LS1021, you can > > > > > > > just make it 3. > > > > > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 > > > > > > > device node(fsl,rcpm-wakeup = < 0x0 0x2000>; > > > > > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for > > > > IPPDEXPCR1). > > > > > > > But because of the hardware issue on LS1021A, I need store > > > > > > > the value of IPPDEXPCR registers to an alt address. So I > > > > > > > defining an offset to scfg registers, then RCPM driver get > > > > > > > an abosolute address from offset, RCPM driver write the > > > > > > > value of IPPDEXPCR registers to these abosolute > > > > > > > addresses(backup the value of IPPDEXPCR > > > > registers). > > > > > > > > > > > > I understand what you are trying to do. The problem is that > > > > > > the new fsl,ippdexpcr-alt-addr property contains a phandle and an > offset. > > > > > > The size of it shouldn't be related to #fs
RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> > > > > > > > > > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an > > > > > > > > errata > > > > > > > > A-008646 on LS1021A > > > > > > > > > > > > > > > > Signed-off-by: Biwen Li > > > > > > > > --- > > > > > > > > Change in v3: > > > > > > > > - rename property name > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr > > > > > > > > > > > > > > > > Change in v2: > > > > > > > > - update desc of the property 'fsl,rcpm-scfg' > > > > > > > > > > > > > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 > > > > > > > > ++ > > > > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > > > > > > > diff --git > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > index 5a33619d881d..157dcf6da17c 100644 > > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > @@ -34,6 +34,11 @@ Chassis Version Example > > Chips > > > > > > > > Optional properties: > > > > > > > > - little-endian : RCPM register block is Little Endian. > > > > > > > > Without it > > > RCPM > > > > > > > > will be Big Endian (default case). > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC > > > > > > > > + LS1021A, > > > > > > > > > > > > > > You probably should mention this is related to a hardware > > > > > > > issue on LS1021a and only needed on LS1021a. > > > > > > Okay, got it, thanks, I will add this in v4. > > > > > > > > > > > > > > > + Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such > as: > > > > > > > > + #fsl,rcpm-wakeup-cells equal to 2, then must include 2 > > > > > > > > + + > > > > > > > > + 1 > > > entries). > > > > > > > > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers > > > > > > > on an > > > SoC. > > > > > > > However you are defining an offset to scfg registers here. > > > > > > > Why these two are related? The length here should actually > > > > > > > be related to the #address-cells of the soc/. But since > > > > > > > this is only needed for LS1021, you can > > > > > > just make it 3. > > > > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 > > > > > > device node(fsl,rcpm-wakeup = < 0x0 0x2000>; > > > > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for > > > IPPDEXPCR1). > > > > > > But because of the hardware issue on LS1021A, I need store the > > > > > > value of IPPDEXPCR registers to an alt address. So I defining > > > > > > an offset to scfg registers, then RCPM driver get an abosolute > > > > > > address from offset, RCPM driver write the value of IPPDEXPCR > > > > > > registers to these abosolute addresses(backup the value of > > > > > > IPPDEXPCR > > > registers). > > > > > > > > > > I understand what you are trying to do. The problem is that the > > > > > new fsl,ippdexpcr-alt-addr property contains a phandle and an offset. > > > > > The size of it shouldn't be related to #fsl,rcpm-wakeup-cells. > > > > You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/* > > > > SCFG_SPARECR8 */ > > > > > > No. The #address-cell for the soc/ is 2, so the offset to scfg > > > should be 0x0 0x51c. The total size should be 3, but it shouldn't > > > be coming from #fsl,rcpm-wakeup-cells like you mentioned in the binding. > > Oh, I got it. You want that fsl,ippdexpcr-alt-add
RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> > > > > >
> > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an
> > > > > > errata
> > > > > > A-008646 on LS1021A
> > > > > >
> > > > > > Signed-off-by: Biwen Li
> > > > > > ---
> > > > > > Change in v3:
> > > > > > - rename property name
> > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > > > >
> > > > > > Change in v2:
> > > > > > - update desc of the property 'fsl,rcpm-scfg'
> > > > > >
> > > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > > > ++
> > > > > > 1 file changed, 14 insertions(+)
> > > > > >
> > > > > > diff --git
> > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > index 5a33619d881d..157dcf6da17c 100644
> > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips
> > > > > > Optional properties:
> > > > > > - little-endian : RCPM register block is Little Endian. Without it
> RCPM
> > > > > > will be Big Endian (default case).
> > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC
> > > > > > + LS1021A,
> > > > >
> > > > > You probably should mention this is related to a hardware issue
> > > > > on LS1021a and only needed on LS1021a.
> > > > Okay, got it, thanks, I will add this in v4.
> > > > >
> > > > > > + Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > > > > > + #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1
> entries).
> > > > >
> > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an
> SoC.
> > > > > However you are defining an offset to scfg registers here. Why
> > > > > these two are related? The length here should actually be
> > > > > related to the #address-cells of the soc/. But since this is
> > > > > only needed for LS1021, you can
> > > > just make it 3.
> > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device
> > > > node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > > > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for
> IPPDEXPCR1).
> > > > But because of the hardware issue on LS1021A, I need store the
> > > > value of IPPDEXPCR registers to an alt address. So I defining an
> > > > offset to scfg registers, then RCPM driver get an abosolute
> > > > address from offset, RCPM driver write the value of IPPDEXPCR
> > > > registers to these abosolute addresses(backup the value of IPPDEXPCR
> registers).
> > >
> > > I understand what you are trying to do. The problem is that the new
> > > fsl,ippdexpcr-alt-addr property contains a phandle and an offset.
> > > The size of it shouldn't be related to #fsl,rcpm-wakeup-cells.
> > You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/*
> > SCFG_SPARECR8 */
>
> No. The #address-cell for the soc/ is 2, so the offset to scfg should be 0x0
> 0x51c. The total size should be 3, but it shouldn't be coming from
> #fsl,rcpm-wakeup-cells like you mentioned in the binding.
Oh, I got it. You want that fsl,ippdexpcr-alt-add is relative with
#address-cells instead of #fsl,rcpm-wakeup-cells.
>
> > >
> > > > >
> > > > > > + The first entry must be a link to the SCFG device node.
> > > > > > + The non-first entry must be offset of registers of SCFG.
> > > > > >
> > > > > > Example:
> > > > > > The RCPM node for T4240:
> > > > > > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > > > > > #fsl,rcpm-wakeup-cells = <2>;
> > > > > > };
> > > > > >
> > > > > > +The RCPM node for LS1021A:
> > > > > > + rcpm: rcpm@1ee2140 {
> > > > > > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-
> > 2.1+";
> > > > > > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > > > > > + #fsl,rcpm-wakeup-cells = <2>;
> > > > > > + fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > > > > > SCFG_SPARECR8 */
> > > > > > + };
> > > > > > +
> > > > > > +
> > > > > > * Freescale RCPM Wakeup Source Device Tree Bindings
> > > > > > ---
> > > > > > Required fsl,rcpm-wakeup property should be added to a device
> > > > > > node if the device
> > > > > > --
> > > > > > 2.17.1
RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> > > >
> > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata
> > > > A-008646 on LS1021A
> > > >
> > > > Signed-off-by: Biwen Li
> > > > ---
> > > > Change in v3:
> > > > - rename property name
> > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> > > >
> > > > Change in v2:
> > > > - update desc of the property 'fsl,rcpm-scfg'
> > > >
> > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > > > ++
> > > > 1 file changed, 14 insertions(+)
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > index 5a33619d881d..157dcf6da17c 100644
> > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > > > @@ -34,6 +34,11 @@ Chassis Version Example Chips
> > > > Optional properties:
> > > > - little-endian : RCPM register block is Little Endian. Without it
> > > > RCPM
> > > > will be Big Endian (default case).
> > > > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC
> > > > + LS1021A,
> > >
> > > You probably should mention this is related to a hardware issue on
> > > LS1021a and only needed on LS1021a.
> > Okay, got it, thanks, I will add this in v4.
> > >
> > > > + Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > > > + #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
> > >
> > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an SoC.
> > > However you are defining an offset to scfg registers here. Why
> > > these two are related? The length here should actually be related
> > > to the #address-cells of the soc/. But since this is only needed
> > > for LS1021, you can
> > just make it 3.
> > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device
> > node(fsl,rcpm-wakeup = < 0x0 0x2000>;
> > 0x0 is a value for IPPDEXPCR0, 0x2000 is a value for IPPDEXPCR1).
> > But because of the hardware issue on LS1021A, I need store the value
> > of IPPDEXPCR registers to an alt address. So I defining an offset to
> > scfg registers, then RCPM driver get an abosolute address from offset,
> > RCPM driver write the value of IPPDEXPCR registers to these abosolute
> > addresses(backup the value of IPPDEXPCR registers).
>
> I understand what you are trying to do. The problem is that the new
> fsl,ippdexpcr-alt-addr property contains a phandle and an offset. The size
> of it shouldn't be related to #fsl,rcpm-wakeup-cells.
You maybe like this: fsl,ippdexpcr-alt-addr = < 0x51c>;/* SCFG_SPARECR8 */
>
> > >
> > > > + The first entry must be a link to the SCFG device node.
> > > > + The non-first entry must be offset of registers of SCFG.
> > > >
> > > > Example:
> > > > The RCPM node for T4240:
> > > > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > > > #fsl,rcpm-wakeup-cells = <2>;
> > > > };
> > > >
> > > > +The RCPM node for LS1021A:
> > > > + rcpm: rcpm@1ee2140 {
> > > > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
> > > > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > > > + #fsl,rcpm-wakeup-cells = <2>;
> > > > + fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > > > SCFG_SPARECR8 */
> > > > + };
> > > > +
> > > > +
> > > > * Freescale RCPM Wakeup Source Device Tree Bindings
> > > > ---
> > > > Required fsl,rcpm-wakeup property should be added to a device
> > > > node if the device
> > > > --
> > > > 2.17.1
RE: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property
> >
> > The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata
> > A-008646 on LS1021A
> >
> > Signed-off-by: Biwen Li
> > ---
> > Change in v3:
> > - rename property name
> > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
> >
> > Change in v2:
> > - update desc of the property 'fsl,rcpm-scfg'
> >
> > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14
> > ++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > index 5a33619d881d..157dcf6da17c 100644
> > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> > @@ -34,6 +34,11 @@ Chassis Version Example Chips
> > Optional properties:
> > - little-endian : RCPM register block is Little Endian. Without it RCPM
> > will be Big Endian (default case).
> > + - fsl,ippdexpcr-alt-addr : Must add the property for SoC LS1021A,
>
> You probably should mention this is related to a hardware issue on LS1021a
> and only needed on LS1021a.
Okay, got it, thanks, I will add this in v4.
>
> > + Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
> > + #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
>
> #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR registers on an SoC.
> However you are defining an offset to scfg registers here. Why these two
> are related? The length here should actually be related to the #address-cells
> of the soc/. But since this is only needed for LS1021, you can just make it
> 3.
I need set the value of IPPDEXPCR resgiters from ftm_alarm0 device
node(fsl,rcpm-wakeup = < 0x0 0x2000>;
0x0 is a value for IPPDEXPCR0, 0x2000 is a value for IPPDEXPCR1).
But because of the hardware issue on LS1021A, I need store the value of
IPPDEXPCR registers
to an alt address. So I defining an offset to scfg registers, then RCPM driver
get an abosolute address from offset,
RCPM driver write the value of IPPDEXPCR registers to these abosolute
addresses(backup the value of IPPDEXPCR registers).
>
> > + The first entry must be a link to the SCFG device node.
> > + The non-first entry must be offset of registers of SCFG.
> >
> > Example:
> > The RCPM node for T4240:
> > @@ -43,6 +48,15 @@ The RCPM node for T4240:
> > #fsl,rcpm-wakeup-cells = <2>;
> > };
> >
> > +The RCPM node for LS1021A:
> > + rcpm: rcpm@1ee2140 {
> > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
> > + reg = <0x0 0x1ee2140 0x0 0x8>;
> > + #fsl,rcpm-wakeup-cells = <2>;
> > + fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
> > SCFG_SPARECR8 */
> > + };
> > +
> > +
> > * Freescale RCPM Wakeup Source Device Tree Bindings
> > ---
> > Required fsl,rcpm-wakeup property should be added to a device node if
> > the device
> > --
> > 2.17.1
Re: [v3,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Hi all,
the linux patches depended by RCPM driver,FlexTimer driver and FlexTimer dts,
need apply these patches as follows:
1. RCPM driver:
https://patchwork.kernel.org/series/162731/mbox/(https://patchwork.kernel.org/patch/11105279/)
2. FlexTimer dts:
https://lore.kernel.org/patchwork/series/405653/mbox/(https://lore.kernel.org/patchwork/patch/1112493/)
3. FlexTimer driver:
https://patchwork.ozlabs.org/series/124718/mbox/(https://patchwork.ozlabs.org/patch/1145999/)
https://patchwork.ozlabs.org/series/126942/mbox/(https://patchwork.ozlabs.org/patch/1152085/)
4. Adjust drivers/soc/fsl/Makefile:
remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to resolve a
compilation error
获取 Outlook for Android<https://aka.ms/ghei36>
From: Biwen Li
Sent: Tuesday, September 24, 2019 10:45:46 AM
To: Leo Li ; shawn...@kernel.org ;
robh...@kernel.org ; mark.rutl...@arm.com
; Ran Wang
Cc: linuxppc-dev@lists.ozlabs.org ;
linux-arm-ker...@lists.infradead.org ;
linux-ker...@vger.kernel.org ;
devicet...@vger.kernel.org ; Biwen Li
Subject: [v3,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Signed-off-by: Biwen Li
---
Change in v3:
- update commit message
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..7f42b17d3f29 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+ struct regmap * scfg_addr_regmap = NULL;
+ u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,22 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base
+ i * 4);
}
+ /* Workaround of errata A-008646 on SoC
LS1021A: There is a bug of
+* register ippdexpcr1. Reading configuration
register RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's
value to register SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read
from SCFG_SPARECR8.
+*/
+ scfg_addr_regmap =
syscon_regmap_lookup_by_phandle(np, "fsl,ippdexpcr-alt-addr");
+ if (scfg_addr_regmap) {
+ if
(of_property_read_u32_array(dev->of_node,
+ "fsl,ippdexpcr-alt-addr",
reg_offset, rcpm->wakeup_cells + 1)) {
+ scfg_addr_regmap = NULL;
+ continue;
+ }
+ regmap_read(scfg_addr_regmap,
reg_offset[i + 1], _value);
+ /* Write value to register
SCFG_SPARECR8 */
+ regmap_write(scfg_addr_regmap,
reg_offset[i + 1], tmp | reg_value);
+ }
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
[v3, 3/3] Documentation: dt: binding: fsl: Add 'fsl, ippdexpcr-alt-addr' property
The 'fsl,ippdexpcr-alt-addr' property is used to handle an errata A-008646
on LS1021A
Signed-off-by: Biwen Li
---
Change in v3:
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- update desc of the property 'fsl,rcpm-scfg'
Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 ++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..157dcf6da17c 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,11 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,ippdexpcr-alt-addr : Must add the property for SoC LS1021A,
+ Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
+ #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
+ The first entry must be a link to the SCFG device node.
+ The non-first entry must be offset of registers of SCFG.
Example:
The RCPM node for T4240:
@@ -43,6 +48,15 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+ fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+ };
+
+
* Freescale RCPM Wakeup Source Device Tree Bindings
---
Required fsl,rcpm-wakeup property should be added to a device node if the
device
--
2.17.1
[v3, 2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep
The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li
---
Change in v3:
- update property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- None
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..383b2dcd5720 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,6 +1000,7 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+ fsl,ippdexpcr-alt-addr = < 0x0 0x51c>; /*
SCFG_SPARECR8 */
};
ftm_alarm0: timer0@29d {
--
2.17.1
[v3,1/3] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zero
Workaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021A
Signed-off-by: Biwen Li
---
Change in v3:
- update commit message
- rename property name
fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..7f42b17d3f29 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -29,6 +31,9 @@ static int rcpm_pm_prepare(struct device *dev)
struct rcpm *rcpm;
u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1], tmp;
int i, ret, idx;
+ struct regmap * scfg_addr_regmap = NULL;
+ u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
rcpm = dev_get_drvdata(dev);
if (!rcpm)
@@ -63,6 +68,22 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base +
i * 4);
}
+ /* Workaround of errata A-008646 on SoC
LS1021A: There is a bug of
+* register ippdexpcr1. Reading configuration
register RCPM_IPPDEXPCR1
+* always return zero. So save ippdexpcr1's
value to register SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read
from SCFG_SPARECR8.
+*/
+ scfg_addr_regmap =
syscon_regmap_lookup_by_phandle(np, "fsl,ippdexpcr-alt-addr");
+ if (scfg_addr_regmap) {
+ if
(of_property_read_u32_array(dev->of_node,
+ "fsl,ippdexpcr-alt-addr",
reg_offset, rcpm->wakeup_cells + 1)) {
+ scfg_addr_regmap = NULL;
+ continue;
+ }
+ regmap_read(scfg_addr_regmap,
reg_offset[i + 1], _value);
+ /* Write value to register
SCFG_SPARECR8 */
+ regmap_write(scfg_addr_regmap,
reg_offset[i + 1], tmp | reg_value);
+ }
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
RE: [v2,1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A
Hi all,
the linux patches depended by RCPM driver,FlexTimer driver and
FlexTimer dts, need apply these patches as follows:
1. RCPM driver:
https://patchwork.kernel.org/series/162731/mbox/
(https://patchwork.kernel.org/patch/11105279/)
2. FlexTimer dts:
https://lore.kernel.org/patchwork/series/405653/mbox/
(https://lore.kernel.org/patchwork/patch/1112493/)
3. FlexTimer driver:
https://patchwork.ozlabs.org/series/124718/mbox/
(https://patchwork.ozlabs.org/patch/1145999/)
https://patchwork.ozlabs.org/series/126942/mbox/
(https://patchwork.ozlabs.org/patch/1152085/)
4. Adjust drivers/soc/fsl/Makefile:
remove the line 'obj-y += ftm_alarm.o' in
drivers/soc/fsl/Makefile to resolve a compilation error
> Why:
> - Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
> Register RCPM_IPPDEXPCR1's default value is zero.
> So the register value that reading from register
> RCPM_IPPDEXPCR1 is always zero.
>
> How:
> - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
>
> Signed-off-by: Biwen Li
> ---
> Change in v2:
> - fix stype problems
>
> drivers/soc/fsl/rcpm.c | 27 +++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..0b710c24999c 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
> #include
> #include
> #include
> +#include
> +#include
>
> #define RCPM_WAKEUP_CELL_MAX_SIZE7
>
> @@ -63,6 +65,31 @@ static int rcpm_pm_prepare(struct device *dev)
> tmp |= value[i + 1];
> iowrite32be(tmp, rcpm->ippdexpcr_base +
> i * 4);
> }
> + #ifdef CONFIG_SOC_LS1021A
> + /* Workaround: There is a bug of register
> ippdexpcr1,
> + * cannot write it but can read it.Tt's default
> value is zero,
> + * then read it will always returns zero.
> + * So save ippdexpcr1's value to register
> SCFG_SPARECR8.
> + * And the value of ippdexpcr1 will be read from
> SCFG_SPARECR8.
> + */
> + {
> + struct regmap *rcpm_scfg_regmap = NULL;
> + u32
> reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
> +
> + rcpm_scfg_regmap =
> syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
> + if (rcpm_scfg_regmap) {
> + if
> (of_property_read_u32_array(dev->of_node,
> + "fsl,rcpm-scfg", reg_offset,
> rcpm->wakeup_cells + 1)) {
> + rcpm_scfg_regmap = NULL;
> + continue;
> + }
> + regmap_read(rcpm_scfg_regmap,
> reg_offset[i + 1],
> _value);
> + /* Write value to register
> SCFG_SPARECR8 */
> + regmap_write(rcpm_scfg_regmap,
> reg_offset[i +
> 1], tmp | reg_value);
> + }
> + }
> + #endif //CONFIG_SOC_LS1021A
> }
> }
> } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1
[v2, 3/3] Documentation: dt: binding: fsl: Add 'fsl, rcpm-scfg' property
The 'fsl,rcpm-scfg' property is used to fix a bug
that FlexTimer cannot wakeup system in deep sleep on LS1021A
Signed-off-by: Biwen Li
---
Change in v2:
- update desc of the property 'fsl,rcpm-scfg'
Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 13 +
1 file changed, 13 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..f8dce247357a 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,11 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,rcpm-scfg : LS1021A has defect of failing to get data when
+ reading ippdexpcr. So add this property to help store one
+ copy to specified scfg_scrachpad_addr register for others
+ (such as U-Boot) reference. The first entry must be a link to the
+ SCFG device node, then followed by the offset of registers of SCFG.
Example:
The RCPM node for T4240:
@@ -43,6 +48,14 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+ fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+ };
+
* Freescale RCPM Wakeup Source Device Tree Bindings
---
Required fsl,rcpm-wakeup property should be added to a device node if the
device
--
2.17.1
[v2, 2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep
The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li
---
Change in v2:
- None
arch/arm/boot/dts/ls1021a.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..377bb4717584 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,12 +1000,13 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+ fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
};
ftm_alarm0: timer0@29d {
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d 0x0 0x1>;
- fsl,rcpm-wakeup = < 0x0 0x2000>;
+ fsl,rcpm-wakeup = < 0x0 0x3000>; /* FlexTimer1
and OCRAM1 are not powerdown during LPM20(sleep) */
interrupts = ;
big-endian;
};
--
2.17.1
[v2, 1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A
Why:
- Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
Register RCPM_IPPDEXPCR1's default value is zero.
So the register value that reading from register
RCPM_IPPDEXPCR1 is always zero.
How:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Signed-off-by: Biwen Li
---
Change in v2:
- fix stype problems
drivers/soc/fsl/rcpm.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..0b710c24999c 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -63,6 +65,31 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base +
i * 4);
}
+ #ifdef CONFIG_SOC_LS1021A
+ /* Workaround: There is a bug of register
ippdexpcr1,
+* cannot write it but can read it.Tt's default
value is zero,
+* then read it will always returns zero.
+* So save ippdexpcr1's value to register
SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read
from SCFG_SPARECR8.
+*/
+ {
+ struct regmap *rcpm_scfg_regmap = NULL;
+ u32
reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
+
+ rcpm_scfg_regmap =
syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
+ if (rcpm_scfg_regmap) {
+ if
(of_property_read_u32_array(dev->of_node,
+ "fsl,rcpm-scfg",
reg_offset, rcpm->wakeup_cells + 1)) {
+ rcpm_scfg_regmap = NULL;
+ continue;
+ }
+ regmap_read(rcpm_scfg_regmap,
reg_offset[i + 1], _value);
+ /* Write value to register
SCFG_SPARECR8 */
+ regmap_write(rcpm_scfg_regmap,
reg_offset[i + 1], tmp | reg_value);
+ }
+ }
+ #endif //CONFIG_SOC_LS1021A
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
RE: [1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A
Hi all,
the linux patch depended by RCPM driver,FlexTimer driver and FlexTimer
dts, need apply these patches as follows:
1. RCPM driver:
https://patchwork.kernel.org/series/162731/mbox/
(https://patchwork.kernel.org/patch/11105279/)
2. FlexTimer dts:
https://lore.kernel.org/patchwork/series/405653/mbox/
(https://lore.kernel.org/patchwork/patch/1112493/)
3. FlexTimer driver:
https://patchwork.ozlabs.org/series/124718/mbox/
(https://patchwork.ozlabs.org/patch/1145999/)
https://patchwork.ozlabs.org/series/126942/mbox/
(https://patchwork.ozlabs.org/patch/1152085/)
4. Adjust drivers/soc/fsl/Makefile:
remove the line 'obj-y += ftm_alarm.o' in drivers/soc/fsl/Makefile to resolve a
compilation error
> Why:
> - Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
> Register RCPM_IPPDEXPCR1's default value is zero.
> So the register value that reading from register
> RCPM_IPPDEXPCR1 is always zero.
>
> How:
> - Save register RCPM_IPPDEXPCR1's value to
> register SCFG_SPARECR8.(uboot's psci also
> need reading value from the register SCFG_SPARECR8
> to set register RCPM_IPPDEXPCR1)
>
> Signed-off-by: Biwen Li
> ---
> drivers/soc/fsl/rcpm.c | 29 +
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c index
> 82c0ad5e663e..2bf37d38efe5 100644
> --- a/drivers/soc/fsl/rcpm.c
> +++ b/drivers/soc/fsl/rcpm.c
> @@ -13,6 +13,8 @@
> #include
> #include
> #include
> +#include
> +#include
>
> #define RCPM_WAKEUP_CELL_MAX_SIZE7
>
> @@ -63,6 +65,33 @@ static int rcpm_pm_prepare(struct device *dev)
> tmp |= value[i + 1];
> iowrite32be(tmp, rcpm->ippdexpcr_base +
> i * 4);
> }
> + #ifdef CONFIG_SOC_LS1021A
> + /* Workaround: There is a bug of register
> ippdexpcr1,
> + * cannot write it but can read it.Tt's default
> value is zero,
> + * then read it will always returns zero.
> + * So save ippdexpcr1's value to register
> SCFG_SPARECR8.
> + * And the value of ippdexpcr1 will be read from
> SCFG_SPARECR8.
> + */
> + {
> + struct regmap * rcpm_scfg_regmap = NULL;
> + u32
> reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
> + u32 reg_value = 0;
> +
> + rcpm_scfg_regmap =
> syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
> + if (rcpm_scfg_regmap) {
> + if
> (of_property_read_u32_array(dev->of_node,
> + "fsl,rcpm-scfg", reg_offset,
> rcpm->wakeup_cells + 1)) {
> + rcpm_scfg_regmap = NULL;
> + continue;
> + }
> + regmap_read(rcpm_scfg_regmap,
> reg_offset[i + 1],
> _value);
> + /* Write value to register
> SCFG_SPARECR8 */
> + regmap_write(rcpm_scfg_regmap,
> reg_offset[i +
> 1], tmp | reg_value);
> + }
> + }
> + #endif
> +
> +
> }
> }
> } while (ws = wakeup_source_get_next(ws));
> --
> 2.17.1
[1/3] soc: fsl: fix that flextimer cannot wakeup system in deep sleep on LS1021A
Why:
- Cannot write register RCPM_IPPDEXPCR1 on LS1021A,
Register RCPM_IPPDEXPCR1's default value is zero.
So the register value that reading from register
RCPM_IPPDEXPCR1 is always zero.
How:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)
Signed-off-by: Biwen Li
---
drivers/soc/fsl/rcpm.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/fsl/rcpm.c b/drivers/soc/fsl/rcpm.c
index 82c0ad5e663e..2bf37d38efe5 100644
--- a/drivers/soc/fsl/rcpm.c
+++ b/drivers/soc/fsl/rcpm.c
@@ -13,6 +13,8 @@
#include
#include
#include
+#include
+#include
#define RCPM_WAKEUP_CELL_MAX_SIZE 7
@@ -63,6 +65,33 @@ static int rcpm_pm_prepare(struct device *dev)
tmp |= value[i + 1];
iowrite32be(tmp, rcpm->ippdexpcr_base +
i * 4);
}
+ #ifdef CONFIG_SOC_LS1021A
+ /* Workaround: There is a bug of register
ippdexpcr1,
+* cannot write it but can read it.Tt's default
value is zero,
+* then read it will always returns zero.
+* So save ippdexpcr1's value to register
SCFG_SPARECR8.
+* And the value of ippdexpcr1 will be read
from SCFG_SPARECR8.
+*/
+ {
+ struct regmap * rcpm_scfg_regmap = NULL;
+ u32
reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
+ u32 reg_value = 0;
+
+ rcpm_scfg_regmap =
syscon_regmap_lookup_by_phandle(np, "fsl,rcpm-scfg");
+ if (rcpm_scfg_regmap) {
+ if
(of_property_read_u32_array(dev->of_node,
+ "fsl,rcpm-scfg",
reg_offset, rcpm->wakeup_cells + 1)) {
+ rcpm_scfg_regmap = NULL;
+ continue;
+ }
+ regmap_read(rcpm_scfg_regmap,
reg_offset[i + 1], _value);
+ /* Write value to register
SCFG_SPARECR8 */
+ regmap_write(rcpm_scfg_regmap,
reg_offset[i + 1], tmp | reg_value);
+ }
+ }
+ #endif
+
+
}
}
} while (ws = wakeup_source_get_next(ws));
--
2.17.1
[3/3] Documentation: dt: binding: fsl: Add 'fsl,rcpm-scfg' property
The 'fsl,rcpm-scfg' property is used to fix a bug
that FlexTimer cannot wakeup system in deep sleep on LS1021A
Signed-off-by: Biwen Li
---
.../devicetree/bindings/soc/fsl/rcpm.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
index 5a33619d881d..31e22f092b51 100644
--- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
@@ -34,6 +34,12 @@ Chassis Version Example Chips
Optional properties:
- little-endian : RCPM register block is Little Endian. Without it RCPM
will be Big Endian (default case).
+ - fsl,rcpm-scfg : Must add the property for SoC LS1021A,
+ Must include n + 1 entries (n = #fsl,rcpm-wakeup-cells, such as:
+ #fsl,rcpm-wakeup-cells equal to 2, then must include 2 + 1 entries).
+ The first entry must be a link to the SCFG device node.
+ The non-first entry must be offset of registers of SCFG.
+ (Currently only support SoC LS1021A)
Example:
The RCPM node for T4240:
@@ -43,6 +49,15 @@ The RCPM node for T4240:
#fsl,rcpm-wakeup-cells = <2>;
};
+The RCPM node for LS1021A:
+ rcpm: rcpm@1ee2140 {
+ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1ee2140 0x0 0x8>;
+ #fsl,rcpm-wakeup-cells = <2>;
+ fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
+ };
+
+
* Freescale RCPM Wakeup Source Device Tree Bindings
---
Required fsl,rcpm-wakeup property should be added to a device node if the
device
--
2.17.1
[2/3] arm: dts: ls1021a: fix that FlexTimer cannot wakeup system in deep sleep
The patch fix a bug that FlexTimer cannot
wakeup system in deep sleep.
Signed-off-by: Biwen Li
---
arch/arm/boot/dts/ls1021a.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index e3973b611c3a..377bb4717584 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -1000,12 +1000,13 @@
compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+";
reg = <0x0 0x1ee2140 0x0 0x8>;
#fsl,rcpm-wakeup-cells = <2>;
+ fsl,rcpm-scfg = < 0x0 0x51c>; /* SCFG_SPARECR8 */
};
ftm_alarm0: timer0@29d {
compatible = "fsl,ls1021a-ftm-alarm";
reg = <0x0 0x29d 0x0 0x1>;
- fsl,rcpm-wakeup = < 0x0 0x2000>;
+ fsl,rcpm-wakeup = < 0x0 0x3000>; /* FlexTimer1
and OCRAM1 are not powerdown during LPM20(sleep) */
interrupts = ;
big-endian;
};
--
2.17.1
