benchmarking it was determined that avoiding C in the
common case is a performance benefit. The full check in asm greatly
complicated that codepath for a negligible performance gain and the
trade-off was deemed not worth it.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/i
- Reordered some code in basic-asm.h and neatened some comments
Cyril Bur (9):
selftests/powerpc: Test the preservation of FPU and VMX regs across
syscall
selftests/powerpc: Test preservation of FPU and VMX regs across
preemption
selftests/powerpc: Test FPU and VMX regs in signal
Loop in assembly checking the registers with many threads.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore| 2 +
tools/testing/selftests/powerpc/math/Makefile | 5 +-
tools/testing/selftests/powerpc/math/fpu_asm.S
Load up the non volatile FPU and VMX regs and ensure that they are the
expected value in a signal handler
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore | 2 +
tools/testing/selftests/powerpc/math/Makefile | 4 +-
tools/t
to userspace with hot
registers avoiding a possibly pointless reload of FPU register state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/fpu.S| 21 -
arch/powerpc/kernel/process.c
On Tue, 23 Feb 2016 14:38:14 +1100
Cyril Bur <cyril...@gmail.com> wrote:
> Test that the non volatile floating point and Altivec registers get
> correctly preserved across the fork() syscall.
>
> fork() works nicely for this purpose, the registers should be the same for
>
On Mon, 29 Feb 2016 17:53:42 +1100
Cyril Bur <cyril...@gmail.com> wrote:
Apologies this should have had a Version 6 prefix!
> Cover-letter for V1 of the series is at
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-November/136350.html
>
> Cover-letter for V2 of the se
On Mon, 29 Feb 2016 22:10:13 +1100 (AEDT)
Michael Ellerman wrote:
> Hi Suraj,
>
> On Mon, 2016-29-02 at 06:29:55 UTC, Suraj Jitindar Singh wrote:
> > LTO can cause GCC to inline some functions which have attributes set. The
>
> You should define what LTO is the first
On Thu, 25 Feb 2016 11:52:05 +0530
"Naveen N. Rao" <naveen.n@linux.vnet.ibm.com> wrote:
> On 2016/02/25 10:44AM, Cyril Bur wrote:
> > On Wed, 24 Feb 2016 19:57:38 +0530
> > "Naveen N. Rao" <naveen.n@linux.vnet.ibm.com> wrote:
>
On Wed, 24 Feb 2016 19:57:38 +0530
"Naveen N. Rao" <naveen.n@linux.vnet.ibm.com> wrote:
> On 2016/02/23 02:38PM, Cyril Bur wrote:
> > Test that the non volatile floating point and Altivec registers get
> > correctly preserved across the fork() syscal
reload of VEC state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/process.c| 12 +++-
arch/powerpc/kernel/vector.S | 24
3 files changed, 17 insertions(+), 22 deletions(-)
the saving of registers to thread structs and leave
threads MSR with bits enabled.
This patch introduces no functional change.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/reg.h | 8
arch/powerpc/include/asm/switch_to.h | 7 +++
arch/powerpc/
Test that the non volatile floating point and Altivec registers get
correctly preserved across the fork() syscall.
fork() works nicely for this purpose, the registers should be the same for
both parent and child
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/p
with the custom ASM.
- Added some extra debugging output to the vmx_signal testcase
- Fixed comments in testing code
- Updated VSX test code to use GCC Altivec macros
Cyril Bur (9):
selftests/powerpc: Test the preservation of FPU and VMX regs across
syscall
selftests/powerpc: Test preservation
Load up the non volatile FPU and VMX regs and ensure that they are the
expected value in a signal handler
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore | 2 +
tools/testing/selftests/powerpc/math/Makefile | 4 +-
tools/t
are hot while not having MSR_{FP,VEC,VSX} means that the
registers must be loaded. This allows for a smarter return to userspace.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/process.c
benchmarking it was determined that avoiding C in the
common case is a performance benefit. The full check in asm greatly
complicated that codepath for a negligible performance gain and the
trade-off was deemed not worth it.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/i
pointless reload of VSX state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 4
arch/powerpc/kernel/ppc_ksyms.c | 4
arch/powerpc/kernel/process.c| 42 +---
arch/powerpc/kernel/vector.S
to userspace with hot
registers avoiding a possibly pointless reload of FPU register state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/fpu.S| 21 -
arch/powerpc/kernel/process.c
Loop in assembly checking the registers with many threads.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore| 2 +
tools/testing/selftests/powerpc/math/Makefile | 5 +-
tools/testing/selftests/powerpc/math/fpu_asm.S
Loop in assembly checking the registers with many threads.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore| 2 +
tools/testing/selftests/powerpc/math/Makefile | 5 +-
tools/testing/selftests/powerpc/math/fpu_asm.S
are hot while not having MSR_{FP,VEC,VSX} means that the
registers must be loaded. This allows for a smarter return to userspace.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/process.c
Test that the non volatile floating point and Altivec registers get
correctly preserved across the fork() syscall.
fork() works nicely for this purpose, the registers should be the same for
both parent and child
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/p
benchmarking it was determined that avoiding C in the
common case is a performance benefit. The full check in asm greatly
complicated that codepath for a negligible performance gain and the
trade-off was deemed not worth it.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/i
pointless reload of VSX state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 4
arch/powerpc/kernel/ppc_ksyms.c | 4
arch/powerpc/kernel/process.c| 42 +---
arch/powerpc/kernel/vector.S
reload of VEC state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/process.c| 12 +++-
arch/powerpc/kernel/vector.S | 24
3 files changed, 17 insertions(+), 22 deletions(-)
to userspace with hot
registers avoiding a possibly pointless reload of FPU register state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/fpu.S| 21 -
arch/powerpc/kernel/process.c
the saving of registers to thread structs and leave
threads MSR with bits enabled.
This patch introduces no functional change.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 7 +++
arch/powerpc/kernel/process.c
Load up the non volatile FPU and VMX regs and ensure that they are the
expected value in a signal handler
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore | 2 +
tools/testing/selftests/powerpc/math/Makefile | 4 +-
tools/t
commit message in 4/9 better reflect the patch
- Removed overuse of #ifdef blocks and redundant condition in 5/9
- Split 6/8 in two to better prepare for 7,8,9
- Removed #ifdefs in 6/9
Cyril Bur (9):
selftests/powerpc: Test the preservation of FPU and VMX regs across
syscall
selftests
On Mon, 25 Jan 2016 11:04:23 +1100
Balbir Singh <bsinghar...@gmail.com> wrote:
> On Thu, 21 Jan 2016 11:55:44 +1100
> Cyril Bur <cyril...@gmail.com> wrote:
>
> > Currently when threads get scheduled off they always giveup the FPU,
> > Altivec (VMX) and Vector (V
#ifdefs in V3 (6/9)
- Reordered some conditions in if statements
Cyril Bur (9):
selftests/powerpc: Test the preservation of FPU and VMX regs across
syscall
selftests/powerpc: Test preservation of FPU and VMX regs across
preemption
selftests/powerpc: Test FPU and VMX regs in signal ucontext
Loop in assembly checking the registers with many threads.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore| 2 +
tools/testing/selftests/powerpc/math/Makefile | 5 +-
tools/testing/selftests/powerpc/math/fpu_asm.S
Load up the non volatile FPU and VMX regs and ensure that they are the
expected value in a signal handler
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/.gitignore | 2 +
tools/testing/selftests/powerpc/math/Makefile | 4 +-
tools/t
Test that the non volatile floating point and Altivec registers get
correctly preserved across the fork() syscall.
fork() works nicely for this purpose, the registers should be the same for
both parent and child
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/p
are hot while not having MSR_{FP,VEC,VSX} means that the
registers must be loaded. This allows for a smarter return to userspace.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/process.c
benchmarking it was determined that avoiding C in the
common case is a performance benefit. The full check in asm greatly
complicated that codepath for a negligible performance gain and the
trade-off was deemed not worth it.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/i
the saving of registers to thread structs and leave
threads MSR with bits enabled.
This patch introduces no functional change.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/reg.h | 8
arch/powerpc/include/asm/switch_to.h | 7 +++
arch/powerpc/
reload of VEC state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/process.c| 12 +++-
arch/powerpc/kernel/vector.S | 24
3 files changed, 17 insertions(+), 22 deletions(-)
to userspace with hot
registers avoiding a possibly pointless reload of FPU register state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 3 ++-
arch/powerpc/kernel/fpu.S| 21 -
arch/powerpc/kernel/process.c
pointless reload of VSX state.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 4
arch/powerpc/kernel/ppc_ksyms.c | 4
arch/powerpc/kernel/process.c| 42 +---
arch/powerpc/kernel/vector.S
On Mon, 15 Feb 2016 22:29:17 +0530
"Naveen N. Rao" <naveen.n@linux.vnet.ibm.com> wrote:
> On 2016/02/15 04:07PM, Cyril Bur wrote:
> > Test that the non volatile floating point and Altivec registers get
> > correctly preserved across the fork() syscal
.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/pmu/lib.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/pmu/lib.c
b/tools/testing/selftests/powerpc/pmu/lib.c
index a361ad3..8b992fa 100644
--- a/tools/t
IL *.out
cpu_event_pinned_vs_ebb_test.out:[FAIL] Test FAILED on line 87
ipc_unmuxed.out:[FAIL] Test FAILED on line 38
per_event_excludes.out:[FAIL] Test FAILED on line 95
There were no matches for grep SKIP *.out for any of the four.
This patch appears to not have affected any of the tests.
Reviewed-
instruction.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
These patches need to be applied on to of my rework of FPU/VMX/VSX
switching: https://patchwork.ozlabs.org/patch/589703/
I left in some of my comments indicating if functions are called from C or
not. Looking at them now, they might be
to the overlapping layout of FPU registers and VSX registers on POWER
chips, this patch also benefits FPU loads and stores when VSX is compiled
in and the CPU is VSX capable.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/ppc_asm.
On Tue, 16 Feb 2016 14:29:32 +0530
Anshuman Khandual wrote:
> This patch creates a function flush_tmregs_to_thread which
> will then be used by subsequent patches in this series. The
> function checks for self tracing ptrace interface attempts
> while in the TM
On Tue, 16 Feb 2016 14:29:48 +0530
Anshuman Khandual wrote:
> This patch adds ptrace interface test for GPR/FPR registers.
> This adds ptrace interface based helper functions related to
> GPR/FPR access and some assembly helper functions related to
> GPR/FPR
On Tue, 16 Feb 2016 14:29:47 +0530
Anshuman Khandual wrote:
> This patch adds ptrace interface test for EBB specific
> registers. This also adds some generic ptrace interface
> based helper functions to be used by other patches later
> on in the series.
>
>
On Thu, 10 Mar 2016 10:01:07 +1100
Michael Neuling <mi...@neuling.org> wrote:
> On Tue, 2016-03-01 at 16:55 +1100, Cyril Bur wrote:
>
> > Currently the assembly to save and restore Altivec registers boils down to
> > a load immediate of the offset of the specific Al
a better fix in future.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/entry_64.S | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 038e0a1..f3aa4b4 100644
--- a/arch/powerpc/kernel/en
On Thu, 10 Mar 2016 16:37:47 +1100
Cyril Bur <cyril...@gmail.com> wrote:
> On Thu, 10 Mar 2016 10:01:07 +1100
> Michael Neuling <mi...@neuling.org> wrote:
>
> > On Tue, 2016-03-01 at 16:55 +1100, Cyril Bur wrote:
> >
> > > Currently the assembly t
On Thu, 10 Mar 2016 11:09:32 +1100
Michael Neuling <mi...@neuling.org> wrote:
> On Tue, 2016-03-01 at 16:55 +1100, Cyril Bur wrote:
>
> > Currently the assembly to save and restore VSX registers boils down to a
> > load immediate of the offset of the specific VSX registe
On Thu, 10 Mar 2016 10:01:07 +1100
Michael Neuling <mi...@neuling.org> wrote:
> On Tue, 2016-03-01 at 16:55 +1100, Cyril Bur wrote:
>
> > Currently the assembly to save and restore Altivec registers boils down to
> > a load immediate of the offset of the specific Al
On Wed, 16 Mar 2016 22:45:20 +1100
Benjamin Herrenschmidt <b...@au1.ibm.com> wrote:
> On Wed, 2016-03-16 at 13:29 +1100, Cyril Bur wrote:
> > +#ifdef CONFIG_PPC_BOOK3S
> > + ld r10,PACAKMSR(r13)
> > + li r9,MSR_RI
> > +
Currently copy_thread() doesn't flush SPRs to the parent thread struct.
Currently this only affects the TAR register as perf takes care of some of the
others and the remaining ones are all Event Based Branch (EBB) registers which
are cleared across fork().
Signed-off-by: Cyril Bur <cy
as the Event Based Branch (EBB) registers are
left alone by design as these fall into the same category as leaving file
descriptors open across exec(), it is up the parent thread to sanitise what it
deems necessary.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/pro
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/syscalls/Makefile | 3 +-
.../testing/selftests/powerpc/syscalls/spr_exec.c | 78 ++
2 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/p
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/syscalls/Makefile | 3 +-
.../testing/selftests/powerpc/syscalls/spr_fork.c | 78 ++
2 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/p
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 56444a6..7625976 100644
--- a/arch/p
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/benchmarks/context_switch.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/benchmarks/context_switch.c
b/tools/testing/selftests/powerpc/benc
play well with
__attribute__((__target__("no-vsx")), LTO can cause GCC to forget about the
attribute and compile with VSX instructions regardless. Be weary when
enabling -flfo for this test.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/benchmarks/Makefile
On Wed, 02 Mar 2016 09:59:06 +0530
Anshuman Khandual <khand...@linux.vnet.ibm.com> wrote:
> On 03/02/2016 05:45 AM, Cyril Bur wrote:
> > On Tue, 16 Feb 2016 14:29:32 +0530
> > Anshuman Khandual <khand...@linux.vnet.ibm.com> wrote:
> >
> >> This patch
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/syscalls/Makefile | 3 +-
.../testing/selftests/powerpc/syscalls/spr_exec.c | 78 ++
2 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/p
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 34 +-
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 56444a6..7625976 100644
--- a/arch/p
Currently copy_thread() doesn't flush SPRs to the parent thread struct.
Currently this only affects the TAR register as perf takes care of some of the
others and the remaining ones are all Event Based Branch (EBB) registers which
are cleared across fork().
Signed-off-by: Cyril Bur <cy
thread to sanitise what it
deems necessary.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index d7a9df5..56444a6 100644
---
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/syscalls/Makefile | 3 +-
.../testing/selftests/powerpc/syscalls/spr_fork.c | 78 ++
2 files changed, 80 insertions(+), 1 deletion(-)
create mode 100644 tools/testing/selftests/p
ted
> processor is detected.
>
> NOTE: this is for userspace only, not in kernel, and does not deal
> with KVM guests.
>
> Patch created with much assistance from Michael Neuling
> <mi...@neuling.org>
>
Hi Chris,
Patch looks good. Looks like you've put 8 spaces (instead o
than zero, it
might be worth noting that all 1's is 'best' in case anyone does ever follow
that note.
Perhaps ending with "... Set it to all 1s as a best effort to adhere to the
programming note in '5.3.3 VR Save Register' of the ISA"
Having said all that, a reminder that glibc does look at
Hi Chris,
I must admit I didn't run on it on real hardware ;).
Looks good.
> Patch created with much assistance from Michael Neuling
> <mi...@neuling.org>
>
> Signed-off-by: Chris Smart <ch...@distroguy.com>
Reviewed-by: Cyril Bur <cyril...@gmail.com>
> ---
&
As ptrace code was merged between v1 and v2, work was needed there
to make it fit in with the final three patches.
The overall aim of this series may have gotten lost here. The final
three patches are the goal here.
Cyril Bur (20):
selftests/powerpc: Compile selftests against headers without
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/gpr_asm.h | 96 +++
1 file changed, 96 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/gpr_asm.h
diff --git a/tools/testing/selftests/powerpc/gpr_asm.h
b/tools/t
Ensure the kernel correctly switches VSX registers correctly. VSX
registers are all volatile, and despite the kernel preserving VSX
across syscalls, it doesn't have to. Test that during interrupts and
timeslices ending the VSX regs remain the same.
Signed-off-by: Cyril Bur <cyril...@gmail.
.
Fixes: 70fe3d9 ("powerpc: Restore FPU/VEC/VSX if previously used")
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process
giveup_all() causes FPU/VMX/VSX facilitities to be disabled in a
threads MSR. If this thread was transactional this should be recorded
as reclaiming/recheckpointing code will need to know.
Fixes: c208505 ("powerpc: create giveup_all()")
Signed-off-by: Cyril Bur <cyril...@gmail.c
in an different area of the
powerpc selftests
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/fpu_asm.h | 81 ++
tools/testing/selftests/powerpc/math/fpu_asm.S | 73 ++-
2 files changed, 86 insertions(+), 68 del
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/basic_asm.h | 4
1 file changed, 4 insertions(+)
diff --git a/tools/testing/selftests/powerpc/basic_asm.h
b/tools/testing/selftests/powerpc/basic_asm.h
index 3349a07..5131059 100644
--- a/tools/t
If a thread receives a signal while transactional the kernel creates a
second context to show the transactional state of the process. This
test loads some known values and waits for a signal and confirms that
the expected values are in the signal context.
Signed-off-by: Cyril Bur <cy
.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/processor.h | 7 +-
arch/powerpc/kernel/process.c| 63 +++-
arch/powerpc/kernel/ptrace.c | 278 +--
arch/powerpc/kernel/signal_32.c | 50 +++
arch/p
Previous rework of TM code leaves these functions unused
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/tm.h | 5 -
arch/powerpc/kernel/fpu.S | 26 --
arch/powerpc/kernel/vector.S | 25 -
3 files chang
best to flush even for
current.
This patch also moves flush_tmregs_to_thread() into ptrace.c as it is
only called from that file.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/switch_to.h | 8
arch/powerpc/kernel/process.c
nd prd similar to how opal-i2c nodes are found.
>
> Signed-off-by: Jack Miller <j...@codezen.org>
Using a version of the related skiboot patch that may not be the final one:
Tested-by: Cyril Bur <cyril...@gmail.com>
> ---
> arch/powerpc/platforms/powernv/opal.c | 24
On Sun, 2016-08-14 at 09:56 +0800, Simon Guo wrote:
> On Fri, Aug 12, 2016 at 09:28:17AM +1000, Cyril Bur wrote:
> >
> > @@ -846,7 +834,9 @@ static void tm_reclaim_thread(struct
> > thread_struct *thr,
> > if (!MSR_TM_SUSPENDED(mfmsr()))
> > ret
mfmsr() is a fairly expensive call and callers of msr_check_and_set()
may want to make decisions bits in the MSR that it did not change but
may not know the value of.
This patch would avoid a two calls to mfmsr().
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/harness.c | 9 +++--
tools/testing/selftests/powerpc/utils.h | 2 +-
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/powerpc/harness.c
b/tools/testing/selftests/p
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/math/vmx_asm.S | 85 +-
tools/testing/selftests/powerpc/vmx_asm.h | 98 ++
2 files changed, 99 insertions(+), 84 deletions(-)
create mode 100644 tools/t
If a thread receives a signal while transactional the kernel creates a
second context to show the transactional state of the process. This
test loads some known values and waits for a signal and confirms that
the expected values are in the signal context.
Signed-off-by: Cyril Bur <cy
If a thread receives a signal while transactional the kernel creates a
second context to show the transactional state of the process. This
test loads some known values and waits for a signal and confirms that
the expected values are in the signal context.
Signed-off-by: Cyril Bur <cy
Make the structures being used for checkpointed state named
consistently with the pt_regs/ckpt_regs.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/processor.h | 8 ++---
arch/powerpc/kernel/asm-offsets.c| 12
arch/powerpc/kernel/fpu.S
of the checkpointed state to
the live structures within the thread struct thus destroying the true
live state for that thread.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/process.c | 39 ---
1 file changed, 36 insertions
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/Makefile | 1 +
tools/testing/selftests/powerpc/signal/Makefile| 12 +++
tools/testing/selftests/powerpc/signal/signal.S| 50 ++
tools/testing/selftests/powerpc/signal/signal.c
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/tm/tm.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tools/testing/selftests/powerpc/tm/tm.h
b/tools/testing/selftests/powerpc/tm/tm.h
index 60318ba..2c8da74 100644
--- a
If a thread receives a signal while transactional the kernel creates a
second context to show the transactional state of the process. This
test loads some known values and waits for a signal and confirms that
the expected values are in the signal context.
Signed-off-by: Cyril Bur <cy
It might be nice to compile selftests against older kernels and
headers but which may not have HWCAP2.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
tools/testing/selftests/powerpc/utils.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tools/testing/selftests/powerpc/util
On Sun, 17 Jul 2016 11:25:43 +0800
Simon Guo <simon...@linux.vnet.ibm.com> wrote:
> Hi Cyril,
> On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> > @@ -917,24 +907,10 @@ static inline void tm_recheckpoint_new_task(struct
> > task_struct *new)
> >
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
.../selftests/powerpc/tm/tm-signal-context-chk.c | 102 +
1 file changed, 102 insertions(+)
create mode 100644 tools/testing/selftests/powerpc/tm/tm-signal-context-chk.c
diff --git a/tools/testing/selftests/powerpc
to avoid the expensive swap of the TM registers.
A TM unavailable exception will occur if a thread does use TM and the
kernel will enable MSR_TM and leave it so for some time afterwards.
Signed-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/include/asm/processor.h | 1 +
arch/powerpc/
-off-by: Cyril Bur <cyril...@gmail.com>
---
arch/powerpc/kernel/traps.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 3e4c84d..29260ee 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/
On Tue, 28 Jun 2016 11:53:13 +0800
Simon Guo <simon...@linux.vnet.ibm.com> wrote:
> hi Cyril,
>
> On Wed, Jun 08, 2016 at 02:00:34PM +1000, Cyril Bur wrote:
> > @@ -1108,11 +1084,11 @@ struct task_struct *__switch_to(struct task_struct
> > *prev,
> >
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