gt; in its allowed mask and ends up overriding it to cpu_possible_mask.
>
> CPU_ONLINE callbacks should be able to put kthreads on the CPU which
> is coming online. Update select_fallback_rq() so that it follows
> cpu_online() rather than cpu_active() for kthreads.
>
> Signed-off
On Tue, Jun 21, 2016 at 09:47:19PM +0200, Peter Zijlstra wrote:
> On Tue, Jun 21, 2016 at 03:43:56PM -0400, Tejun Heo wrote:
> > On Tue, Jun 21, 2016 at 09:37:09PM +0200, Peter Zijlstra wrote:
> > > Hurm.. So I've applied it, just to get this issue sorted, but I'm not
> > > entirely sure I like it.
Hi Tejun,
On Thu, Jun 16, 2016 at 03:39:05PM -0400, Tejun Heo wrote:
> On Thu, Jun 16, 2016 at 02:45:48PM +0200, Peter Zijlstra wrote:
> > Subject: workqueue: Fix setting affinity of unbound worker threads
> > From: Peter Zijlstra
> > Date: Thu Jun 16 14:38:42 CEST 2016
> >
> > With commit e9d86
From: "Gautham R. Shenoy"
Currently all the idle states registered by a cpu-idle driver are
enabled by default. This patch adds a mechanism which allows the
driver to hint if an idle-state should start in a disabled state. The
cpu-idle core will use this hint to appropriately init
From: "Gautham R. Shenoy"
Hi,
The patches in these series enable support for Winkle idle state in
CPU-Idle.
The first patch is a platform-independent CPU-Idle patch that allows
CPU-Idle states to be disabled at start (Currently they are all
enabled by default).
The second patc
From: "Gautham R. Shenoy"
cpu-idle on powernv currently has support for only snooze, nap and
fastsleep states. Winkle idle state was excluded due to its large
exit-latency.
This patch adds winkle as a cpu-idle state for experimental
purposes. This state is disabled at start by defaul
From: "Gautham R. Shenoy"
pnv_wakeup_tb_loss function currently expects the cr4 to be "eq" if
the CPU is waking up from a complete hypervisor state loss. Hence, it
currently restores the SPR contents only if cr4 is "eq".
However, after the commit bcef83a00dc4 (
From: "Gautham R. Shenoy"
Hi,
The Power ISA v3.0 allows us to execute the "stop" instruction with
ESL and EC of the PSSCR set to 0. This will ensure no loss of state,
and the wakeup from the stop will happen at an instruction following
the executed stop instruction.
This p
From: "Gautham R. Shenoy"
Currently, we use the opal call opal_slw_set_reg() to inform the
Sleep-Winkle Engine (SLW) to restore the contents of some of the
Hypervisor state on wakeup from deep idle states that lose full
hypervisor context (characterized by the flag
OPAL_PM_LOSE_FU
On Fri, Aug 04, 2017 at 12:34:22PM +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Currently, we use the opal call opal_slw_set_reg() to inform the
> Sleep-Winkle Engine (SLW) to restore the contents of some of the
> Hypervisor state on wakeup from deep i
Hi Michael,
On Tue, Aug 01, 2017 at 08:56:18PM +1000, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
> >
> > Subject: [v3 PATCH 1/2] powernv/powerpc:Save/Restore additional SPRs for
> > stop4 cpuidle
>
> I know it's not a big deal, but can we a
From: "Gautham R. Shenoy"
Hi,
This is the fourth iteration of the patchset to enable exploitation of
stop4 idle state on POWER9 via cpuidle.
The earlier version can be found here :
[v3]: https://lkml.org/lkml/2017/7/21/209
[v2]: https://lkml.org/lkml/2017/7/19/152
[v1]: https://lkm
From: "Gautham R. Shenoy"
Currently we use the stop-api provided by the firmware to program the
SLW engine to restore the values of hypervisor resources that get lost
on deeper idle states (such as winkle). Since the deep states were
only used for CPU-Hotplug on POWER8 systems, we wou
From: "Gautham R. Shenoy"
The stop4 idle state on POWER9 is a deep idle state which loses
hypervisor resources, but whose latency is low enough that it can be
exposed via cpuidle.
Until now, the deep idle states which lose hypervisor resources (eg:
winkle) were only exposed via C
On Mon, Aug 07, 2017 at 06:26:44PM +1000, Michael Ellerman wrote:
> Gautham R Shenoy writes:
> > On Tue, Aug 01, 2017 at 08:56:18PM +1000, Michael Ellerman wrote:
> >> "Gautham R. Shenoy" writes:
> >> >
> >> > Subject: [v3 PATCH 1
From: "Gautham R. Shenoy"
Currently, we use the opal call opal_slw_set_reg() to inform the
Sleep-Winkle Engine (SLW) to restore the contents of some of the
Hypervisor state on wakeup from deep idle states that lose full
hypervisor context (characterized by the flag
OPAL_PM_LOSE_FU
Hi Nicholas,
On Sun, Aug 06, 2017 at 03:02:38AM +1000, Nicholas Piggin wrote:
> POWER9 CPUs have independent MMU contexts per thread so KVM
> does not have to bring sibling threads into real-mode when
> switching MMU mode to guest. This can simplify POWER9 sleep/wake
> paths and avoids hwsyncs.
>
On Sun, Aug 06, 2017 at 03:02:39AM +1000, Nicholas Piggin wrote:
> Signed-off-by: Nicholas Piggin
Reviewed-by: Gautham R. Shenoy
--
Thanks and Regards
gautham.
On Sun, Aug 06, 2017 at 03:02:40AM +1000, Nicholas Piggin wrote:
> The hardware can execute stop in any context, and KVM does not
> require real mode. This saves a switch to real-mode when going
> idle.
>
> Signed-off-by: Nicholas Piggin
Acked-by: Gautham R. Shenoy
> -
do not have to be saved, and MSR does not have
> to be switched back to kernel MSR.
>
> So move the test for "lite" sleep states out to power9_idle_stop.
Nice optimization!
Reviewed-by: Gautham R. Shenoy
>
> Signed-off-by: Nicholas Piggin
> ---
&
On Tue, Aug 08, 2017 at 10:42:57PM +1000, Nicholas Piggin wrote:
> On Tue, 8 Aug 2017 16:06:43 +0530
> Gautham R Shenoy wrote:
>
> > Hi Nicholas,
> >
> > On Sun, Aug 06, 2017 at 03:02:38AM +1000, Nicholas Piggin wrote:
> > > POWER9 CPUs have independent MMU c
; would get rounded down to zero micro second and make cpuidle
> framework choose deeper idle state when snooze loop is the
> right choice.
>
> Reported-by: Anton Blanchard
> Signed-off-by: Vaidyanathan Srinivasan
This looks good to me.
Reviewed-by: Gautham R. Shenoy
> ---
>
From: "Gautham R. Shenoy"
commit 24be85a23d1f ("powerpc/powernv: Clear PECE1 in LPCR via
stop-api only on Hotplug") clears the PECE1 bit of the LPCR via
stop-api during CPU-Hotplug to prevent wakeup due to a decrementer on
an offlined CPU which is in a deep stop state.
I
t in it. Is that guaranteed on POWER9? If so
> it is at least deserving of a comment.
How about the following patch
---x8-----x8-----
>From a17e4f71bfc9d208c45335acb47fc2b3a9f61923 Mon Sep 17 00:00:00 2001
From: "Gautham R. S
_limits_lock);
> ret = amd_pstate_set_energy_pref_index(cpudata, ret);
For drivers/cpufreq/amd-pstate.c
Acked-by: Gautham R. Shenoy
--
Thanks and Regards
gautham.
er Zijlstra (Intel)
Reviewed-by: Gautham R. Shenoy
> ---
> arch/arm/mach-imx/cpuidle-imx6q.c|4 +--
> arch/arm/mach-imx/cpuidle-imx6sx.c |4 +--
> arch/arm/mach-omap2/cpuidle34xx.c|4 +--
> arch/arm/mach-omap2/cpuidle44xx.c|8 +++---
> drivers
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