Ganesh Kumar ganeshku...@signal-networks.com wrote on 03/09/2009 06:45:14:
Hi Tjernlund,
Thanks a lot for the reply.
I checked in my code regarding to the invalidate/flushing of the
data cache. In the fec_init its been done by calling the sequence
/* Make it uncached.
.
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
---
This should also fix a problem reported by Esben Haabendal:
[PATCH v2] i2c-mpc: generate START condition after STOP caused by read i2c_msg
This fixes MAL (arbitration lost) bug caused by illegal use of
RSTA (repeated START) after STOP
I think there's more finishyness to 8xx than we thought. IE. That
tlbil_va might have more reasons to be there than what the comment
seems to advertize. Can you try to move it even higher up ? IE.
Unconditionally at the beginning of set_pte_filter ?
Also, if that doesn't help, can
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 25/09/2009 11:47:34:
On Fri, 2009-09-25 at 10:31 +0200, Joakim Tjernlund wrote:
The main problem with 8xx it does not update the DAR register in
the TLB Miss/Fault handlers for cache instructions :( It on old bug
that was found
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org):
I think there's more finishyness to 8xx than we thought. IE. That
tlbil_va might have more reasons to be there than what the comment
seems to advertize. Can you try to move it even higher up ? IE.
Unconditionally at the
Jean, I just noticed you pull request for i2c on LKML but I didn't see this
patch nor have I got any feedback from you. What is your view?
Jocke
Wolfgang Grandegger w...@grandegger.com wrote on 25/09/2009 12:01:17:
Joakim Tjernlund wrote:
The driver always ends a read with a STOP
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 28/09/2009 05:21:00:
On Sun, 2009-09-27 at 15:22 +0200, Joakim Tjernlund wrote:
However, adding tlbil_va() to ptep_set_access_flags() as you suggested
makes everything happy. I need to test it some more, but it looks good
so far
Jean Delvare kh...@linux-fr.org wrote on 28/09/2009 09:28:09:
On Mon, 28 Sep 2009 00:26:54 +0200, Joakim Tjernlund wrote:
Jean, I just noticed you pull request for i2c on LKML but I didn't see this
patch nor have I got any feedback from you. What is your view?
My view is that i2c-mpc
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 28/09/2009 09:34:46:
On Mon, 2009-09-28 at 09:22 +0200, Joakim Tjernlund wrote:
happy to stick with it until somebody comes up with a real good
reason
to do more :-) 8xx is on life support and has been around for long
yeah, I
Jean Delvare kh...@linux-fr.org wrote on 28/09/2009 09:34:34:
On Mon, 28 Sep 2009 09:30:32 +0200, Joakim Tjernlund wrote:
Jean Delvare kh...@linux-fr.org wrote on 28/09/2009 09:28:09:
On Mon, 28 Sep 2009 00:26:54 +0200, Joakim Tjernlund wrote:
Jean, I just noticed you pull request
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 28/09/2009
05:21:00:
On Sun, 2009-09-27 at 15:22 +0200, Joakim Tjernlund wrote:
However, adding tlbil_va() to ptep_set_access_flags() as you suggested
makes everything happy. I need to test it some more, but it looks good
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org):
On Thu, 2009-09-24 at 18:35 -0700, Rex Feany wrote:
Then I can boot and get to a shell, but userspace is slow. 8 seconds
to mount
/proc (vs. less then a second using my old kernel)! Maybe this is an
unrelated issue?
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 29/09/2009 09:07:37:
On Tue, 2009-09-29 at 08:26 +0200, Joakim Tjernlund wrote:
I've tried sticking tlbil_va() in those places, nothing seems to
help.
In some cases userspace is slow, in other cases userspace is faster
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 29/09/2009 10:16:38:
hmm, yes. You do get this and mysterious SEGV if you hit the but so does
other bugs too so this is probably due to missing invalidation.
I suspect that something like below will fix the problem and
is the
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 29/09/2009 10:16:38:
hmm, yes. You do get this and mysterious SEGV if you hit the but so does
other bugs too so this is probably due to missing invalidation.
I suspect that something like below will fix the problem and
is the
Rex Feany rfe...@mrv.com wrote on 29/09/2009 23:03:31:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 29/09/2009
10:16:38:
hmm, yes. You do get this and mysterious SEGV if you hit the but so does
other
Rex Feany rfe...@mrv.com wrote on 29/09/2009 23:03:31:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 29/09/2009
10:16:38:
hmm, yes. You do get this and mysterious SEGV if you hit the but so
Rex Feany rfe...@mrv.com wrote on 30/09/2009 11:00:02:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Ok, I have made some minor tweaks and added debug code in
do_page_fault(). Would be great if you could try on both
.31 and top of tree.
Jocke
OOPS, found a bug
Rex Feany rfe...@mrv.com wrote on 30/09/2009 11:00:02:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Ok, I have made some minor tweaks and added debug code in
do_page_fault(). Would be great if you could try on both
.31 and top of tree.
Jocke
OOPS, found a bug
Rex Feany rfe...@mrv.com wrote on 30/09/2009 11:00:02:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Ok, I have made some minor tweaks and added debug code in
do_page_fault(). Would be great if you could try on both
.31 and top of tree.
Jocke
OOPS
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 01/10/2009 00:35:59:
Had a look at linus tree and there is something I don't understand.
Your fix, e0908085fc2391c85b85fb814ae1df377c8e0dcb, fixes a problem
that was introduced by 8d30c14cab30d405a05f2aaceda1e9ad57800f36 but
this on my old 2.4 and it worked well.
That was not quite correct, sorry.
Try this instead:
From c5f1a70561730b8a443f7081fbd9c5b023147043 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund joakim.tjernl...@transmode.se
Date: Fri, 2 Oct 2009 14:59:21 +0200
Subject: [PATCH] powerpc, 8xx: DTLB Error must
c5f1a70561730b8a443f7081fbd9c5b023147043 Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund joakim.tjernl...@transmode.se
Date: Fri, 2 Oct 2009 14:59:21 +0200
Subject: [PATCH] powerpc, 8xx: DTLB Error must check for more errors.
DataTLBError currently does:
if ((err 0x0200) == 0)
DSI();
This won't handle a store
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 03/10/2009 10:31:18:
On Sat, 2009-10-03 at 10:05 +0200, Joakim Tjernlund wrote:
Cannot shake the feeling that it this snip of code that causes it
lwz r11, 0(r10) /* Get the level 1 entry */
rlwinm. r10
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 03/10/2009 12:57:28:
On Sat, 2009-10-03 at 11:24 +0200, Joakim Tjernlund wrote:
So yes, there is a missing _tlbil_va() missing for 8xx somewhere
but there is something more too.
Maybe your new filter functions and my
powerpc
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 03/10/2009 12:57:28:
On Sat, 2009-10-03 at 11:24 +0200, Joakim Tjernlund wrote:
So yes, there is a missing _tlbil_va() missing for 8xx somewhere
but there is something more too.
Maybe your new filter functions and my
powerpc
Scott Wood scottw...@freescale.com wrote on 02/10/2009 23:49:49:
On Thu, Oct 01, 2009 at 08:35:59AM +1000, Benjamin Herrenschmidt wrote:
From what I can see, the TLB miss code will check _PAGE_PRESENT, and
when not set, it will -still- insert something into the TLB (unlike
all other CPU
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 04/10/2009 22:26:42:
On Sun, 2009-10-04 at 10:35 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 03/10/2009
12:57:28:
On Sat, 2009-10-03 at 11:24 +0200, Joakim Tjernlund wrote:
So
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 04/10/2009 22:28:38:
I have managed to update the TLB code to make proper use of dirty and
accessed states.
Advantages are:
- I/D TLB Miss never needs to write to the linux pte, saving a few cycles
That's good, that leaves us
errors.
You probably need the extra tlbil_va(), but let us know if you
can get away without it.
Scott and Rex, please give this a spin. Comments welcome too :)
Jocke
From 7880d402cc05dd6e27d8804218ee4c80a879403e Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund joakim.tjernl...@transmode.se
Date
patches from me and
try these out instead.
Joakim Tjernlund (6):
8xx: DTLB Error must check for more errors.
8xx, fault: Add some debug code to do_page_fault()
8xx: get rid of _PAGE_HWWRITE dependency in MMU.
8xx: Tag DAR with 0x00f0 to catch buggy instructions.
8xx: Fixup DAR from buggy dcbX
DataTLBError currently does:
if ((err 0x0200) == 0)
DSI();
This won't handle a store with no valid translation.
Change this to
if ((err 0x4800) != 0)
DSI();
that is, branch to DSI if either !permission or
!translation.
---
arch/powerpc/kernel/head_8xx.S |4 ++--
1 files
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code(default), the other uses
jump table but is much bigger.
---
arch/powerpc/kernel/head_8xx.S | 146 +++-
1 files changed, 145
---
arch/powerpc/mm/fault.c | 82 +++
1 files changed, 82 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 7699394..c33c6de 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -139,6
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
Test for DAR=0x00f0 in DataTLBError and bail
to handle_page_fault().
---
arch/powerpc/kernel/head_8xx.S | 19 ---
1
Now that 8xx can fixup dcbX instructions, start using them
where possible like every other PowerPc arch do.
---
arch/powerpc/kernel/misc_32.S | 18 --
arch/powerpc/lib/copy_32.S| 24
2 files changed, 0 insertions(+), 42 deletions(-)
diff --git
Scott Wood scottw...@freescale.com wrote on 05/10/2009 20:12:34:
On Mon, Oct 05, 2009 at 02:16:33PM +0200, Joakim Tjernlund wrote:
Here are my latest code to fixup 8xx's TLB code.
This code needs some serious testing before it
can be commited.
The 8xx, fault: Add some debug code
Scott Wood scottw...@freescale.com wrote on 05/10/2009 20:24:29:
On Sat, Oct 03, 2009 at 10:05:46AM +0200, Joakim Tjernlund wrote:
Scott Wood scottw...@freescale.com wrote on 02/10/2009 23:49:49:
Adding a tlbil_va to do_page_fault makes the problem go away for me (on
top of your merge
Scott Wood scottw...@freescale.com wrote on 05/10/2009 22:09:41:
On Mon, Oct 05, 2009 at 08:27:39PM +0200, Joakim Tjernlund wrote:
After resolving the conflict, without adding tlbil_va in do_page_fault(),
I
get the same stuck behavior as before.
Expected, I havn't not tried to fix
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 05/10/2009 22:17:04:
On Mon, 2009-10-05 at 14:16 +0200, Joakim Tjernlund wrote:
Update the TLB asm to make proper use of _PAGE_DIRY and _PAGE_ACCESSED.
Pros:
- I/D TLB Miss never needs to write to the linux pte
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 05/10/2009 23:31:39:
Yes, every ld.so uses dcbX and icbi insn when relocatin code.
Even with -msecure-plt ?
hmm, maybe not. Can't remember now. But perhaps LAZY relocs still
need dcbX? Easiest is to check in uClibc. I impl. it, but
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 05/10/2009 23:37:23:
On Mon, 2009-10-05 at 23:25 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 05/10/2009
22:17:04:
On Mon, 2009-10-05 at 14:16 +0200, Joakim Tjernlund wrote
Rex Feany rfe...@mrv.com wrote on 06/10/2009 00:04:20:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Scott and Rex, please disregard other patches from me and
try these out instead.
I have results similar to Scott's. I tried both with and without patch
5 6, and I also
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 00:09:16:
On Tue, 2009-10-06 at 00:00 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 05/10/2009
23:37:23:
On Mon, 2009-10-05 at 23:25 +0200, Joakim Tjernlund wrote
Rex Feany rfe...@mrv.com wrote on 06/10/2009 00:42:18:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
I got this oops:
Unable to handle kernel paging request for data at address 0x
Faulting instruction address: 0xc000e110
Oops: Kernel access of bad area, sig
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 00:37:28:
On Tue, 2009-10-06 at 00:31 +0200, Joakim Tjernlund wrote:
regs or regs-nip is NULL? Either one does not make sense
In any case it might be a secondary problem as DAR is NULL already
when you
enter the page
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 01:15:39:
On Tue, 2009-10-06 at 00:55 +0200, Joakim Tjernlund wrote:
Sure but if dirty is cleared by the kernel, then you also need to
remove
write permission in the TLB or it will miss setting dirty on the
next
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 00:37:28:
On Tue, 2009-10-06 at 00:31 +0200, Joakim Tjernlund wrote:
regs or regs-nip is NULL? Either one does not make sense
In any case it might be a secondary problem as DAR is NULL already
when you
enter the page
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 02:34:15:
On Tue, 2009-10-06 at 01:35 +0200, Joakim Tjernlund wrote:
Well, if the HW has the ability to enforce trap when store with !
DIRTY,
Yes, provided that the kernel invalidates the TLB too so the next
access
Rex Feany rfe...@mrv.com wrote on 06/10/2009 00:42:18:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
I got this oops:
Unable to handle kernel paging request for data at address 0x
Faulting instruction address: 0xc000e110
Oops: Kernel access of bad area, sig
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 08:45:47:
On Tue, 2009-10-06 at 08:15 +0200, Joakim Tjernlund wrote:
Yes, I would too but TLB Miss knows nothing about load/store, protection
etc.
because DSISR isn't set. So I cannot see any other way than the TLB Error
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 03:52:15:
\
So how does this look? Does it change anything?
It should as the previous way was way off :(
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index c33c6de..08a392f 100644
---
No, use get_user() not __get_user() or if you use the later, also use
access_ok(), and test the result in case it errors (if it does, you
probably want to just goto bad access and SEGV).
OK, lets see what this gives us:
Hrm... did you change anything ? :-)
Yes, see below
Ben.
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 13:06:26:
From:
Benjamin Herrenschmidt b...@kernel.crashing.org
To:
Joakim Tjernlund joakim.tjernl...@transmode.se
Cc:
linuxppc-...@ozlabs.org linuxppc-...@ozlabs.org, Rex Feany
rfe...@mrv.com, Scott Wood scottw
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 13:06:26:
On Tue, 2009-10-06 at 12:58 +0200, Joakim Tjernlund wrote:
Here I don't care if err. insn will be 0 if it fails and the following
if will be false
I'd rather you use get_user() so it does access_ok().
Else
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 08:45:47:
On Tue, 2009-10-06 at 08:15 +0200, Joakim Tjernlund wrote:
Yes, I would too but TLB Miss knows nothing about load/store, protection
etc.
because DSISR isn't set. So I cannot see any other way than the TLB Error
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009
08:45:47:
On Tue, 2009-10-06 at 08:15 +0200, Joakim Tjernlund wrote:
Yes, I would too but TLB Miss knows nothing about load/store, protection
etc.
because DSISR isn't set. So I cannot see any other way than
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 06/10/2009 02:34:15:
On Tue, 2009-10-06 at 01:35 +0200, Joakim Tjernlund wrote:
Well, if the HW has the ability to enforce trap when store with !
DIRTY,
Yes, provided that the kernel invalidates the TLB too so the next
access
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 03:07:35:
Allright, did a bit of reading of doco and code..
hey, this is a super, thanks!
Doco isn't totally clear though. At some stage, it -hints- that in case
of a TLB error (match on EA/ASID but incorrect
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
---
arch/powerpc/mm/fault.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index
OK, here is the next try att fixing the MPC8xx MMU
problems. Pleas add one(or two) patches at a time and
test.
Expect some trivial merge conflicts in 8xx header file, sorry
about that.
Joakim Tjernlund (6):
8xx: DTLB Error must check for more errors.
8xx: get rid of _PAGE_HWWRITE dependency
Update the TLB asm to make proper use of _PAGE_DIRY and _PAGE_ACCESSED.
Pros:
- I/D TLB Miss never needs to write to the linux pte.
- _PAGE_ACCESSED is only set on TLB Error fixing accounting
- _PAGE_DIRTY is mapped to 0x100, the changed bit, and is set directly
when a page has been made
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code(default), the other uses
jump table but is much bigger.
---
arch/powerpc/kernel/head_8xx.S | 146 +++-
1 files changed, 145
Now that 8xx can fixup dcbX instructions, start using them
where possible like every other PowerPc arch do.
---
arch/powerpc/kernel/misc_32.S | 18 --
arch/powerpc/lib/copy_32.S| 24
2 files changed, 0 insertions(+), 42 deletions(-)
diff --git
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
Test for DAR=0x00f0 in DataTLBError and bail
to handle_page_fault().
---
arch/powerpc/kernel/head_8xx.S | 19 ---
1
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 23:18:05:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
not sure about
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 23:18:21:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 08/10/2009 00:21:24:
On Thu, 2009-10-08 at 00:13 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009
23:18:21:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
dcbz
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 08/10/2009 00:20:17:
On Thu, 2009-10-08 at 00:08 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009
23:14:52:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote
Joakim Tjernlund/Transmode wrote on 08/10/2009 01:11:23:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 08/10/2009
00:20:17:
On Thu, 2009-10-08 at 00:08 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009
23:14:52
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
---
arch/powerpc/mm/fault.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code, the other uses a
jump table but is much bigger(default).
---
arch/powerpc/kernel/head_8xx.S | 146 +++-
1 files changed, 145
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
Test for DAR=0x00f0 in DataTLBError and bail
to handle_page_fault().
---
arch/powerpc/kernel/head_8xx.S | 15 ++-
1 files
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 07/10/2009 23:18:05:
On Wed, 2009-10-07 at 22:46 +0200, Joakim Tjernlund wrote:
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
not sure about
Dan Malek d...@embeddedalley.com wrote on 08/10/2009 22:11:07:
On Oct 8, 2009, at 12:22 PM, Joakim Tjernlund wrote:
hare are comments in the kernel that dcbst wrongly
generates TLB Errors with store set on 8xx. Is this really so?
Should dcbst always trap as a load?
Hi, been a long
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 08/10/2009 23:04:03:
On Thu, 2009-10-08 at 15:24 +0200, Joakim Tjernlund wrote:
+#define _PAGE_RW 0x0400 /* lsb PP bits, inverted in HW */
+#define _PAGE_USER 0x0800 /* msb PP bits */
+ /* r10=(r10~_PAGE_PRESENT
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 09/10/2009 00:23:48:
On Thu, 2009-10-08 at 15:08 -0700, Dan Malek wrote:
Hi Ben.
On Oct 8, 2009, at 1:28 PM, Benjamin Herrenschmidt wrote:
While you are around ... I have a question :-)
I'll try. Many brain cells have been
Rex Feany rfe...@mrv.com wrote on 09/10/2009 02:15:27:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
So here we go again. This time I am
fairly confindent I got most things correct :)
Also manged to use even less instructions in the
TLB Miss handlers.
Scott and Rex
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 09/10/2009 02:53:31:
Subject:
Re: [PATCH 2/6] 8xx: Update TLB asm so it behaves as linux mm expects.
On Fri, 2009-10-09 at 00:44 +0200, Joakim Tjernlund wrote:
accessed == 1 and present = 0 is impossible, right?
So basically just
Rex Feany rfe...@mrv.com wrote on 09/10/2009 08:46:49:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Rex Feany rfe...@mrv.com wrote on 09/10/2009 02:15:27:
open(/proc/mounts, O_RDONLY) = 3
fstat64(0x3, 0x7fe7e2a8)= 0
mmap(NULL, 4096
Rex Feany rfe...@mrv.com wrote on 09/10/2009 08:46:49:
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se):
Rex Feany rfe...@mrv.com wrote on 09/10/2009 02:15:27:
open(/proc/mounts, O_RDONLY) = 3
fstat64(0x3, 0x7fe7e2a8)= 0
mmap(NULL, 4096, PROT_READ
8xx sometimes need to load a invalid/non-present TLBs in
it DTLB asm handler.
These must be invalidated separaly as linux mm don't.
---
arch/powerpc/mm/fault.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index
This is the latest batch of mu 8xx MMU/TLB rework.
I think this is complete now and will relax with
other work the next few days. I hope I can get some
testing from Scott and Rex during this time.
Joakim Tjernlund (8):
8xx: invalidate non present TLBs
8xx: Update TLB asm so it behaves
dcbz, dcbf, dcbi, dcbst and icbi do not set DAR when they
cause a DTLB Error. Dectect this by tagging DAR with 0x00f0
at every exception exit that modifies DAR.
Test for DAR=0x00f0 in DataTLBError and bail
to handle_page_fault().
---
arch/powerpc/kernel/head_8xx.S | 15 ++-
1 files
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code, the other uses a
jump table but is much bigger(default).
---
arch/powerpc/kernel/head_8xx.S | 146 +++-
1 files changed, 145
8xx has not had WRITETHRU due to lack of bits in the pte.
After the recent rewrite of the 8xx TLB code, there are
two bits left. Use one of them to WRITETHRU.
Perhaps use the last SW bit to PAGE_SPECIAL or PAGE_FILE?
---
arch/powerpc/include/asm/pte-8xx.h |5 +++--
Now that 8xx can fixup dcbX instructions, start using them
where possible like every other PowerPc arch do.
---
arch/powerpc/kernel/misc_32.S | 18 --
arch/powerpc/lib/copy_32.S| 24
2 files changed, 0 insertions(+), 42 deletions(-)
diff --git
only DTLB Miss did set this bit, DTLB Error needs too otherwise
the setting is lost when the page becomes dirty.
---
arch/powerpc/kernel/head_8xx.S | 13 ++---
1 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 11/10/2009 23:25:30:
On Sun, 2009-10-11 at 18:35 +0200, Joakim Tjernlund wrote:
only DTLB Miss did set this bit, DTLB Error needs too otherwise
the setting is lost when the page becomes dirty.
Easier fix: Stop doing thing in DTLB
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 11/10/2009 23:26:27:
On Sun, 2009-10-11 at 18:35 +0200, Joakim Tjernlund wrote:
8xx has not had WRITETHRU due to lack of bits in the pte.
After the recent rewrite of the 8xx TLB code, there are
two bits left. Use one of them
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 12/10/2009 00:44:56:
On Mon, 2009-10-12 at 00:19 +0200, Joakim Tjernlund wrote:
I hear you, I can remove DTLB error with an add on patch later if that is
OK?
I cannot remove the DARFix though, when I move that to do_page_fault(), I
There is no need to do set the DIRTY bit directly in DTLB Error.
Trap to do_page_fault() and let the generic MM code do the work.
---
Ben, here it is :)
arch/powerpc/kernel/head_8xx.S | 95
1 files changed, 0 insertions(+), 95 deletions(-)
diff --git
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 12/10/2009 07:46:14:
On Mon, 2009-10-12 at 07:36 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 12/10/2009
00:44:56:
On Mon, 2009-10-12 at 00:19 +0200, Joakim Tjernlund wrote:
I hear
Scott Wood scottw...@freescale.com wrote on 14/10/2009 19:23:51:
On Sun, Oct 11, 2009 at 06:35:04PM +0200, Joakim Tjernlund wrote:
This is the latest batch of mu 8xx MMU/TLB rework.
I think this is complete now and will relax with
other work the next few days. I hope I can get some
Scott Wood scottw...@freescale.com wrote on 14/10/2009 19:20:03:
On Sun, Oct 11, 2009 at 06:35:08PM +0200, Joakim Tjernlund wrote:
This is an assembler version to fixup DAR not being set
by dcbX, icbi instructions. There are two versions, one
uses selfmodifing code, the other uses a
jump
Scott Wood scottw...@freescale.com wrote on 14/10/2009 21:23:02:
Joakim Tjernlund wrote:
BTW, you could add a test and printk in do_page_fault on address 0x00f0.
if that ever hits there is a problem with dcbX fixup.
It doesn't get any 0xf0 faults.
FWIW, I'm not seeing the segfault any
Scott Wood scottw...@freescale.com wrote on 14/10/2009 22:22:25:
Joakim Tjernlund wrote:
Scott Wood scottw...@freescale.com wrote on 14/10/2009 21:23:02:
Joakim Tjernlund wrote:
BTW, you could add a test and printk in do_page_fault on address
0x00f0.
if that ever hits
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 14/10/2009 23:17:09:
On Wed, 2009-10-14 at 16:14 -0500, Scott Wood wrote:
I think the last working version was a little older than that -- and it's
quite
possible that there was underlying badness even earlier that just recently
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 14/10/2009 23:52:10:
On Wed, 2009-10-14 at 23:41 +0200, Joakim Tjernlund wrote:
Benjamin Herrenschmidt b...@kernel.crashing.org wrote on 14/10/2009
23:17:09:
On Wed, 2009-10-14 at 16:14 -0500, Scott Wood wrote:
I think
Rex Feany rfe...@mrv.com wrote on 15/10/2009 03:08:55:
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org):
On Wed, 2009-10-14 at 17:41 -0700, Rex Feany wrote:
The biggest problem for me turned out to be the MMU context IDs being
clamped to 32 when the 8xx only has 16. With
1 - 100 of 689 matches
Mail list logo
