g __pte_index_size;
EXPORT_SYMBOL(__pte_index_size);
And book3s64/radix_pgtable.c set the value in radix__early_init_mmu().
__pte_index_size = RADIX_PTE_INDEX_SIZE;
So I think it's ok to use the value directly in book3s_64_mmu_radix.c.
The include dependency looks fine for that to work.
FWIW:
Reviewed-by: Leonardo Bras
signature.asc
Description: This is a digitally signed message part
t should we do here? We didn't recognize the instruction */
> - WARN_ON_ONCE(1);
> + kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
> + pr_warn_ratelimited("Unrecognized TM-related instruction %#x for
> emulation", instr);
> +
> return RESUME_GUEST;
On Tue, 2020-02-11 at 01:28 -0300, Leonardo Bras wrote:
> Looks a valid change.
> rlwimi r10, r10, 0, 0x0f00 means:
> r10 = ((r10 << 0) & 0x0f00) | (r10 & ~0x0f00) which ends up being
> r10 = r10
>
> On ISA, rlwinm is recommended for clearing high order bits
ust skip smp_call_function_many().
On my workload (qemu), I could see munmap's time reduction from 275 seconds
to 418ms.
Signed-off-by: Leonardo Bras
---
I need more experienced people's help in order to understand if this is
really a valid improvement, and if mm_struct is the best place to put suc
by current
behavior.
> Move that to ppc64 specific mm_context_t.
Ok, fixed! I will send that on v2.
Best regards,
Leonardo Bras
signature.asc
Description: This is a digitally signed message part
Reduces the number of calls to get_current() in order to get the value of
current->mm by doing it once and storing the value, since it is not
supposed to change inside the same process).
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_64_mmu_hv.c | 11 ++-
1 file changed
Hello Michael,
Any feedback on this patch?
Best regards,
On Fri, 2019-08-02 at 15:45 +0200, David Hildenbrand wrote:
> On 02.08.19 15:39, Leonardo Bras wrote:
> > Changes the return variable to bool (as the return value) and
> > avoids doing a ternary operation b
Hello Paul,
I sent this patch, but I have a question:
On Thu, 2019-09-19 at 19:27 -0300, Leonardo Bras wrote:
> Reduces the number of calls to get_current() in order to get the value of
> current->mm by doing it once and storing the value, since it is not
> supposed to change ins
walk
end_lockless_pgtbl_walk(mm)
Insert after the end of any lockless pgtable walk
(Mostly after the ptep is last used)
running_lockless_pgtbl_walk(mm)
Returns the number of lockless pgtable walks running
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/mmu.h
*** BLURB HERE ***
Leonardo Bras (11):
powerpc/mm: Adds counting method to monitor lockless pgtable walks
asm-generic/pgtable: Adds dummy functions to monitor lockless pgtable
walks
mm/gup: Applies counting method to monitor gup_pgd_range
powerpc/mce_power: Applies counting method to
t use this method.
Signed-off-by: Leonardo Bras
---
mm/gup.c | 4
1 file changed, 4 insertions(+)
diff --git a/mm/gup.c b/mm/gup.c
index 98f13ab37bac..675e4be27082 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2404,6 +2404,7 @@ int get_user_pages_fast(unsigned long start, in
approach, that
counts the number of lockless pagetable walks happening on the process.
Given that there are lockless pagetable walks on generic code, it's
necessary to create dummy functions for archs that won't use the approach.
Signed-off-by: Leonardo Bras
---
include/asm-generic
Applies the counting-based method for monitoring lockless pgtable walks on
addr_to_pfn().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kernel/mce_power.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel
Applies the counting-based method for monitoring lockless pgtable walks on
read_user_stack_slow.
Signed-off-by: Leonardo Bras
---
arch/powerpc/perf/callchain.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
Applies the counting-based method for monitoring all hash-related functions
that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/hash_tlb.c | 2 ++
arch/powerpc/mm/book3s64/hash_utils.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/arch
Applies the counting-based method for monitoring lockless pgtable walks on
kvmppc_e500_shadow_map().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/e500_mmu_host.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
Applies the counting-based method for monitoring all book3s_hv related
functions that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_hv_nested.c | 8
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 9 -
2 files changed, 16 insertions(+), 1 deletion
Enables count-based monitoring method for lockless pagetable walks on
PowerPC book3s_64.
Other architectures/platforms fallback to using generic dummy functions.
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 5 +
1 file changed, 5 insertions(+)
diff --git
Skips slow part of serialize_against_pte_lookup if there is no running
lockless pagetable walk.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/pgtable.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pgtable.c
b/arch/powerpc/mm
Applies the counting-based method for monitoring all book3s_64-related
functions that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
It may be necessary to merge an older patch first:
powerpc: kvm: Reduce calls to get current->mm by storing the value locally
Link:
ht
On Fri, 2019-09-20 at 16:50 -0300, Leonardo Bras wrote:
> *** BLURB HERE ***
Sorry, something gone terribly wrong with my cover letter.
I will try to find it and send here, or rewrite it.
Best regards,
signature.asc
Description: This is a digitally signed message part
, I could see munmap's time reduction from 275
seconds to 418ms.
> Leonardo Bras (11):
> powerpc/mm: Adds counting method to monitor lockless pgtable walks
> asm-generic/pgtable: Adds dummy functions to monitor lockless pgtable
> walks
> mm/gup: Applies counting method t
On Fri, 2019-09-20 at 13:11 -0700, John Hubbard wrote:
> On 9/20/19 12:50 PM, Leonardo Bras wrote:
> > Skips slow part of serialize_against_pte_lookup if there is no running
> > lockless pagetable walk.
> >
> > Signed-off-by: Leonardo Bras
> > ---
> >
HP
split/collapse wait for gup_pgd_range() completion in every cpu before
continuing. (here happens the lock)
(As told before, every gup_pgd_range() that occurs after it uses a
updated pmd, so no problem.)
I am sure other archs may have a similar mechanism using
local_irq_{disable,enable}.
Did it answer
On Thu, 2019-09-19 at 23:47 -0300, Leonardo Bras wrote:
> Hello Paul,
> I sent this patch, but I have a question:
>
> > + mm = current->mm;
>
> Here, current->mm is not always the same as kvm->mm?
> Thanks
I have contacted Paul, who said it is equivalent.
return -EIO;
So this change would be safe.
I split the changes in 3 patches, so it would be easier to read
and reject separated parts. If decided that squashing is better,
I see no problem doing that.
Best regards,
Leonardo Bras (3):
powerpc/kvm/book3s: Replace current->mm by kvm->mm
iables on code, relying
more in the contents of kvm struct.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_64_mmu_hv.c | 4 ++--
arch/powerpc/kvm/book3s_64_vio.c| 6 +++---
arch/powerpc/kvm/book3s_hv.c| 10 +-
3 files changed, 10 insertions(+), 10 deletions(-)
d
iables on code, relying
more in the contents of kvm struct.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/booke.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index be9a45874194..383108263af5 100644
--- a/arch/powerpc/kv
iables on code, relying
more in the contents of kvm struct.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/e500_mmu_host.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index 321db0fdb9db..425d138066
On Mon, 2019-09-23 at 15:35 -0300, Leonardo Bras wrote:
> Could you please provide feedback on this patch?
I have done a very simple comparison with gcc disassemble:
By applying this patch, there was a reduction in the function size from
882 to 878 instructions.
signature.asc
Description: T
On Mon, 2019-09-23 at 11:14 -0700, John Hubbard wrote:
> On 9/23/19 10:25 AM, Leonardo Bras wrote:
> [...]
> That part is all fine, but there are no run-time memory barriers in the
> atomic_inc() and atomic_dec() additions, which means that this is not
> safe, because memory oper
On Mon, 2019-09-23 at 12:58 -0700, John Hubbard wrote:
>
> CPU 0CPU 1
> -- --
>READ(pte) (re-ordered at run time)
>atomic_inc(val) (no run-time memory barrier!)
>
Thanks for the feedback,
On Mon, 2019-09-23 at 13:39 -0700, John Hubbard wrote:
> Please remember to include linux-mm if there is a v2.
Sure, I will include on v3.
> Nit: seems like it would be nicer to just put it all in one place, and use
> positive logic, and also I think people normally don'
On Mon, 2019-09-23 at 13:42 -0700, John Hubbard wrote:
> Somewhere, there should be a short comment that explains how the following
> functions
> are meant to be used. And it should include the interaction with irqs, so
> maybe
> if you end up adding that combined wrapper function that does both,
fast. But since I got no feedback, it was not merged and the
present patchset became broken. :(
But I will rebase v3 on top of plain v5.3.
Thanks,
Leonardo Bras
signature.asc
Description: This is a digitally signed message part
On Mon, 2019-09-23 at 13:27 -0700, John Hubbard wrote:
> I'd also like a second opinion from the "core" -mm maintainers, but it seems
> like
> there is now too much code around the gup_pgd_range() call. Especially since
> there
> are two places where it's called--did you forget the other one in
Reduces the number of calls to get_current() in order to get the value of
current->mm by doing it once and storing the value, since it is not
supposed to change inside the same process).
Signed-off-by: Leonardo Bras
---
Re-sending to all lists involved. (I missed kvm ones)
arch/powerpc/
I have done a very simple comparison with gdb disassemble:
By applying this patch, there was a reduction in the function size from
882 to 878 instructions.
(It's a resend, due to not having all the correct lists on my previous
mail)
On Mon, 2019-09-23 at 18:30 -0300, Leonardo Bras
John Hubbard writes:
> Also, which tree do these patches apply to, please?
I will send a v3 that applies directly over v5.3, and make sure to
include mm mailing list.
Thanks!
signature.asc
Description: This is a digitally signed message part
ore, I think it would
be wiser to send a v3 and gather feedback while I keep trying to
understand how it works, and if it needs additional memory barrier here.
Thanks!
Leonardo Bras
signature.asc
Description: This is a digitally signed message part
Changes since v1:
Isolated atomic operations in functions *_lockless_pgtbl_walk()
Fixed behavior of decrementing before last ptep was used
Link: http://patchwork.ozlabs.org/patch/1163093/
Leonardo Bras (11):
powerpc/mm: Adds counting method to monitor lockless pgtable walks
asm-generic
walk
end_lockless_pgtbl_walk(mm)
Insert after the end of any lockless pgtable walk
(Mostly after the ptep is last used)
running_lockless_pgtbl_walk(mm)
Returns the number of lockless pgtable walks running
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/mmu.h
Applies the counting-based method for monitoring lockless pgtable walks on
addr_to_pfn().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kernel/mce_power.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel
approach, that
counts the number of lockless pagetable walks happening on the process.
Given that there are lockless pagetable walks on generic code, it's
necessary to create dummy functions for archs that won't use the approach.
Signed-off-by: Leonardo Bras
---
include/asm-generic
t use this method.
Signed-off-by: Leonardo Bras
---
mm/gup.c | 8
1 file changed, 8 insertions(+)
diff --git a/mm/gup.c b/mm/gup.c
index 98f13ab37bac..eabd6fd15cf8 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2325,6 +2325,7 @@ static bool gup_fast_permitted(unsigned long start,
unsigned long
Applies the counting-based method for monitoring all hash-related functions
that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/hash_tlb.c | 2 ++
arch/powerpc/mm/book3s64/hash_utils.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/arch
Applies the counting-based method for monitoring lockless pgtable walks on
read_user_stack_slow.
Signed-off-by: Leonardo Bras
---
arch/powerpc/perf/callchain.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
Applies the counting-based method for monitoring all book3s_hv related
functions that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_hv_nested.c | 8
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 9 -
2 files changed, 16 insertions(+), 1 deletion
Applies the counting-based method for monitoring lockless pgtable walks on
kvmppc_e500_shadow_map().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/e500_mmu_host.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
Enables count-based monitoring method for lockless pagetable walks on
PowerPC book3s_64.
Other architectures/platforms fallback to using generic dummy functions.
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 5 +
1 file changed, 5 insertions(+)
diff --git
Applies the counting-based method for monitoring all book3s_64-related
functions that do lockless pagetable walks.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_64_mmu_hv.c| 2 ++
arch/powerpc/kvm/book3s_64_mmu_radix.c | 20 ++--
arch/powerpc/kvm
Skips slow part of serialize_against_pte_lookup if there is no running
lockless pagetable walk.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/pgtable.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pgtable.c
b/arch/powerpc/mm
t/end calls--assuming, of course, that the
> caller can tolerate that.
I am not sure if it would be ok to use irq_{save,restore} in real mode,
I will do some more reading of the docs before addressing this.
>
> 4. Please see the v2 series for any other details I've missed.
>
On Fri, 2019-09-27 at 11:46 -0300, Leonardo Bras wrote:
> I am not sure if it would be ok to use irq_{save,restore} in real mode,
> I will do some more reading of the docs before addressing this.
It looks like it's unsafe to merge irq_{save,restore} in
{start,end}_lockless_pgtbl_walk(
walk
end_lockless_pgtbl_walk(mm)
Insert after the end of any lockless pgtable walk
(Mostly after the ptep is last used)
running_lockless_pgtbl_walk(mm)
Returns the number of lockless pgtable walks running
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/mmu.h
tions in functions *_lockless_pgtbl_walk()
Fixed behavior of decrementing before last ptep was used
Link: http://patchwork.ozlabs.org/patch/1163093/
Leonardo Bras (11):
powerpc/mm: Adds counting method to monitor lockless pgtable walks
asm-generic/pgtable: Adds dummy functions to monito
approach, that
counts the number of lockless pagetable walks happening on the process.
Given that there are lockless pagetable walks on generic code, it's
necessary to create dummy functions for archs that won't use the approach.
Signed-off-by: Leonardo Bras
---
include/asm-generic
t use this method.
Signed-off-by: Leonardo Bras
---
mm/gup.c | 8
1 file changed, 8 insertions(+)
diff --git a/mm/gup.c b/mm/gup.c
index 98f13ab37bac..7105c829cf44 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2325,6 +2325,7 @@ static bool gup_fast_permitted(unsigned long start,
unsigned long
Applies the counting-based method for monitoring lockless pgtable walks on
read_user_stack_slow.
Signed-off-by: Leonardo Bras
---
arch/powerpc/perf/callchain.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
Applies the counting-based method for monitoring lockless pgtable walks on
addr_to_pfn().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kernel/mce_power.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel
-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/hash_tlb.c | 2 ++
arch/powerpc/mm/book3s64/hash_utils.c | 12 +++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/hash_tlb.c
b/arch/powerpc/mm/book3s64/hash_tlb.c
index 4a70d8dd39cd
Applies the counting-based method for monitoring lockless pgtable walks on
kvmppc_e500_shadow_map().
Fixes the place where local_irq_restore() is called: previously, if ptep
was NULL, local_irq_restore() would never be called.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/e500_mmu_host.c
lmode + MSR_EE = 0
kvmppc_do_h_enter: Fixes where local_irq_restore() must be placed (after
the last usage of ptep).
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_hv_nested.c | 22 --
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 18 ++
2 files changed, 34 inser
lmode + MSR_EE = 0.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_64_mmu_hv.c| 2 ++
arch/powerpc/kvm/book3s_64_mmu_radix.c | 30 ++
arch/powerpc/kvm/book3s_64_vio_hv.c| 3 +++
3 files changed, 35 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_64_mmu
Enables count-based monitoring method for lockless pagetable walks on
PowerPC book3s_64.
Other architectures/platforms fallback to using generic dummy functions.
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 5 +
1 file changed, 5 insertions(+)
diff --git
Skips slow part of serialize_against_pte_lookup if there is no running
lockless pagetable walk.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/pgtable.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pgtable.c
b/arch/powerpc/mm
On Mon, 2019-09-30 at 14:09 +0300, Kirill A. Shutemov wrote:
> On Fri, Sep 27, 2019 at 08:40:00PM -0300, Leonardo Bras wrote:
> > As decribed, gup_pgd_range is a lockless pagetable walk. So, in order to
> ^ typo
>
Fixed, thanks!
signature.asc
Description: This is a digitally
and tried to come with the best solution.)
> (Not shown: one or more of the PPC Kconfig files should select
> LOCKLESS_PAGE_TABLE_WALK_TRACKING.)
The way it works today is defining it on platform pgtable.h. I agree
that using Kconfig may be a better solution that can make this config
more visible to disable/enable.
Thanks for the feedback,
Leonardo Bras
signature.asc
Description: This is a digitally signed message part
On Mon, 2019-09-30 at 10:57 -0700, John Hubbard wrote:
> > As I told before, there are cases where this function is called from
> > 'real mode' in powerpc, which doesn't disable irqs and may have a
> > tricky behavior if we do. So, encapsulate the irq disable in this
> > function can be a bad choic
On Mon, 2019-09-30 at 14:51 -0700, John Hubbard wrote:
> On 9/27/19 4:40 PM, Leonardo Bras wrote:
> > As decribed, gup_pgd_range is a lockless pagetable walk. So, in order to
> > monitor against THP split/collapse with the couting method, it's necessary
>
> s/couting/c
On Mon, 2019-09-30 at 14:47 -0700, John Hubbard wrote:
> On 9/30/19 11:42 AM, Leonardo Bras wrote:
> > On Mon, 2019-09-30 at 10:57 -0700, John Hubbard wrote:
> > > > As I told before, there are cases where this function is called from
> > > > 'real mode'
On Tue, 2019-10-01 at 12:04 -0700, John Hubbard wrote:
> On 10/1/19 10:56 AM, Leonardo Bras wrote:
> > On Mon, 2019-09-30 at 14:51 -0700, John Hubbard wrote:
> > > On 9/27/19 4:40 PM, Leonardo Bras wrote:
> ...
> > > > diff --git a/mm/gup.c b/mm/gup.c
> &g
ative read outside the interrupt disabled area.
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 9 ++
arch/powerpc/mm/book3s64/pgtable.c | 117 +++
2 files changed, 126 insertions(+)
diff --git a/arch/powerpc/include/asm/book3s/64/pgta
need to repeat it here.
Signed-off-by: Leonardo Bras
---
mm/gup.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index 23a9f9c9d377..52e53b4f39d8 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2319,7 +2319,7 @@ int __get_user_pages_fast(unsigned long
ockless_pgtbl_walk()
Fixed behavior of decrementing before last ptep was used
Link: http://patchwork.ozlabs.org/patch/1163093/
Leonardo Bras (11):
asm-generic/pgtable: Adds generic functions to monitor lockless
pgtable walks
powerpc/mm: Adds counting method to monitor lockless pgtable walks
only doing what was already needed to lockless pagetable walks
(disabling interrupt). A memory barrier was also added just to make sure
there is no speculative read outside the interrupt disabled area.
Signed-off-by: Leonardo Bras
---
include/asm-generic/pgta
Applies the counting-based method for monitoring lockless pgtable walks on
addr_to_pfn().
local_irq_{save,restore} is already inside {begin,end}_lockless_pgtbl_walk,
so there is no need to repeat it here.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kernel/mce_power.c | 6 +++---
1 file
.
local_irq_{save,restore} is already inside {begin,end}_lockless_pgtbl_walk,
so there is no need to repeat it here.
Variable that saves the irq mask was renamed from flags to irq_mask so it
doesn't lose meaning now it's not directly passed to local_irq_* functions.
Signed-off-by: Leonardo Bras
}_lockless_pgtbl_walk,
so there is no need to repeat it here.
Variable that saves the irq mask was renamed from flags to irq_mask so it
doesn't lose meaning now it's not directly passed to local_irq_* functions.
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/e500_mmu_host.c | 9 +
1 file
ff-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_hv_nested.c | 22 ++--
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 32 -
2 files changed, 38 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv_nested.c
b/arch/powerpc/kvm/book3s_hv_nested.c
IRQS_ENABLED to
end_lockless_pgtbl_walk() to mimic the effect of local_irq_enable().
Signed-off-by: Leonardo Bras
---
arch/powerpc/kvm/book3s_64_mmu_hv.c| 6 ++---
arch/powerpc/kvm/book3s_64_mmu_radix.c | 34 +++---
arch/powerpc/kvm/book3s_64_vio_hv.c| 7 +-
3 files changed, 40 i
Skips slow part of serialize_against_pte_lookup if there is no running
lockless pagetable walk.
Signed-off-by: Leonardo Bras
---
arch/powerpc/mm/book3s64/pgtable.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s64/pgtable.c
b/arch/powerpc/mm
x27;t lose meaning now it's not directly passed to local_irq_* functions.
Signed-off-by: Leonardo Bras
---
arch/powerpc/perf/callchain.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
index c84bbd4298a0..43
Adds config option LOCKLESS_PAGE_TABLE_WALK_TRACKING to make possible
enabling tracking lockless pagetable walks directly from kernel config.
Signed-off-by: Leonardo Bras
---
mm/Kconfig | 11 +++
1 file changed, 11 insertions(+)
diff --git a/mm/Kconfig b/mm/Kconfig
index a5dae9a7eb51
On Wed, 2019-10-02 at 22:08 -0400, Qian Cai wrote:
> Can’t this name and all those new *lockless* function names be shorter?
> There are many functions name with *_locked, so how about dropping
> lockless at all, i.e., PAGE_TABLE_WALK_TRACKING blah blah?
Thanks for the feedback!
Well, in this c
On Thu, 2019-10-03 at 16:04 -0300, Leonardo Bras wrote:
> On Wed, 2019-10-02 at 22:08 -0400, Qian Cai wrote:
> > Can’t this name and all those new *lockless* function names be shorter?
> > There are many functions name with *_locked, so how about dropping
> >
Hello Peter, thanks for the feedback!
On Thu, 2019-10-03 at 09:29 +0200, Peter Zijlstra wrote:
> On Wed, Oct 02, 2019 at 10:33:14PM -0300, Leonardo Bras wrote:
> > If a process (qemu) with a lot of CPUs (128) try to munmap() a large
> > chunk of memory (496GB) mapped with THP, it t
On Thu, 2019-10-03 at 09:44 +0200, Peter Zijlstra wrote:
> This shouldn't be a user visible option at all. Either the arch needs
> it and selects it or not.
You are right. I will do that on v6.
Thanks for the feedback!
signature.asc
Description: This is a digitally signed message part
Hello Peter, thanks for the feedback!
On Thu, 2019-10-03 at 13:51 +0200, Peter Zijlstra wrote:
> On Thu, Oct 03, 2019 at 09:11:45AM +0200, Peter Zijlstra wrote:
> > On Wed, Oct 02, 2019 at 10:33:15PM -0300, Leonardo Bras wrote:
> > > diff --git a/include/asm-generic/pgtab
On Thu, 2019-10-03 at 13:49 -0700, John Hubbard wrote:
> Yes. And to clarify, I was assuming that the changes to mm/gup.c were
> required in order to accomplish your goals. Given that assumption, I
> wanted the generic code to be "proper", and that's what that feedback
> is about.
You assumed ri
On Tue, 2019-10-08 at 15:11 +, Christopher Lameter wrote:
>
> On Wed, 2 Oct 2019, Leonardo Bras wrote:
>
> > +
> > +inline unsigned long __begin_lockless_pgtbl_walk(struct mm_struct *mm,
> > +bool disable_irq)
> >
On Tue, 2019-10-08 at 17:43 +, Christopher Lameter wrote:
> On Tue, 8 Oct 2019, Leonardo Bras wrote:
>
> > > You are creating contention on a single exclusive cacheline. Doesnt this
> > > defeat the whole purpose of the lockless page table walk? Use mmap_sem or
> &
On Fri, 2019-10-04 at 13:28 +0200, Peter Zijlstra wrote:
> > Could you please explain it?
> > I mean, why this breaks tmpfs-thp?
> > Also, why mm_cpumask() is also broken?
>
> Because shared pages are not bound by a mm; or does it not share the thp
> state between mappings?
By what I could unders
On Mon, 2020-08-31 at 13:48 +1000, Alexey Kardashevskiy wrote:
> > > > Well, I created this TCE_RPN_BITS = 52 because the previous mask was a
> > > > hardcoded 40-bit mask (0xfful), for hard-coded 12-bit (4k)
> > > > pagesize, and on PAPR+/LoPAR also defines TCE as having bits 0-51
> > > >
16M, 256M, 1GB, and the
> > > supported set of sizes is different for P8/P9 and type of IO (PHB,
> > > NVLink/CAPI).
> > >
> > >
> > > > > > Update those functions to guarantee alignment with requested size
> > > > > > usin
On Mon, 2020-08-31 at 14:34 +1000, Alexey Kardashevskiy wrote:
>
> On 29/08/2020 01:25, Leonardo Bras wrote:
> > On Mon, 2020-08-24 at 15:07 +1000, Alexey Kardashevskiy wrote:
> > > On 18/08/2020 09:40, Leonardo Bras wrote:
> > > > Code used to create a ddw prope
On Mon, 2020-08-31 at 14:35 +1000, Alexey Kardashevskiy wrote:
>
> On 29/08/2020 04:36, Leonardo Bras wrote:
> > On Mon, 2020-08-24 at 15:17 +1000, Alexey Kardashevskiy wrote:
> > > On 18/08/2020 09:40, Leonardo Bras wrote:
> > > > As of today, if the biggest DDW
On Thu, 2020-09-03 at 14:41 +1000, Alexey Kardashevskiy wrote:
> I am new to this, so I am trying to understand how a memory page mapped
> > as DMA, and used for something else could be a problem.
>
> From the device prospective, there is PCI space and everything from 0
> till 1<<64 is accessibl
with an Ethernet VF:
4005:01:00.0 Ethernet controller: Mellanox Technologies MT27700 Family
[ConnectX-4 Virtual Function]
Patchset was tested with a 64GB DDW which did not map the whole
partition (128G).
Leonardo Bras (14):
powerpc/pseries/iommu: Replace hard-coded page shift
powerpc/pseries/iommu
, and
tce_buildmulti_pSeriesLP().
Most places had a tbl struct, so using tbl->it_page_shift was simple.
tce_free_pSeriesLP() was a special case, since callers not always have a
tbl struct, so adding a tceshift parameter seems the right thing to do.
Signed-off-by: Leonardo Bras
---
arch/powerpc/include/a
101 - 200 of 433 matches
Mail list logo