On Mon, Dec 03, 2018 at 03:31:59PM -0600, Rob Herring wrote:
> Convert Actions Semi SoC bindings to DT schema format using json-schema.
>
Andreas,
Shall I just apply this patch to Actions sub-tree?
Thanks,
Mani
> Cc: "Andreas Färber"
> Cc: Manivannan Sadhasivam
&g
On Fri, Sep 15, 2023 at 02:43:04PM -0400, Frank Li wrote:
> Difference layerscape chip have not difference exit_from_l2() method.
> Using function pointer for ls1028. It prepare for other layerscape
> suspend/resume support.
>
How about:
Since difference SoCs require different sequence for
On Fri, Sep 15, 2023 at 02:43:06PM -0400, Frank Li wrote:
> ls1043a add suspend/resume support.
>
Same comment as previous patch for patch description.
> Signed-off-by: Frank Li
> ---
> drivers/pci/controller/dwc/pci-layerscape.c | 91 -
> 1 file changed, 90 insertions(+),
On Fri, Sep 15, 2023 at 02:43:05PM -0400, Frank Li wrote:
> ls1021a add suspend/resume support.
>
Please add what the driver is doing during suspend/resume.
> Signed-off-by: Frank Li
> ---
> drivers/pci/controller/dwc/pci-layerscape.c | 88 -
> 1 file changed, 87
On Mon, Oct 16, 2023 at 04:18:36PM -0400, Frank Li wrote:
> On Mon, Oct 16, 2023 at 10:28:24PM +0530, Manivannan Sadhasivam wrote:
> > On Fri, Sep 15, 2023 at 02:43:05PM -0400, Frank Li wrote:
> > > ls1021a add suspend/resume support.
> > >
> >
> > Ple
On Tue, Oct 17, 2023 at 03:31:43PM -0400, Frank Li wrote:
> ls1021a add suspend/resume support.
>
> Implement callback ls1021a_pcie_send_turnoff_msg(), which write scfg's
> SCFG_PEXPMWRCR to issue PME_Turn_off message.
>
> Implement ls1021a_pcie_exit_from_l2() to let controller exit L2 state.
>
On Tue, Oct 17, 2023 at 03:31:45PM -0400, Frank Li wrote:
> ls1043a add suspend/resume support.
> Implement ls1043a_pcie_send_turnoff_msg() to send PME_Turn_Off message.
> Implement ls1043a_pcie_exit_from_l2() to exit from L2 state.
>
Please use the suggestion I gave in patch 2/4.
>
On Tue, Oct 17, 2023 at 03:31:44PM -0400, Frank Li wrote:
> 'pf' and 'lut' is just difference name in difference chips, but basic it is
> a MMIO base address plus an offset.
>
> Rename it to avoid duplicate pf_* and lut_* in driver.
>
"pci-layerscape-ep.c" uses "ls_lut_" prefix and now you are
onors the return value of the callback (which
was ignored previously). So this should be added to the description as well.
> Signed-off-by: Frank Li
With that,
Reviewed-by: Manivannan Sadhasivam
- Mani
> ---
>
> Notes:
> Change from v2 to v3
> - fixed according to
On Tue, Sep 26, 2023 at 10:04:45AM -0400, Frank Li wrote:
> From: Guanhua Gao
>
> Set DMA mask and coherent DMA mask to enable 64-bit addressing.
>
> Signed-off-by: Guanhua Gao
> Signed-off-by: Hou Zhiqiang
> Signed-off-by: Frank Li
Acked-by: Manivannan Sadhasivam
- M
counterpart. Thus the name will be coherent
> with the common driver naming policy. It shall make the driver code more
> readable eliminating visual confusion between the local and generic PCI
> name spaces.
>
> Signed-off-by: Serge Semin
Reviewed-by: Manivannan Sadhasivam
Thanks,
M
ink callbacks
> and as such entirely dummy dw_pcie_ops instances.
>
> Signed-off-by: Serge Semin
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> Reviewed-by: Rob Herring
>
> ---
>
> Changelog v4:
> - This is a new patch created on the v4 lap of the se
On Thu, Jun 15, 2023 at 12:41:12PM -0400, Frank Li wrote:
> From: Xiaowei Bao
>
> A workaround for the issue where the PCI Express Endpoint (EP) controller
> loses the values of the Maximum Link Width and Supported Link Speed from
> the Link Capabilities Register, which initially configured by
On Thu, Jun 15, 2023 at 12:41:11PM -0400, Frank Li wrote:
> Add support to pass Link down notification to Endpoint function driver
> so that the LINK_DOWN event can be processed by the function.
>
> Signed-off-by: Frank Li
One nit below. With that,
Acked-by: Manivanna
On Mon, Jul 17, 2023 at 02:45:23PM -0400, Frank Li wrote:
> On Mon, Jul 17, 2023 at 09:29:10PM +0530, Manivannan Sadhasivam wrote:
> > On Thu, Jun 15, 2023 at 12:41:12PM -0400, Frank Li wrote:
> > > From: Xiaowei Bao
> > >
> > > A workaround for the issu
ally configured by the Reset
> Configuration Word (RCW) during a link-down or hot reset event.
>
> Fixes: a805770d8a22 ("PCI: layerscape: Add EP mode support")
> Signed-off-by: Xiaowei Bao
> Signed-off-by: Hou Zhiqiang
> Signed-off-by: Frank Li
Acked-by: Manivannan Sadhas
ank Li
One minor comment below. With that fixed,
Acked-by: Manivannan Sadhasivam
> ---
> Change from v2 to v3
> - align 80 column
> - clear irq firstly
> - dev_info to dev_dbg
> - remove double space
> - update commit message
>
> Change from v1 to v2
> - pme -
On Mon, May 01, 2023 at 10:48:06AM -0400, Frank Li wrote:
> Layerscape has PME interrupt, which can be used as linkup notifier.
> Set CFG_READY bit when linkup detected.
Where are you setting this bit?
>
> Signed-off-by: Xiaowei Bao
> Signed-off-by: Frank Li
> ---
> Change from v1 to v2
> -
On Fri, Feb 16, 2024 at 02:45:13PM +0100, Niklas Cassel wrote:
> The series is based on top of:
> https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/log/?h=endpoint
>
>
> Hello all,
>
> This series cleans up the hardware description for PCI endpoint BARs.
>
> The problems with the
On Fri, Feb 16, 2024 at 04:49:08PM +0530, Manivannan Sadhasivam wrote:
> On Sat, Feb 10, 2024 at 02:26:25AM +0100, Niklas Cassel wrote:
> > The hardware description for BARs is scattered in many different variables
> > in pci_epc_features. Some of these things are mutually exclusive
On Sat, Feb 10, 2024 at 02:26:25AM +0100, Niklas Cassel wrote:
> The hardware description for BARs is scattered in many different variables
> in pci_epc_features. Some of these things are mutually exclusive, so it
> can create confusion over which variable that has precedence over another.
>
>
ved.
>
> Signed-off-by: Niklas Cassel
Reviewed-by: Manivannan Sadhasivam
- Mani
> Reviewed-by: Kishon Vijay Abraham I
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 3 +-
> drivers/pci/controller/dwc/pci-keystone.c | 12 +++
> .../pci/controller/
On Thu, Nov 30, 2023 at 03:22:14PM -0500, Frank Li wrote:
> On Thu, Nov 30, 2023 at 03:17:39PM -0500, Frank Li wrote:
> > On Thu, Nov 30, 2023 at 10:21:00PM +0530, Manivannan Sadhasivam wrote:
> > > On Wed, Nov 29, 2023 at 04:44:12PM -0500, Frank Li wrote:
> > > > In
On Thu, Nov 30, 2023 at 03:17:39PM -0500, Frank Li wrote:
> On Thu, Nov 30, 2023 at 10:21:00PM +0530, Manivannan Sadhasivam wrote:
> > On Wed, Nov 29, 2023 at 04:44:12PM -0500, Frank Li wrote:
> > > In the suspend path, PME_Turn_Off message is sent to the endpoint to
> &g
On Wed, Nov 29, 2023 at 04:44:10PM -0500, Frank Li wrote:
> ls1021a add suspend/resume support.
>
"Add suspend/resume support for Layerscape LS1021a"
> In the suspend path, PME_Turn_Off message is sent to the endpoint to
> transition the link to L2/L3_Ready state. In this SoC, there is no way
On Wed, Nov 29, 2023 at 04:44:11PM -0500, Frank Li wrote:
> 'pf' and 'lut' is just difference name in difference chips, but basic it is
> a MMIO base address plus an offset.
>
> Rename it to avoid duplicate pf_* and lut_* in driver.
>
> Signed-off-by: Frank Li
Revie
On Wed, Nov 29, 2023 at 04:44:12PM -0500, Frank Li wrote:
> In the suspend path, PME_Turn_Off message is sent to the endpoint to
> transition the link to L2/L3_Ready state. In this SoC, there is no way to
> check if the controller has received the PME_To_Ack from the endpoint or
> not. So to be on
epending on the VAUX supply.
>
> In the resume path, the link is brought back from L2 to L0 by doing a
> software reset.
>
> Signed-off-by: Frank Li
Reviewed-by: Manivannan Sadhasivam
- Mani
> ---
>
> Notes:
> Change from v4 to v5
> - update commit message
>
epending on the VAUX supply.
>
> In the resume path, the link is brought back from L2 to L0 by doing a
> software reset.
>
> Signed-off-by: Frank Li
One comment below. With that addressed,
Reviewed-by: Manivannan Sadhasivam
> ---
>
> Notes:
> Change from v4 to v5
&g
One comment below. With that addressed,
Reviewed-by: Manivannan Sadhasivam
> ---
>
> Notes:
> pf_lut is better than pf_* or lut* because some chip use 'pf', some chip
> use 'lut'.
>
> Change from v4 to v5
> - rename layerscape-ep code also
> change from v
On Fri, Apr 12, 2024 at 02:58:36PM -0500, Bjorn Helgaas wrote:
> On Wed, Mar 27, 2024 at 02:43:31PM +0530, Manivannan Sadhasivam wrote:
> > All of the APIs are missing the Kernel-doc comments. Hence, add them.
>
> > + * dw_pcie_ep_reset_bar - Reset endpoint BAR
>
> App
On Fri, Apr 12, 2024 at 03:22:16PM -0500, Bjorn Helgaas wrote:
> On Wed, Mar 27, 2024 at 02:43:37PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC core initializa
On Thu, Mar 07, 2024 at 09:31:12PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:16PM +0530, Manivannan Sadhasivam wrote:
> > The DWC glue drivers requiring an active reference clock from the PCIe host
> > for initializing their PCIe EP core, set a flag called 'cor
On Thu, Mar 07, 2024 at 10:58:12PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:22PM +0530, Manivannan Sadhasivam wrote:
> > All of the APIs are missing the Kernel-doc comments. Hence, add them.
> >
> > Reviewed-by: Frank Li
> > Signed-of
On Thu, Mar 07, 2024 at 09:36:56PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:18PM +0530, Manivannan Sadhasivam wrote:
> > Currently, dw_pcie_ep_init_registers() API is directly called by the glue
> > drivers requiring active refclk from host. But for th
On Thu, Mar 07, 2024 at 10:43:19PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:20PM +0530, Manivannan Sadhasivam wrote:
> > The PCIe link can go to LINK_DOWN state in one of the following scenarios:
> >
> > 1. Fundamental (PERST#)/hot/warm reset
> > 2.
On Thu, Mar 07, 2024 at 10:09:06PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:19PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC core initializa
On Fri, Mar 08, 2024 at 09:56:33AM +0100, Niklas Cassel wrote:
> On Fri, Mar 08, 2024 at 11:11:52AM +0530, Manivannan Sadhasivam wrote:
> > On Thu, Mar 07, 2024 at 10:43:19PM +0100, Niklas Cassel wrote:
> > > On Mon, Mar 04, 2024 at 02:52:20PM +0530, Manivannan Sadhasivam wrote
On Fri, Mar 08, 2024 at 09:48:07AM +0100, Niklas Cassel wrote:
> On Fri, Mar 08, 2024 at 11:08:29AM +0530, Manivannan Sadhasivam wrote:
> > On Thu, Mar 07, 2024 at 10:09:06PM +0100, Niklas Cassel wrote:
> > > On Mon, Mar 04, 2024 at 02:52:19PM +0530, Manivanna
On Fri, Mar 08, 2024 at 10:05:11AM +0100, Niklas Cassel wrote:
> On Fri, Mar 08, 2024 at 11:06:24AM +0530, Manivannan Sadhasivam wrote:
> > On Thu, Mar 07, 2024 at 09:36:56PM +0100, Niklas Cassel wrote:
> > > On Mon, Mar 04, 2024 at 02:52:18PM +0530, Manivannan Sadhasivam wrote:
, it just removes
eDMA.
Reported-by: Niklas Cassel
Closes: https://lore.kernel.org/linux-pci/ZWYmX8Y%2F7Q9WMxES@x1-carbon
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 19 +--
drivers/pci
-by: Frank Li
Reviewed-by: Niklas Cassel
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
3 files
ete' flag and pci-ep-cfs driver sends the
notification to EPF drivers based on that after each EPF driver bind.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 2 ++
drivers/pci/controller/dwc/pci-imx6.c | 2 ++
drivers/pci/controlle
On Fri, Mar 08, 2024 at 11:22:52AM +0100, Niklas Cassel wrote:
> On Fri, Mar 08, 2024 at 03:19:47PM +0530, Manivannan Sadhasivam wrote:
> > > > > > @@ -467,6 +467,13 @@ static int dra7xx_add_pcie_ep(struct
> > > > > > dra7xx_pcie *dra
-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 9 +
drivers/pci/controller/dwc/pcie-designware.h| 1 -
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 14 --
3 files changed, 9 insertions(+), 15 deletions
f pci/next (6e2fca71e187)
- removed ep_init_late() callback as it is no longer necessary
For previous changelog, please refer [1].
Signed-off-by: Manivannan Sadhasivam
---
Manivannan Sadhasivam (8):
PCI: dwc: ep: Fix DBI access failure for drivers requiring refclk from
host
PCI: dwc: ep: Add
the
'core_init_notifier' flag completely in the later commits.
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 7 +++
drivers/pci/controller/dwc/pci-imx6.c | 8
drivers/pci/controller/dwc/pci
that it
initializes the DWC specific registers.
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 14 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-qcom-ep.c
core initialization code for EP mode")
Co-developed-by: Vidya Sagar
Signed-off-by: Vidya Sagar
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 120 ++--
1 file changed, 71 inserti
All of the APIs are missing the Kernel-doc comments. Hence, add them.
Reviewed-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie
On Mon, Mar 11, 2024 at 10:54:28PM +0100, Niklas Cassel wrote:
> On Mon, Mar 11, 2024 at 08:15:59PM +0530, Manivannan Sadhasivam wrote:
> > >
> > > I would say that it is the following change that breaks things:
> > >
> > > > - if (!core_in
On Fri, Mar 08, 2024 at 02:24:35PM +0100, Niklas Cassel wrote:
> On Mon, Mar 04, 2024 at 02:52:19PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC core initializa
On Fri, Mar 22, 2024 at 12:53:50PM +0100, Niklas Cassel wrote:
> On Thu, Mar 14, 2024 at 01:18:06PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC core initializa
previous Ack as the patches are
heavily modified.
Changes in v6:
- Rebased on top of pci/next (6e2fca71e187)
- removed ep_init_late() callback as it is no longer necessary
For previous changelog, please refer [1].
Signed-off-by: Manivannan Sadhasivam
---
Manivannan Sadhasivam (8):
PCI: dwc: ep: F
core initialization code for EP mode")
Co-developed-by: Vidya Sagar
Signed-off-by: Vidya Sagar
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 120 ++--
1 file changed, 71 inserti
All of the APIs are missing the Kernel-doc comments. Hence, add them.
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 77 +
1 file changed, 77 insertions(+)
diff --git
that it
initializes the DWC specific registers.
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 14 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-qcom-ep.c
ete' flag and pci-ep-cfs driver sends the
notification to EPF drivers based on that after each EPF driver bind.
Tested-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/cadence/pcie-cadence-ep.c | 2 ++
drivers/pci/controller/dwc/pci-dra7xx.c
the
'core_init_notifier' flag completely in the later commits.
Reviewed-by: Yoshihiro Shimoda
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 7 +++
drivers/pci/controller/dwc/pci-imx6.c | 8
drivers
, it just removes
eDMA.
Reported-by: Niklas Cassel
Closes: https://lore.kernel.org/linux-pci/ZWYmX8Y%2F7Q9WMxES@x1-carbon
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 19 +--
drivers/pci
-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 9 +
drivers/pci/controller/dwc/pcie-designware.h| 1 -
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 14 --
3 files changed, 9 insertions(+), 15 deletions
-by: Frank Li
Reviewed-by: Niklas Cassel
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
3 files
, it just removes
eDMA.
Reported-by: Niklas Cassel
Closes: https://lore.kernel.org/linux-pci/ZWYmX8Y%2F7Q9WMxES@x1-carbon
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 19 +--
drivers/pci
On Wed, Mar 27, 2024 at 09:24:05AM +0100, Niklas Cassel wrote:
> Hello Mani,
>
> On Wed, Mar 27, 2024 at 12:05:54PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC c
ete' flag and pci-ep-cfs driver sends the
notification to EPF drivers based on that after each EPF driver bind.
Tested-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/cadence/pcie-cadence-ep.c | 2 ++
drivers/pci/controller/dwc/pci-dra7xx.c
core initialization code for EP mode")
Co-developed-by: Vidya Sagar
Signed-off-by: Vidya Sagar
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 120 ++--
1 file changed, 71 inserti
All of the APIs are missing the Kernel-doc comments. Hence, add them.
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 77 +
1 file changed, 77 insertions(+)
diff --git
that it
initializes the DWC specific registers.
Reviewed-by: Frank Li
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 14 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-qcom-ep.c
the
'core_init_notifier' flag completely in the later commits.
Reviewed-by: Yoshihiro Shimoda
Reviewed-by: Niklas Cassel
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 7 +++
drivers/pci/controller/dwc/pci-imx6.c | 8
drivers
ebased on top of pci/next (6e2fca71e187)
- removed ep_init_late() callback as it is no longer necessary
For previous changelog, please refer [1].
Signed-off-by: Manivannan Sadhasivam
---
Manivannan Sadhasivam (8):
PCI: dwc: ep: Fix DBI access failure for drivers requiring refclk from
host
-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 9 +
drivers/pci/controller/dwc/pcie-designware.h| 1 -
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 14 --
3 files changed, 9 insertions(+), 15 deletions
-by: Frank Li
Reviewed-by: Niklas Cassel
Reviewed-by: Yoshihiro Shimoda
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
3 files
- Rebased on top of pci/next (6e2fca71e187)
- removed ep_init_late() callback as it is no longer necessary
For previous changelog, please refer [1].
Signed-off-by: Manivannan Sadhasivam
---
Manivannan Sadhasivam (10):
PCI: dwc: ep: Remove deinit() callback from struct dw_pcie_ep_ops
PC
from host will call this API only after the refclk is received and
other drivers without refclk dependency will call this API right after
dw_pcie_ep_init().
This change will also allow us to remove the "core_init_notifier" flag in
the later commits.
Signed-off-by: Manivannan Sadhasivam
--
glue drivers to
send the notification to the EPF drivers once the initialization is fully
completed.
Only difference here is that, the drivers requiring refclk from host will
send the notification once refclk is received, while others will send it
during probe time itself.
Signed-off-by: M
core initialization code for EP mode")
Co-developed-by: Vidya Sagar
Signed-off-by: Vidya Sagar
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 120 ++--
1 file changed, 71 insertions(+), 49 deletions(-)
diff --git a/drivers/pci/
that it
initializes the DWC specific registers.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +-
drivers/pci/controller/dwc/pcie-tegra194.c
) mentioned above.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 111 ++--
drivers/pci/controller/dwc/pcie-designware.h| 5 ++
2 files changed, 72 insertions(+), 44 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware
All of the APIs are missing the Kernel-doc comments. Hence, add them.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 92 +
1 file changed, 92 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c
b
Now that the API is available, let's make use of it. It also handles the
reinitialization of DWC non-sticky registers in addition to sending the
notification to EPF drivers.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +-
1 file changed, 1 insertion
let's remove this callback and directly call rcar_gen4_pcie_ep_deinit()
in pcie-rcar-gen4 driver to do resource deallocation after the completion
of dw_pcie_ep_exit() API in rcar_gen4_remove_dw_pcie_ep().
This simplifies the DWC layer.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci
, it just removes
eDMA.
Reported-by: Niklas Cassel
Closes: https://lore.kernel.org/linux-pci/ZWYmX8Y%2F7Q9WMxES@x1-carbon
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 11 +--
drivers/pci/controller/dwc/pcie-designware.h| 5 +
drivers/pci
-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 4 ++--
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/dwc
On Mon, Feb 26, 2024 at 12:18:18PM -0500, Frank Li wrote:
> On Sat, Feb 24, 2024 at 12:24:14PM +0530, Manivannan Sadhasivam wrote:
> > The PCIe link can go to LINK_DOWN state in one of the following scenarios:
> >
> > 1. Fundamental (PERST#)/hot/warm reset
> > 2. Link
On Mon, Feb 26, 2024 at 12:04:33PM -0500, Frank Li wrote:
> On Sat, Feb 24, 2024 at 12:24:12PM +0530, Manivannan Sadhasivam wrote:
> > Currently, dw_pcie_ep_init_registers() API is directly called by the glue
> > drivers requiring active refclk from host. But for th
On Mon, Feb 26, 2024 at 12:20:41PM -0500, Frank Li wrote:
> On Sat, Feb 24, 2024 at 12:24:15PM +0530, Manivannan Sadhasivam wrote:
> > Now that the API is available, let's make use of it. It also handles the
> > reinitialization of DWC non-sticky registers in addi
On Tue, Feb 27, 2024 at 12:28:41PM -0500, Frank Li wrote:
> On Tue, Feb 27, 2024 at 05:51:41PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Feb 26, 2024 at 12:04:33PM -0500, Frank Li wrote:
> > > On Sat, Feb 24, 2024 at 12:24:12PM +0530, Manivannan Sadhasivam wrote:
On Tue, Feb 27, 2024 at 12:26:05PM -0500, Frank Li wrote:
> On Tue, Feb 27, 2024 at 06:00:24PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Feb 26, 2024 at 12:18:18PM -0500, Frank Li wrote:
> > > On Sat, Feb 24, 2024 at 12:24:14PM +0530, Manivannan Sadhasivam wrote:
> >
On Tue, Feb 27, 2024 at 12:34:15PM -0500, Frank Li wrote:
> On Tue, Feb 27, 2024 at 06:02:30PM +0530, Manivannan Sadhasivam wrote:
> > On Mon, Feb 26, 2024 at 12:20:41PM -0500, Frank Li wrote:
> > > On Sat, Feb 24, 2024 at 12:24:15PM +0530, Manivannan Sadhasivam wrote:
> &
On Thu, Feb 29, 2024 at 12:23:16PM +0100, Niklas Cassel wrote:
> Hello Mani,
>
> On Sat, Feb 24, 2024 at 12:24:13PM +0530, Manivannan Sadhasivam wrote:
> > "core_init_notifier" flag is set by the glue drivers requiring refclk from
> > the host to complete the DWC c
On Thu, Feb 29, 2024 at 01:40:29PM +0100, Niklas Cassel wrote:
> On Sat, Feb 24, 2024 at 12:24:09PM +0530, Manivannan Sadhasivam wrote:
> > For DWC glue drivers supporting PERST# (currently Qcom and Tegra194), some
> > of the DWC resources like eDMA should be cleaned up d
On Thu, Feb 29, 2024 at 01:56:23PM +0100, Niklas Cassel wrote:
> Hello Mani,
>
> On Sat, Feb 24, 2024 at 12:24:16PM +0530, Manivannan Sadhasivam wrote:
> > All of the APIs are missing the Kernel-doc comments. Hence, add them.
> >
> > Signed-off-by: Manivannan Sadhasiva
f pci/next (6e2fca71e187)
- removed ep_init_late() callback as it is no longer necessary
For previous changelog, please refer [1].
Signed-off-by: Manivannan Sadhasivam
---
Manivannan Sadhasivam (10):
PCI: dwc: ep: Remove deinit() callback from struct dw_pcie_ep_ops
PCI: dwc:
let's remove this callback and directly call rcar_gen4_pcie_ep_deinit()
in pcie-rcar-gen4 driver to do resource deallocation after the completion
of dw_pcie_ep_exit() API in rcar_gen4_remove_dw_pcie_ep().
This simplifies the DWC layer.
Reviewed-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 4 ++--
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-rcar-gen4.c | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers
, it just removes
eDMA.
Reported-by: Niklas Cassel
Closes: https://lore.kernel.org/linux-pci/ZWYmX8Y%2F7Q9WMxES@x1-carbon
Reviewed-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 11 +--
drivers/pci/controller/dwc/pcie-designware.h
core initialization code for EP mode")
Co-developed-by: Vidya Sagar
Signed-off-by: Vidya Sagar
Reviewed-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 120 ++--
1 file changed, 71 insertions(+), 49 deletions(-)
the
'core_init_notifier' flag completely in the later commits.
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 7 +++
drivers/pci/controller/dwc/pci-imx6.c | 8
drivers/pci/controller/dwc/pci-keystone.c | 9
that it
initializes the DWC specific registers.
Reviewed-by: Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pcie-designware-ep.c | 6 +++---
drivers/pci/controller/dwc/pcie-designware.h| 4 ++--
drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +-
drivers/pci/controller
Frank Li
Signed-off-by: Manivannan Sadhasivam
---
drivers/pci/controller/dwc/pci-dra7xx.c | 2 ++
drivers/pci/controller/dwc/pci-imx6.c | 2 ++
drivers/pci/controller/dwc/pci-keystone.c | 2 ++
drivers/pci/controller/dwc/pci-layerscape-ep.c| 2 ++
drivers/pci/controlle
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