[PATCH v3] powerpc/powernv: add hdat attribute to sysfs

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changes between v2 to v3: - fixed header comments - simplified if statement --- arch/powerpc/include/asm/opal.h| 1 + arch/powerpc/platforms/powernv/Makefile| 1 + arch/powerpc/platforms/powernv/opal-

[PATCH v2] powerpc/powernv: add hdat attribute to sysfs

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Between v1 and v2 of the patch the following changes were made. Changelog: - moved hdat code into opal-hdat.c - added opal-hdat to the makefile - changed struct and variable names from camelcase --- arch/p

[PATCH] powerpc/powernv: add hdat attribute to sysfs

From: Matt Brown <brownmatt1...@gmail.com> The HDAT data area is consumed by skiboot and turned into a device-tree. In some cases we would like to look directly at the HDAT, so this patch adds a sysfs node to allow it to be viewed. This is not possible through /dev/mem as it is reserved

[Patch v4] powerpc/powernv: add hdat attribute to sysfs

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changes between v3 and v4: - changed sysfs attribute permissions from 0444 to 0400 - fixed makefile to be on same line - fixed authorship/copyright info - re-ordered includes - changed hdat_info

[Patch v5] powerpc/powernv: add hdat attribute to sysfs

. This patch also adds sysfs nodes for all properties in the device-tree under /ibm,opal/firmware/exports. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changes between v4 and v5: - all properties under /ibm,opal/firmware/exports in the device-tree are now added

[PATCH] powerpc/powernv: utilising darn instruction for get_random_seed on p9

an alternative function for ppc_md.get_random_seed on p9, utilising the darn instruction. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/include/asm/ppc-opcode.h | 4 arch/powerpc/platforms/powernv/rng.c | 23 ++- 2 files changed, 26 insertions

[v7] powerpc/powernv: add hdat attribute to sysfs

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog: v7: - moved exported_attrs and attr_name into opal_export_attrs --- arch/powerpc/platforms/powernv/opal.c | 84 +++ 1 file changed, 84 insertions(+) diff --git a/arch/powerpc/pla

[PATCH] raid6/altivec: adding vpermxor implementation for raid6 Q syndrome

Note: Also fixed a small bug in pq.h regarding a missing and mismatched ifdef statement Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- include/linux/raid/pq.h | 4 ++ lib/raid6/Makefile | 27 - lib/raid6/algos.c | 4 ++ lib/raid6/altivec.uc

[v8] powerpc/powernv: add 'firmware/exports' attributes to sysfs

-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog v8 - fixed error handling - added dynamic allocation of attributes - using of_property_read_u64_array for reading attr vals - reordered vars - renaming vars --- arch/powerpc/platforms/p

[v6] powerpc/powernv: add hdat attribute to sysfs

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog v6 - attribute names are stored locally, removing potential null pointer errors - added of_node_put for the corresponding of_find_node - folded exports node creation into opal_export_attr() -

[PATCH 1/2] lib/raid6: Build proper files on corresponding arch

Previously the raid6 test Makefile did not correctly build the files for testing on PowerPC. This patch fixes the bug, so that all appropriate files for PowerPC are built. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- lib/raid6/test/Makefile | 8 +--- 1 file chan

[PATCH v3 2/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

raid6: vpermxor8 gen() 26279 MB/s Note: Fixed minor bug in altivec.uc regarding missing and mismatched ifdef statements. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog v2 - Change CONFIG_ALTIVEC to CPU_FTR_ALTIVEC_COMP - Seperate bug fix into dif

[v2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

Bugs fixed: - A small bug in pq.h regarding a missing and mismatched ifdef statement - Fixed test/Makefile to correctly build test on ppc Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- mpe I assume you are ok to take this patch, most of the other pp

Re: [PATCH] raid6/altivec: adding vpermxor implementation for raid6 Q syndrome

Hi Daniel, Just to respond to your comments, The inline asm line cannot be formatted over multiple lines due to the unrolling process, but we can take out the volatile. The pagefault_disable() also seems to be an old method of disabling preemption, but no longer actually works to disable

[v4 1/2] lib/raid6: Build proper files on corresponding arch

Previously the raid6 test Makefile did not correctly build the files for testing on PowerPC. This patch fixes the bug, so that all appropriate files for PowerPC are built. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changlog v2 - v4 - fixup whitespace -

[v4 2/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

raid6: vpermxor8 gen() 26279 MB/s Note: Fixed minor bug in pq.h regarding missing and mismatched ifdef statements. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- include/linux/raid/pq.h | 4 ++ lib/raid6/Makefile | 27 - lib/raid6/algos.c | 4 +

Re: [PATCH v4 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

On Tue, Aug 1, 2017 at 10:44 PM, Segher Boessenkool <seg...@kernel.crashing.org> wrote: > Hi! > > On Mon, Jul 31, 2017 at 10:58:22AM +1000, Matt Brown wrote: >> @@ -1049,6 +1065,10 @@ int analyse_instr(struct instruction_op *op, struct >> pt_regs *regs, >>

Re: [v5 2/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

On Wed, Aug 2, 2017 at 10:20 AM, Daniel Axtens wrote: > Oh, one final thing - I just realised there's a .gitignore file in > lib/raid6/.gitignore that needs to be updated to include the vpermxor > generated files. That should be part of this patch. > Oh, I managed to miss that!

[v6 2/2] lib/raid6: Build proper raid6test files on powerpc

. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v6: - remove vpermxor objs from this patch v5: - moved altivec.uc fix into this patch --- lib/raid6/altivec.uc| 3 +++ lib/raid6/test/Makefile | 5 +++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git

Re: [v5 1/2] lib/raid6: Build proper files on corresponding arch

On Wed, Aug 2, 2017 at 12:00 PM, Michael Ellerman wrote: > Daniel Axtens writes: > >> Hi Matt, >> >>> --- a/lib/raid6/test/Makefile >>> +++ b/lib/raid6/test/Makefile >>> @@ -44,10 +44,12 @@ else ifeq ($(HAS_NEON),yes) >>> CFLAGS +=

[v6 1/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

: vpermxor8 gen() 26279 MB/s Signed-off-by: Matt Brown <matthew.brown@gmail.com> Reviewed-by: Daniel Axtens <d...@axtens.net> --- v6: - added vpermxor files to .gitignore - fixup whitespace - added vpermxor objs to test/Makefile v5: - moved al

[PATCH v3] powerpc/powernv: Use darn instr for random_seed on p9

function up to 10 times before failing. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v3: - add repeat attempts to register the ppc_md.get_random_seed - fixed the PPC_DARN macro - move DARN_ERR definition - fixed commit message v2: - remove

Re: [PATCH v2] powerpc/powernv: Use darn instr for random_seed on p9

On Tue, Aug 1, 2017 at 10:57 PM, Segher Boessenkool wrote: > On Mon, Jul 31, 2017 at 07:10:15PM +1000, Michael Ellerman wrote: >> And ___PPC_RA() is not quite right. The L field is only 2 bits wide, not >> the 5 that ___PPC_RA() allows. >> >> We don't have a __PPC_L()

Re: [PATCH 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

On Thu, Jul 13, 2017 at 5:28 PM, Segher Boessenkool <seg...@kernel.crashing.org> wrote: > On Thu, Jul 13, 2017 at 01:25:46PM +1000, Matt Brown wrote: >> +static nokprobe_inline void do_bpermd(struct pt_regs *regs, unsigned long >> v1, >> +

Re: [PATCH 5/5] powerpc/lib/sstep: Add isel instruction emulation

On Thu, Jul 13, 2017 at 5:47 PM, Segher Boessenkool <seg...@kernel.crashing.org> wrote: > On Thu, Jul 13, 2017 at 01:25:48PM +1000, Matt Brown wrote: >> + case 585: /* isel */ > > The secondary opcode for isel is only 5 bits, not 10 like most other >

Re: [PATCH 4/5] powerpc/lib/sstep: Add prty instruction emulation

On Thu, Jul 13, 2017 at 5:37 PM, Segher Boessenkool <seg...@kernel.crashing.org> wrote: > On Thu, Jul 13, 2017 at 01:25:47PM +1000, Matt Brown wrote: >> +static nokprobe_inline void do_prtyw(struct pt_regs *regs, unsigned long v, >> + int ra) &g

[PATCH 5/5] powerpc/lib/sstep: Add isel instruction emulation

This add emulation for the isel instruction. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/lib/sstep.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index 3228783..bb0e301 100644 --- a/arch/p

[PATCH 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

This patch adds emulation of the cmpb instruction, enabling xmon to emulate this instruction. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/lib/sstep.c | 24 1 file changed, 24 insertions(+) diff --git a/arch/powerpc/lib/sstep.c b/arch/p

[PATCH 4/5] powerpc/lib/sstep: Add prty instruction emulation

This add emulation for the prtyw and prtyd instructions. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/lib/sstep.c | 58 +++- 1 file changed, 52 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/lib/sstep.c

Re: [PATCH v2] powerpc/powernv: Use darn instr for random_seed on p9

On Tue, Jul 11, 2017 at 7:34 PM, Daniel Axtens wrote: > Hi Matt, > >> Currently ppc_md.get_random_seed uses the powernv_get_random_long function. >> A guest calling this function would have to go through the hypervisor. The >> 'darn' instruction, introduced in POWER9, allows us

[PATCH 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

This adds emulations for the popcntb, popcntw, and popcntd instructions. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/lib/sstep.c | 39 +++ 1 file changed, 39 insertions(+) diff --git a/arch/powerpc/lib/sstep.c b/arch/power

[PATCH 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

This adds emulation for the bpermd instruction. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/lib/sstep.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c index cf69987..603654d

[PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params

functions, including drivers, have been modified to conform to the new prototypes. The 64 bit cacheflush functions which were implemented in assembly code (flush_dcache_range, flush_inval_dcache_range) have been translated into C for readability and coherence. Signed-off-by: Matt Brown <matthew.br

[PATCH] powerpc/include/asm: Remove unused 64bit cacheflush function

The flush_dcache_phys_range function is no longer used in the kernel. This patch removes and cleans up the function. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- arch/powerpc/include/asm/cacheflush.h | 1 - arch/powerpc/kernel/misc_64.S

Re: [PATCH] powerpc/asm/cacheflush: Cleanup cacheflush function params

. Thanks, Matt Brown On Thu, Jul 20, 2017 at 11:01 PM, Michael Ellerman <m...@ellerman.id.au> wrote: > Geert Uytterhoeven <ge...@linux-m68k.org> writes: > >> On Thu, Jul 20, 2017 at 1:43 PM, Michael Ellerman <m...@ellerman.id.au> >> wrote: >>> Ma

[PATCH v2 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

This patch adds emulation of the cmpb instruction, enabling xmon to emulate this instruction. Tested for correctness against the cmpb asm instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - fixed mask typecasting ---

[PATCH v2 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

This adds emulations for the popcntb, popcntw, and popcntd instructions. Tested for correctness against the popcnt{b,w,d} instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcodes - fixed typecasting - fixed bitshifting

[PATCH 4/5] powerpc/lib/sstep: Add prty instruction emulation

This add emulation for the prtyw and prtyd instructions. Tested for logical correctness against the prtyw and prtyd instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcodes - fixed bitshifting and typecast errors -

[PATCH v2 5/5] powerpc/lib/sstep: Add isel instruction emulation

This adds emulation for the isel instruction. Tested for correctness against the isel instruction and its extended mnemonics (lt, gt, eq) on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - fixed definition to include the 'if RA=

[PATCH v2 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

This adds emulation for the bpermd instruction. Tested for correctness against the bpermd instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - added ifdef tags to do_bpermd func - fixed bitshifting errors ---

Re: [PATCH v2 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

On Mon, Jul 24, 2017 at 8:28 PM, Balbir Singh <bsinghar...@gmail.com> wrote: > On Mon, Jul 24, 2017 at 11:01 AM, Matt Brown > <matthew.brown@gmail.com> wrote: >> This adds emulations for the popcntb, popcntw, and popcntd instructions. >> Tested for correc

[PATCH v3 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

This adds emulation for the bpermd instruction. Tested for correctness against the bpermd instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - added ifdef tags to do_bpermd func - fixed bitshifting errors ---

[PATCH v3 4/5] powerpc/lib/sstep: Add prty instruction emulation

This adds emulation for the prtyw and prtyd instructions. Tested for logical correctness against the prtyw and prtyd instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v3: - optimised using the Giles-Miller method of side-ways addition v2: -

[PATCH v3 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

This patch adds emulation of the cmpb instruction, enabling xmon to emulate this instruction. Tested for correctness against the cmpb asm instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - fixed mask typecasting ---

[PATCH v3 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

This adds emulations for the popcntb, popcntw, and popcntd instructions. Tested for correctness against the popcnt{b,w,d} instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v3: - optimised using the Giles-Miller method of side-ways addit

[PATCH v3 5/5] powerpc/lib/sstep: Add isel instruction emulation

This adds emulation for the isel instruction. Tested for correctness against the isel instruction and its extended mnemonics (lt, gt, eq) on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - fixed definition to include the 'if RA=

Re: [PATCH v3 4/5] powerpc/lib/sstep: Add prty instruction emulation

On Thu, Jul 27, 2017 at 11:26 AM, Michael Ellerman wrote: > Segher Boessenkool writes: > >> On Wed, Jul 26, 2017 at 08:03:30PM +1000, Michael Ellerman wrote: >>> Segher Boessenkool writes: >>> > A general question

[PATCH v2] powerpc/powernv: Use darn instr for random_seed on p9

for ppc_md.get_random_seed on p9, utilising the darn instruction. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - remove repeat darn attempts - move hook to rng_init --- arch/powerpc/include/asm/ppc-opcode.h | 4 arch/powerpc/platforms/powernv/rng.c

[v5 1/2] lib/raid6: Build proper files on corresponding arch

-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog v5 - moved altivec.uc fix into this patch - updates commit message --- lib/raid6/altivec.uc| 3 +++ lib/raid6/test/Makefile | 8 +--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/lib

[v5 2/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

raid6: vpermxor8 gen() 26279 MB/s Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- Changelog v5 - moved altivec.uc fix into other patch in series --- include/linux/raid/pq.h | 4 ++ lib/raid6/Makefile | 27 - lib/raid6/algos.c | 4 ++ lib/raid

[PATCH v4 3/5] powerpc/lib/sstep: Add bpermd instruction emulation

This adds emulation for the bpermd instruction. Tested for correctness against the bpermd instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v4: - change ifdef macro from __powerpc64__ to CONFIG_PPC64 v2: - fixed opcode - added ifde

[PATCH v4 1/5] powerpc/lib/sstep: Add cmpb instruction emulation

This patch adds emulation of the cmpb instruction, enabling xmon to emulate this instruction. Tested for correctness against the cmpb asm instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v2: - fixed opcode - fixed mask typecasting ---

[PATCH v4 2/5] powerpc/lib/sstep: Add popcnt instruction emulation

This adds emulations for the popcntb, popcntw, and popcntd instructions. Tested for correctness against the popcnt{b,w,d} instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v4: - change ifdef macro from __powerpc64__ to CONFIG_PPC64 -

[PATCH v4 4/5] powerpc/lib/sstep: Add prty instruction emulation

This adds emulation for the prtyw and prtyd instructions. Tested for logical correctness against the prtyw and prtyd instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v4: - use simpler xor method v3: - optimised using the Giles-Miller

[PATCH v4 5/5] powerpc/lib/sstep: Add isel instruction emulation

This adds emulation for the isel instruction. Tested for correctness against the isel instruction and its extended mnemonics (lt, gt, eq) on ppc64le. Signed-off-by: Matt Brown <matthew.brown@gmail.com> --- v4: - simplify if statement to ternary op (same as isel emu

Re: [v6 1/2] raid6/altivec: Add vpermxor implementation for raid6 Q syndrome

On Wed, Aug 9, 2017 at 11:26 PM, Michael Ellerman <m...@ellerman.id.au> wrote: > Matt Brown <matthew.brown@gmail.com> writes: > >> This patch uses the vpermxor instruction to optimise the raid6 Q syndrome. >> This instruction was made available with POWER8,

Re: [PATCH v3] powerpc/powernv: Use darn instr for random_seed on p9

On Sat, Aug 5, 2017 at 3:06 AM, Tyrel Datwyler <tyr...@linux.vnet.ibm.com> wrote: > On 08/03/2017 06:12 PM, Matt Brown wrote: >> This adds the powernv_get_random_darn function which utilises the darn >> instruction, introduced in POWER9. The powernv_get_random_dar

[PATCH] powerpc/lib: Split xor_vmx file to guarantee instruction ordering

-altivec code into xor_vmx_glue.c which calls the altivec functions in xor_vmx.c. By compiling xor_vmx_glue.c without -maltivec we can guarantee that altivec instruction will not be reordered outside of the enable/disable block. Signed-off-by: Matt Brown <matthew.brown@gmail.com> ---

Re: [PATCH] powerpc/lib: Split xor_vmx file to guarantee instruction ordering

On Wed, May 24, 2017 at 11:36 PM, Paul Clarke <p...@us.ibm.com> wrote: > On 05/23/2017 06:45 PM, Matt Brown wrote: >> The xor_vmx.c file is used for the RAID5 xor operations. In these functions >> altivec is enabled to run the operation and then disabled. However due to &g