Re: Oops running iptables -F OUTPUT

On Tue, 28 Aug 2018 14:06:32 +1000 Nicholas Piggin wrote: > On Mon, 27 Aug 2018 19:11:01 +0200 > Andreas Schwab wrote: > > > I'm getting this Oops when running iptables -F OUTPUT: > > > > [ 91.139409] Unable to handle kernel paging request for data at

Re: Oops running iptables -F OUTPUT

On Wed, 29 Aug 2018 13:28:27 +1000 Nicholas Piggin wrote: > On Tue, 28 Aug 2018 14:06:32 +1000 > Nicholas Piggin wrote: > > > On Mon, 27 Aug 2018 19:11:01 +0200 > > Andreas Schwab wrote: > > > > > I'm getting this Oops when running iptables -F OUTP

Re: Oops running iptables -F OUTPUT

On Tue, 28 Aug 2018 18:09:09 +0200 Ard Biesheuvel wrote: > On 28 August 2018 at 15:56, Ard Biesheuvel wrote: > > Hello Andreas, Nick, > > > > On 28 August 2018 at 06:06, Nicholas Piggin > > wrote: > >> On Mon, 27 Aug 2018 19:11:01 +0200 > >> An

Re: [PATCH] powerpc: disable support for relative ksymtab references

are pretty crashy without it here. Don't need to call him off the beach for it. Thanks, Nick > > Reported-by: Andreas Schwab > Suggested-by: Nicholas Piggin > Signed-off-by: Ard Biesheuvel > --- > arch/powerpc/Kconfig | 1 - > 1 file changed, 1 deletion(-) > &g

[RFC PATCH] powerpc/64/module: REL32 relocation range check

The recent module relocation overflow crash demonstrated that we have no range checking on REL32 relative relocations. This patch implements a basic check, the same kernel that previously oopsed and rebooted now continues with some of these errors when loading the module: module_64: x_tables:

Re: [PATCH 2/3] mm/cow: optimise pte dirty/accessed bits handling in fork

On Wed, 29 Aug 2018 08:42:09 -0700 Linus Torvalds wrote: > On Tue, Aug 28, 2018 at 4:20 AM Nicholas Piggin wrote: > > > > fork clears dirty/accessed bits from new ptes in the child. This logic > > has existed since mapped page reclaim was done by scanning ptes when >

Re: [PATCH 2/3] mm/cow: optimise pte dirty/accessed bits handling in fork

On Wed, 29 Aug 2018 16:15:37 -0700 Linus Torvalds wrote: > On Wed, Aug 29, 2018 at 4:12 PM Nicholas Piggin wrote: > > > > Dirty micro fault seems to be the big one for my Skylake, takes 300 > > nanoseconds per access. Accessed takes about 100. (I think, have to > >

Re: [PATCH v3] powerpc/64s: reimplement book3s idle code in C

please drop us a note to > help improve the system] > > url: > https://github.com/0day-ci/linux/commits/Nicholas-Piggin/powerpc-64s-reimplement-book3s-idle-code-in-C/20180829-014912 > base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next > config:

Re: [PATCH] powerpc/powernv: Make possible for user to force a full ipl cec reboot

On Sat, 1 Sep 2018 13:47:45 +0530 Vaibhav Jain wrote: > Ever since fast reboot is enabled by default in opal, > opal_cec_reboot() will use fast-reset instead of full IPL to perform > system reboot. This leaves the user with no direct way to force a full > IPL reboot except changing an nvram sett

[PATCH] KVM: PPC: Book3S HV: Don't use compound_order to determine host mapping size

Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_64_mmu_radix.c | 88 ++ 1 file changed, 34 insertions(+), 54 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c index 0af1c0aea1fe..d8792445d95a 100644

Re: Regression from patch 'tty: hvc: hvc_poll() break hv read loop'

On Tue, 4 Sep 2018 11:48:08 -0600 Jason Gunthorpe wrote: > Hi Nicholas, > > I am testing 4.19-rc2 and I see bad behavior with my qemu hvc0 > console.. > > Running interactive with qemu (qemu-2.11.2-1.fc28) on the console > providing hvc0, using options like: > > -nographic > -c

Re: Regression from patch 'tty: hvc: hvc_poll() break hv read loop'

On Tue, 4 Sep 2018 15:16:35 -0600 Jason Gunthorpe wrote: > On Wed, Sep 05, 2018 at 07:15:29AM +1000, Nicholas Piggin wrote: > > On Tue, 4 Sep 2018 11:48:08 -0600 > > Jason Gunthorpe wrote: > > > > > Hi Nicholas, > > > > > > I am testing 4

[PATCH 0/3] tty: hvc: latency break regression fixes

ment so if you would be able to consider them for the tty tree that would be appreciated. Thanks, Nick Nicholas Piggin (3): tty: hvc: hvc_poll() fix read loop hang tty: hvc: hvc_poll() fix read loop batching tty: hvc: hvc_write() fix break condition drivers/tty/hvc/hvc_cons

[PATCH 1/3] tty: hvc: hvc_poll() fix read loop hang

cheduled a poll if get_chars had returned a full count. Change this to poll on any > 0 count. Fixes: ec97eaad1383 ("tty: hvc: hvc_poll() break hv read loop") Reported-by: Matteo Croce Reported-by: Jason Gunthorpe Tested-by: Matteo Croce Tested-by: Leon Romanovsky Signed-off-by: Nichol

[PATCH 2/3] tty: hvc: hvc_poll() fix read loop batching

s <-hvc_kick kopald-12040d.h. 244us : try_to_wake_up <-hvc_kick kopald-12040d.h. 244us : _raw_spin_lock_irqsave <-try_to_wake_up kopald-12040d.h. 244us : _raw_spin_unlock_irqrestore <-try_to_wake_up Fixes: ec97eaad1383 ("tty: hvc: hvc_poll() break hv read loop") Repo

[PATCH 3/3] tty: hvc: hvc_write() fix break condition

ite() may sleep") Tested-by: Matteo Croce Tested-by: Leon Romanovsky Signed-off-by: Nicholas Piggin --- drivers/tty/hvc/hvc_console.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c index bacf9b73ec98.

Re: [PATCH 3/3] mm: optimise pte dirty/accessed bit setting by demand based pte insertion

On Wed, 5 Sep 2018 07:29:51 -0700 Guenter Roeck wrote: > Hi, > > On Tue, Aug 28, 2018 at 09:20:34PM +1000, Nicholas Piggin wrote: > > Similarly to the previous patch, this tries to optimise dirty/accessed > > bits in ptes to avoid access costs of hardware setting them. &

Re: [PATCH 3/3] tty: hvc: hvc_write() fix break condition

On Wed, 5 Sep 2018 22:14:39 +1000 Nicholas Piggin wrote: > Commit 550ddadcc758 ("tty: hvc: hvc_write() may sleep") broke the > termination condition in case the driver stops accepting characters. > This can result in unnecessary polling of the busy driver. > >

[PATCH v2 0/3] tty: hvc: latency break regression fixes

Re-sending this one with the used-uinitialized warning in patch 3 fixed. Greg these patches are needed to fix regressions in this merge window, please consider them for your tty tree. Thanks, Nick Nicholas Piggin (3): tty: hvc: hvc_poll() fix read loop hang tty: hvc: hvc_poll() fix read

[PATCH v2 1/3] tty: hvc: hvc_poll() fix read loop hang

cheduled a poll if get_chars had returned a full count. Change this to poll on any > 0 count. Reported-by: Matteo Croce Reported-by: Jason Gunthorpe Tested-by: Matteo Croce Tested-by: Jason Gunthorpe Tested-by: Leon Romanovsky Signed-off-by: Nicholas Piggin --- drivers/tty/hvc/hvc_

[PATCH v2 2/3] tty: hvc: hvc_poll() fix read loop batching

s <-hvc_kick kopald-12040d.h. 244us : try_to_wake_up <-hvc_kick kopald-12040d.h. 244us : _raw_spin_lock_irqsave <-try_to_wake_up kopald-12040d.h. 244us : _raw_spin_unlock_irqrestore <-try_to_wake_up Reported-by: Matteo Croce Tested-by: Matteo Croce Tested-by: Jason Guntho

[PATCH v2 3/3] tty: hvc: hvc_write() fix break condition

Gunthorpe Tested-by: Leon Romanovsky Signed-off-by: Nicholas Piggin --- drivers/tty/hvc/hvc_console.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c index bacf9b73ec98..27284a2dcd2b 100644 --- a/drive

Re: How to handle PTE tables with non contiguous entries ?

On Mon, 10 Sep 2018 14:34:37 + Christophe Leroy wrote: > Hi, > > I'm having a hard time figuring out the best way to handle the following > situation: > > On the powerpc8xx, handling 16k size pages requires to have page tables > with 4 identical entries. > > Initially I was thinking abou

Re: [PATCH] KVM: PPC: Book3S HV: Don't use compound_order to determine host mapping size

On Tue, 11 Sep 2018 20:01:54 +1000 Paul Mackerras wrote: > On Tue, Sep 04, 2018 at 06:16:01PM +1000, Nicholas Piggin wrote: > > THP paths can defer splitting compound pages until after the actual > > remap and TLB flushes to split a huge PMD/PUD. This causes radix > > parti

[PATCH v2] KVM: PPC: Book3S HV: Don't use compound_order to determine host mapping size

nuxppc-dev@lists.ozlabs.org Signed-off-by: Nicholas Piggin --- v2: fold in unaligned case bugfix arch/powerpc/kvm/book3s_64_mmu_radix.c | 91 +++--- 1 file changed, 37 insertions(+), 54 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/p

[PATCH v4] powerpc/64s: reimplement book3s idle code in C

mization too. - KVM secondary entry and cede is now more of a call/return style rather than branchy. nap_state_lost is not required because KVM always returns via NVGPR restoring path. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin - P9 restores some of the PMU SPRs, but no

Re: [PATCH v4] powerpc: Avoid code patching freed init sections

contains(exec_addr, 4)) { > + pr_debug("Skipping init section patching addr: 0x%px\n", > exec_addr); > + return 0; > + } What we should do is a whitelist, make sure it's only patching the sections we want it to. That's a bigger job when you consider modules and things too though, so this looks good for now. Thanks, Reviewed-by: Nicholas Piggin

Re: [PATCH v2 5/5] powerpc: Remove -mno-sched-epilog

On Fri, 14 Sep 2018 13:36:49 +0930 Joel Stanley wrote: > This effectively reverts 7563dc645853 ("powerpc: Work around gcc's > -fno-omit-frame-pointer bug"), a workaround for a bug in GCC 4.1.3 when > building 2.6.26 kernel. > > The flag is not supported by clang, but reading the history of the >

[PATCH 0/3] -mno-sched-epilog removal

This removes -mno-sched-epilog on clang and gcc 4.9 and newer. Not tested with old compilers though. Nicholas Piggin (3): powerpc: remove old GCC version checks powerpc: consolidate -mno-sched-epilog into FTRACE flags powerpc: avoid -mno-sched-epilog on GCC 4.9 and newer arch/powerpc

[PATCH 1/3] powerpc: remove old GCC version checks

GCC 4.6 is the minimum supported now. Signed-off-by: Nicholas Piggin --- arch/powerpc/Makefile | 31 ++- 1 file changed, 2 insertions(+), 29 deletions(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 11a1acba164a..2ecd0976914a 100644 --- a/arch

[PATCH 2/3] powerpc: consolidate -mno-sched-epilog into FTRACE flags

Signed-off-by: Nicholas Piggin --- arch/powerpc/Makefile| 12 ++-- arch/powerpc/kernel/Makefile | 8 arch/powerpc/kernel/trace/Makefile | 2 +- arch/powerpc/platforms/powermac/Makefile | 2 +- arch/powerpc/xmon/Makefile | 2

[PATCH 3/3] powerpc: avoid -mno-sched-epilog on GCC 4.9 and newer

Signed-off-by: Nicholas Piggin --- arch/powerpc/Makefile | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index be47cf8a0798..07d9dce7eda6 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -165,8 +165,12

[PATCH 00/12] SLB miss conversion to C, and SLB optimisations

. Thanks, Nick Nicholas Piggin (12): powerpc/64s/hash: Fix stab_rr off by one initialization powerpc/64s/hash: avoid the POWER5 < DD2.1 slb invalidate workaround on POWER8/9 powerpc/64s/hash: move POWER5 < DD2.1 slbie workaround where it is needed powerpc/64s/hash: remove the v

[PATCH 01/12] powerpc/64s/hash: Fix stab_rr off by one initialization

This causes SLB alloation to start 1 beyond the start of the SLB. There is no real problem because after it wraps it stats behaving properly, it's just surprisig to see when looking at SLB traces. Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 2 +- 1 file changed, 1 insertion(

[PATCH 02/12] powerpc/64s/hash: avoid the POWER5 < DD2.1 slb invalidate workaround on POWER8/9

I only have POWER8/9 to test, so just remove it for those. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 2 ++ arch/powerpc/mm/slb.c | 8 +--- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel

[PATCH 03/12] powerpc/64s/hash: move POWER5 < DD2.1 slbie workaround where it is needed

The POWER5 < DD2.1 issue is that slbie needs to be issued more than once. It came in with this change: ChangeSet@1.1608, 2004-04-29 07:12:31-07:00, da...@gibson.dropbear.id.au [PATCH] POWER5 erratum workaround Early POWER5 revisions ( --- arch/powerpc/mm/slb.c | 14 +++--- 1 file cha

[PATCH 04/12] powerpc/64s/hash: remove the vmalloc segment from the bolted SLB

better to solve this in a more general way. A subsequent change will track free SLB entries and uses those rather than round-robin overwrite valid entries, which makes it far less likely for kernel SLBEs to be evicted after they are installed. Signed-off-by: Nicholas Piggin --- arch/powerpc

[PATCH 05/12] powerpc/64s/hash: Use POWER6 SLBIA IH=1 variant in switch_slb

switchig (if the thread faulted in more than 8 user SLBEs). Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 38 +++--- 1 file changed, 23 insertions(+), 15 deletions(-) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index a5e58f11d676

[PATCH 06/12] powerpc/64s/hash: Use POWER9 SLBIA IH=3 variant in switch_slb

-effect, the POWER5 < DD2.1 SLB invalidation workaround is also avoided on POWER9. Process context switching rate is improved about 2.2% for a small process that hits the slb cache which is the best case for the current code. Signed-of-by: Nicholas Piggin --- arch/powerpc/mm/slb.c|

[PATCH 07/12] powerpc/64s/hash: convert SLB miss handlers to C

class kernel environment and exit via ret_from_except, however that doesn't seem to be necessary at the moment, so we only do that if a bad fault is encountered. [ Credit to Aneesh for bug fixes, error checks, and improvements to bad address handling, etc ] Signed-off-by: Nicholas Piggin

[PATCH 08/12] powerpc/64s/hash: remove user SLB data from the paca

ved from the paca and accessed directly. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 + arch/powerpc/include/asm/paca.h | 13 -- arch/powerpc/kernel/asm-offsets.c | 9 arch/powerpc/kernel/paca.c|

[PATCH 09/12] powerpc/64s/hash: SLB allocation status bitmaps

Add 32-entry bitmaps to track the allocation status of the first 32 SLB entries, and whether they are user or kernel entries. These are used to allocate free SLB entries first, before resorting to the round robin allocator. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/paca.h

[PATCH 10/12] powerpc/64s: xmon do not dump hash fields when using radix mode

Signed-off-by: Nicholas Piggin --- arch/powerpc/xmon/xmon.c | 40 +--- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 323aac8321fa..5dec84aba59e 100644 --- a/arch/powerpc/xmon/xmon.c

[PATCH 11/12] powerpc/64s/hash: provide arch_setup_exec hooks for hash slice setup

This will be used by the SLB code in the next patch, but for now this sets the slb_addr_limit to the correct size for 32-bit tasks. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/mmu-hash.h | 2 ++ arch/powerpc/include/asm/slice.h | 1 + arch/powerpc

[PATCH 12/12] powerpc/64s/hash: Add a SLB preload cache

th 1T segments 900 to 21. These could almost all be eliminated by preloading a bit more carefully with ELF binary loading. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/processor.h | 1 + arch/powerpc/include/asm/thread_info.h | 5 + arch/powerpc/kernel/process.c | 7 ++

Re: [PATCH v2 5/5] powerpc: Remove -mno-sched-epilog

> > Heh, did PASemi sell boxes? Interesting, I'll have to read up on my history. > > On Thu, Sep 13, 2018 at 10:06 PM Nicholas Piggin wrote: > > I don't think we can remove it completely because up to at least 4.6 > > maybe 4.8 has problems. > > > > I h

Re: [PATCH 01/12] powerpc/64s/hash: Fix stab_rr off by one initialization

On Mon, 17 Sep 2018 16:21:51 +0930 Joel Stanley wrote: > On Sat, 15 Sep 2018 at 01:03, Nicholas Piggin wrote: > > > > This causes SLB alloation to start 1 beyond the start of the SLB. allocation > > There is no real problem because after it wraps it stats b

Re: [PATCH 03/12] powerpc/64s/hash: move POWER5 < DD2.1 slbie workaround where it is needed

On Mon, 17 Sep 2018 11:30:16 +0530 "Aneesh Kumar K.V" wrote: > Nicholas Piggin writes: > > > The POWER5 < DD2.1 issue is that slbie needs to be issued more than > > once. It came in with this change: > > > > ChangeSet@1.1608, 2004-04-29 07:12:31-07:0

Re: [PATCH 05/12] powerpc/64s/hash: Use POWER6 SLBIA IH=1 variant in switch_slb

On Mon, 17 Sep 2018 11:38:35 +0530 "Aneesh Kumar K.V" wrote: > Nicholas Piggin writes: > > > The SLBIA IH=1 hint will remove all non-zero SLBEs, but only > > invalidate ERAT entries associated with a class value of 1, for > > processors that support the hi

Re: [PATCH 3/3] mm: optimise pte dirty/accessed bit setting by demand based pte insertion

On Wed, 5 Sep 2018 07:29:51 -0700 Guenter Roeck wrote: > Hi, > > On Tue, Aug 28, 2018 at 09:20:34PM +1000, Nicholas Piggin wrote: > > Similarly to the previous patch, this tries to optimise dirty/accessed > > bits in ptes to avoid access costs of hardware setting them. &

Re: [PATCH 3/3] mm: optimise pte dirty/accessed bit setting by demand based pte insertion

On Fri, 21 Sep 2018 16:42:05 +0800 Ley Foon Tan wrote: > On Tue, 2018-09-18 at 03:53 +1000, Nicholas Piggin wrote: > > On Wed, 5 Sep 2018 07:29:51 -0700 > > Guenter Roeck wrote: > > > > > > > > Hi, > > > > > > On Tue

Re: [PATCH v4] powerpc/64s: reimplement book3s idle code in C

On Wed, 26 Sep 2018 19:39:14 +0530 Akshay Adiga wrote: > On Fri, Sep 14, 2018 at 11:52:40AM +1000, Nicholas Piggin wrote: > > + > > + /* > > +* On POWER9, SRR1 bits do not match exactly as expected. > > +* SRR1_WS_GPRLOSS (10b) can also result in SPR loss

[PATCH 0/4] Fixes for SLB to C series

These are some fixes I've got so far to sovle hangs and multi hits particularly on P8 with 256MB segments (but can also be reproduced on P9). I'm not yet sure these solve all the problems, and they need some good review and testing. So far they have been solid for me. Thanks, Nick

[PATCH 1/4] powerpc/64: add struct int_regs to save additional registers on stack

truct pt_regs at offset 0. This is required for a following fix to save the PPR SPR on stack. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/ptrace.h | 17 +++--- arch/powerpc/kernel/asm-offsets.c | 21 - arch/powerpc/kernel/process.c

[PATCH 2/4] powerpc/64: interrupts save PPR on stack rather than thread_struct

mal exception entry handlers would not cause an SLB fault. Fix this by allocating room in the interrupt stack to save PPR. Fixes: 5e46e29e6a97 ("powerpc/64s/hash: convert SLB miss handlers to C") Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/exception-64s.h | 9 -

[PATCH 3/4] powerpc/64s/hash: Fix preloading of SLB entries

eload cache") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index b438220c4336..c1425853af5d 100644 --- a/arch/powerpc/mm/slb.c +++ b/arch/powerpc/mm/slb.c @@ -311,6 +311,

[PATCH 4/4] powerpc/64s/hash: add more barriers for slb preloading

B preload cache") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 37 +++-- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index c1425853af5d..f93ed8afbac6 100644 --- a/arch/powerpc/mm/slb.c +

Re: [PATCH 2/2] powerpc/time: Only cap decrementer when watchdog is enabled

On Sat, 29 Sep 2018 11:26:07 +1000 Anton Blanchard wrote: > If CONFIG_PPC_WATCHDOG is enabled, we always cap the decrementer to > 0x7fff. As suggested by Nick, add a run time check of the watchdog > cpumask, so if it is disabled we use the large decrementer. > > Signed-off-by: Anton Blanchar

Re: [PATCH 2/2] powerpc/64: Increase stack redzone for 64-bit kernel to 512 bytes

On Sat, 29 Sep 2018 23:25:20 -0700 Bin Meng wrote: > commit 573ebfa6601f ("powerpc: Increase stack redzone for 64-bit > userspace to 512 bytes") only changes stack userspace redzone size. > We need increase the kernel one to 512 bytes too per ABIv2 spec. You're right we need 512 to be compatible

Re: [PATCH 2/2] powerpc/64: Increase stack redzone for 64-bit kernel to 512 bytes

On Mon, 1 Oct 2018 09:11:04 +0800 Bin Meng wrote: > Hi Nick, > > On Mon, Oct 1, 2018 at 7:27 AM Nicholas Piggin wrote: > > > > On Sat, 29 Sep 2018 23:25:20 -0700 > > Bin Meng wrote: > > > > > commit 573ebfa6601f ("powerpc: Increase stack

Re: [PATCH] powerpc: remove leftover code of old GCC version checks

://lore.kernel.org/patchwork/patch/977805/ Sorry, I missed or forgot about your patch :( Thanks for tidying up my mess! Acked-by: Nicholas Piggin > > Anyway, this cleans up the left-over of the Nicholas' one. > > > arch/powerpc/Makefile | 8 > 1 file changed,

Re: [PATCH 2/2] powerpc/64: Increase stack redzone for 64-bit kernel to 512 bytes

On Mon, 1 Oct 2018 03:51:21 -0500 Segher Boessenkool wrote: > Hi! > > On Mon, Oct 01, 2018 at 12:22:56PM +1000, Nicholas Piggin wrote: > > On Mon, 1 Oct 2018 09:11:04 +0800 > > Bin Meng wrote: > > > On Mon, Oct 1, 2018 at 7:27 AM Nicholas Piggin wrote: >

Re: [PATCH 2/2] powerpc/64: Increase stack redzone for 64-bit kernel to 512 bytes

On Mon, 1 Oct 2018 20:41:19 +0800 Bin Meng wrote: > Hi Nick, > > On Mon, Oct 1, 2018 at 10:23 AM Nicholas Piggin wrote: > > > > On Mon, 1 Oct 2018 09:11:04 +0800 > > Bin Meng wrote: > > > > > Hi Nick, > > > > >

[PATCH v2 0/9] Fixes for SLB to C series

...) Question is whether to revert the series and try again next time. I'm inclined to maybe say revert because it's been holdig up the tree a bit and also some of these patches like the PPR fixes are pretty complicated and should really be done as pre-requisites rather than fixes. Thanks, Nick

[PATCH v2 1/9] Revert "powerpc/64s/hash: remove user SLB data from the paca"

s are rarely used by software or apply to very old hardware. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/mmu-hash.h | 1 - arch/powerpc/include/asm/paca.h | 13 ++ arch/powerpc/kernel/asm-offsets.c | 9 arch/powerpc/kernel/p

[PATCH v2 2/9] powerpc/64: add struct int_regs to save additional registers on stack

truct pt_regs at offset 0. This is required for a following fix to save the PPR SPR on stack. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/ptrace.h | 17 +++--- arch/powerpc/kernel/asm-offsets.c | 21 - arch/powerpc/kernel/process.c

[PATCH v2 3/9] powerpc/64: interrupts save PPR on stack rather than thread_struct

mal exception entry handlers would not cause an SLB fault. Fix this by allocating room in the interrupt stack to save PPR. Fixes: 5e46e29e6a97 ("powerpc/64s/hash: convert SLB miss handlers to C") Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/exception-64s.h | 9 -

[PATCH v2 4/9] powerpc/64s/hash: Fix preloading of SLB entries

eload cache") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index 74c3b6f8e9b7..a5bd3c02d432 100644 --- a/arch/powerpc/mm/slb.c +++ b/arch/powerpc/mm/slb.c @@ -311,6 +311,

[PATCH v2 5/9] powerpc/64s/hash: add more barriers for slb preloading

ca4e126a3f ("powerpc/64s/hash: Add a SLB preload cache") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 37 +++-- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index a5bd3c02d432..8c386

[PATCH v2 6/9] powerpc/64s/hash: SLB fix preemption issues

miss handlers to C") Fixes: 89ca4e126a3f ("powerpc/64s/hash: Add a SLB preload cache") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 12 1 file changed, 12 insertions(+) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index 8c38659f1b6b..b5a33

[PATCH v2 7/9] powerpc/64s/hash: Fix false positive preempt warnings

Fixes: 5e46e29e6a97 ("powerpc/64s/hash: convert SLB miss handlers to C") Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/slb.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c index b5

[PATCH v2 8/9] powerpc/64s/hash: slb_flush_and_rebolt simplify

have it just load the kernel stack from what's currently in the shadow SLB area. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/mmu-hash.h | 2 +- arch/powerpc/kernel/swsusp_asm64.S| 2 +- arch/powerpc/mm/hash_utils_64.c | 4 +- arch/power

[PATCH v2 9/9] powerpc/64s/hash: add some slb debugging tests

This adds CONFIG_DEBUG_VM checks to ensure: - The kernel stack is in the SLB after it's flushed and bolted. - We don't insert an SLB for an address that is aleady in the SLB. - The kernel SLB miss handler does not take an SLB miss. Signed-off-by: Nicholas Piggin --- arch/powerpc/i

Re: [PATCH] powerpc: Add doorbell tracepoints

On Wed, 3 Oct 2018 10:29:57 +1000 Anton Blanchard wrote: > When analysing sources of OS jitter, I noticed that doorbells cannot be > traced. > > Signed-off-by: Anton Blanchard Acked-by: Nicholas Piggin > --- > arch/powerpc/include/asm/trace.h | 16 >

Re: [RFC PATCH v3 1/7] book3s/64: avoid circular header inclusion in mmu-hash.h

hat, this patch moves into a new header called > asm/task_size.h the information from asm/processor.h requires by > mmu-hash.h Doesn't look like you use this header in 32-bit code. Put task_size.h in asm/64/ maybe? Reviewed-by: Nicholas Piggin > > Signed-off-by: Christophe Lero

Re: [RFC PATCH v3 2/7] powerpc: Prepare for moving thread_info into task_struct

d call_do_softirq(void *tp); > +extern void call_do_irq(struct pt_regs *regs, void *tp); void *sp for these ? This all seems okay to me except the 32-bit code which I don't know. Would it be any trouble for you to put the TI_CPU bits into their own patch? Reviewed-by: Nicholas Piggin

Re: [RFC PATCH v3 3/7] powerpc: Activate CONFIG_THREAD_INFO_IN_TASK

uild to get the current processor ID. > + */ > +#define raw_smp_processor_id() (*(unsigned > int*)((void*)current + _TASK_CPU)) This is clever but yes ugly. Can't you include asm-offsets.h? riscv seems to. I'm not 100% sure on kgdb and kexec stuff but I think it seems okay. Looks like a pretty nice cleanup too aside from the features it brings, thanks for working on it. Reviewed-by: Nicholas Piggin

Re: [RFC PATCH v3 4/7] powerpc: regain entire stack space

On Mon, 1 Oct 2018 12:30:25 + (UTC) Christophe Leroy wrote: > thread_info is not anymore in the stack, so the entire stack > can now be used. Nice. > > In the meantime, all pointers to the stacks are not anymore > pointers to thread_info so this patch changes them to void* Wasn't this pr

Re: [RFC PATCH v3 5/7] powerpc: 'current_set' is now a table of task_struct pointers

changes > their type to task_struct, and renames secondary_ti to > secondary_current. I'm not sure if current_set is actually needed is it? Because 64-bit already initializes paca->ksave / PACAKSAVE. That might be a cleanup to do after your series. Reviewed-by: Nicholas Piggin

Re: [RFC PATCH v3 7/7] powerpc/64: Modify CURRENT_THREAD_INFO()

On Mon, 1 Oct 2018 12:30:31 + (UTC) Christophe Leroy wrote: > CURRENT_THREAD_INFO() now uses the PACA to retrieve 'current' pointer, > it doesn't use 'sp' anymore. Can you remove this too now? I think it will be clearer what's going on and easier to read once everyone remembers current is t

Re: [RFC PATCH v3 3/7] powerpc: Activate CONFIG_THREAD_INFO_IN_TASK

On Wed, 3 Oct 2018 07:47:05 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 07:30, Nicholas Piggin a écrit : > > On Mon, 1 Oct 2018 12:30:23 + (UTC) > > Christophe Leroy wrote: > > > >> This patch activates CONFIG_THREAD_INFO_IN_TASK which > >>

Re: [RFC PATCH v3 2/7] powerpc: Prepare for moving thread_info into task_struct

On Wed, 3 Oct 2018 07:49:44 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 07:02, Nicholas Piggin a écrit : > > On Mon, 1 Oct 2018 12:30:21 + (UTC) > > Christophe Leroy wrote: > > > >> This patch cleans the powerpc kernel before activating > >>

Re: [RFC PATCH v3 5/7] powerpc: 'current_set' is now a table of task_struct pointers

On Wed, 3 Oct 2018 08:00:43 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 07:41, Nicholas Piggin a écrit : > > On Mon, 1 Oct 2018 12:30:27 + (UTC) > > Christophe Leroy wrote: > > > >> The table of pointers 'current_set' has been used for ret

Re: [RFC PATCH v3 3/7] powerpc: Activate CONFIG_THREAD_INFO_IN_TASK

On Wed, 3 Oct 2018 08:04:49 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 07:52, Nicholas Piggin a écrit : > > On Wed, 3 Oct 2018 07:47:05 +0200 > > Christophe LEROY wrote: > > > >> Le 03/10/2018 à 07:30, Nicholas Piggin a écrit : > >>&g

Re: [RFC PATCH v3 4/7] powerpc: regain entire stack space

On Wed, 3 Oct 2018 07:52:59 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 07:34, Nicholas Piggin a écrit : > > On Mon, 1 Oct 2018 12:30:25 + (UTC) > > Christophe Leroy wrote: > > > >> thread_info is not anymore in the stack, so the entire stack > &g

Re: [RFC PATCH v3 4/7] powerpc: regain entire stack space

On Wed, 3 Oct 2018 08:45:25 +0200 Christophe LEROY wrote: > Le 03/10/2018 à 08:30, Nicholas Piggin a écrit : > > On Wed, 3 Oct 2018 07:52:59 +0200 > > Christophe LEROY wrote: > > > >> Le 03/10/2018 à 07:34, Nicholas Piggin a écrit : > >>&g

Re: [PATCH] powerpc: Fix HMIs on big-endian with CONFIG_RELOCATABLE=y

On Mon, 08 Oct 2018 15:08:31 +1100 Benjamin Herrenschmidt wrote: > HMIs will crash the kernel due to > > BRANCH_LINK_TO_FAR(hmi_exception_realmode) > > Calling into the OPD instead of the actual code. > > Signed-off-by: Benjamin Herrenschmidt > --- > > This hack fixes it for me, but it

Re: [PATCH v2 3/3] powerpc: machine check interrupt is a non-maskable interrupt

On Mon, 8 Oct 2018 17:39:11 +0200 Christophe LEROY wrote: > Hi Nick, > > Le 19/07/2017 à 08:59, Nicholas Piggin a écrit : > > Use nmi_enter similarly to system reset interrupts. This uses NMI > > printk NMI buffers and turns off various debugging facilities that > &

Re: [PATCH v2 3/3] powerpc: machine check interrupt is a non-maskable interrupt

On Tue, 9 Oct 2018 06:46:30 +0200 Christophe LEROY wrote: > Le 09/10/2018 à 06:32, Nicholas Piggin a écrit : > > On Mon, 8 Oct 2018 17:39:11 +0200 > > Christophe LEROY wrote: > > > >> Hi Nick, > >> > >> Le 19/07/2017 à 08:59, Nicholas Pig

Re: [PATCH v6 0/9] powerpc: Switch to CONFIG_THREAD_INFO_IN_TASK

On Mon, 08 Oct 2018 20:59:56 +1100 Benjamin Herrenschmidt wrote: > On Mon, 2018-10-08 at 09:16 +, Christophe Leroy wrote: > > The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which > > moves the thread_info into task_struct. > > We need to make sure we don't have code th

Re: [PATCH v2 3/3] powerpc: machine check interrupt is a non-maskable interrupt

On Tue, 9 Oct 2018 09:36:18 + Christophe Leroy wrote: > On 10/09/2018 05:30 AM, Nicholas Piggin wrote: > > On Tue, 9 Oct 2018 06:46:30 +0200 > > Christophe LEROY wrote: > > > >> Le 09/10/2018 à 06:32, Nicholas Piggin a écrit : > >>> On Mon,

Re: [PATCH v2 3/3] powerpc: machine check interrupt is a non-maskable interrupt

On Tue, 9 Oct 2018 14:01:37 +0200 Christophe LEROY wrote: > Le 09/10/2018 à 13:16, Nicholas Piggin a écrit : > > On Tue, 9 Oct 2018 09:36:18 + > > Christophe Leroy wrote: > > > >> On 10/09/2018 05:30 AM, Nicholas Piggin wrote: > >>> On Tue,

[PATCH v5] powerpc/64s: reimplement book3s idle code in C

mization too. - KVM secondary entry and cede is now more of a call/return style rather than branchy. nap_state_lost is not required because KVM always returns via NVGPR restoring path. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- Notes: - P9 restores some of the PMU S

Re: [PATCH v2 3/3] powerpc: machine check interrupt is a non-maskable interrupt

On Sat, 13 Oct 2018 08:29:48 + Christophe Leroy wrote: > On 10/11/2018 02:31 PM, Christophe LEROY wrote: > > > > > > Le 09/10/2018 à 13:16, Nicholas Piggin a écrit : > >> On Tue, 9 Oct 2018 09:36:18 + > >> Christophe Leroy wrote: > >>

[PATCH v6] powerpc/64s: reimplement book3s idle code in C

mization too. - KVM secondary entry and cede is now more of a call/return style rather than branchy. nap_state_lost is not required because KVM always returns via NVGPR restoring path. Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- Notes: - P9 restores some of the PMU SPRs,

Re: [PATCH 1/3] powerpc: Split user/kernel definitions of struct pt_regs

are the same. We will fix that code in future patches, and then > we can break the strict symmetry between the two structs. > > Signed-off-by: Michael Ellerman Yeah this looks much better than my int_frame thing, thanks. Reviewed-by: Nicholas Piggin Thanks, Nick

Re: [PATCH] powerpc/traps: restore recoverability of machine_check interrupts

his patch calls nmi_exit() before calling die() in order to restore > > the interrupt state we had before calling nmi_enter() > > > > Fixes: b96672dd840f ("powerpc: Machine check interrupt is a non-maskable > > interrupt") > > Signed-off-by: Christophe Leroy R

[PATCH v2 0/5] mm: dirty/accessed pte optimisations

Since v1 I fixed the hang in nios2, split the fork patch into two as Linus asked, and added hugetlb code for the "don't bother write protecting already writeprotected" patch. Please consider this for more cooking in -mm. Thanks, Nick Nicholas Piggin (5): nios2: update_mmu_cach

[PATCH v2 1/5] nios2: update_mmu_cache clear the old entry from the TLB

TLB entry upon the first fault. This will cause the fast TLB handler to load the new pte and avoid the Linux page fault entirely. Reviewed-by: Ley Foon Tan Signed-off-by: Nicholas Piggin --- arch/nios2/mm/cacheflush.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/nios2/mm

[PATCH v2 2/5] mm/cow: don't bother write protecting already write-protected huge pages

This is the HugePage / THP equivalent for 1b2de5d039c8 ("mm/cow: don't bother write protecting already write-protected pages"). Signed-off-by: Nicholas Piggin --- mm/huge_memory.c | 14 ++ mm/hugetlb.c | 2 +- 2 files changed, 11 insertions(+), 5 deletions(-)

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