Re: [PATCH 20/33] docs: ABI: testing: make the files compatible with ReST output

[Richard Cochran]

On Wed, Oct 28, 2020 at 03:23:18PM +0100, Mauro Carvalho Chehab wrote:

> diff --git a/Documentation/ABI/testing/sysfs-uevent 
> b/Documentation/ABI/testing/sysfs-uevent
> index aa39f8d7bcdf..d0893dad3f38 100644
> --- a/Documentation/ABI/testing/sysfs-uevent
> +++ b/Documentation/ABI/testing/sysfs-uevent
> @@ -19,7 +19,8 @@ Description:
>  a transaction identifier so it's possible to use the same 
> UUID
>  value for one or more synthetic uevents in which case we
>  logically group these uevents together for any userspace
> -listeners. The UUID value appears in uevent as
> +listeners. The UUID value appears in uevent as:

I know almost nothing about Sphinx, but why have one colon here ^^^ and ...

> +
>  "SYNTH_UUID=----" environment
>  variable.
>  
> @@ -30,18 +31,19 @@ Description:
>  It's possible to define zero or more pairs - each pair is 
> then
>  delimited by a space character ' '. Each pair appears in
>  synthetic uevent as "SYNTH_ARG_KEY=VALUE". That means the KEY
> -name gains "SYNTH_ARG_" prefix to avoid possible collisions
> +name gains `SYNTH_ARG_` prefix to avoid possible collisions
>  with existing variables.
>  
> -Example of valid sequence written to the uevent file:
> +Example of valid sequence written to the uevent file::

... two here?

Thanks,
Richard

Re: [EXT] Re: [PATCH v1] timer:clock:ptp: add support the dynamic posix clock alarm set for ptp

[Richard Cochran]

On Wed, May 08, 2019 at 07:36:54AM -0700, Richard Cochran wrote:
> No the alarm functionality has been removed.  It will not be coming
> back, unless there are really strong arguments to support it.

Here is some more background:

commit 3a06c7ac24f9f24ec059cd77c2dbdf7fbfd0aaaf
Author: Thomas Gleixner 
Date:   Tue May 30 23:15:38 2017 +0200

posix-clocks: Remove interval timer facility and mmap/fasync callbacks

The only user of this facility is ptp_clock, which does not implement any of
those functions.

Remove them to prevent accidental users. Especially the interval timer
interfaces are now more or less impossible to implement because the
necessary infrastructure has been confined to the core code. Aside of that
it's really complex to make these callbacks implemented according to spec
as the alarm timer implementation demonstrates. If at all then a nanosleep
callback might be a reasonable extension. For now keep just what ptp_clock
needs.
 
> Here is the result of a study of a prototype alarm method.  It shows
> why the hrtimer method is better.
> 
>https://sourceforge.net/p/linuxptp/mailman/message/35535965/

That test was with a PCIe card.  With a SoC that has a PHC as a built
in peripheral, the hardware solution might outperform hrtimers.

So you might consider adding clock_nanosleep() for dynamic posix
clocks.  But your code will have to support multiple users at the same
time.

Thanks,
Richard

Re: [EXT] Re: [PATCH v1] timer:clock:ptp: add support the dynamic posix clock alarm set for ptp

[Richard Cochran]

On Wed, May 08, 2019 at 03:30:01AM +, Po Liu wrote:
> > Sorry, NAK, since we decided some time ago not to support timer_* operations
> > on dynamic clocks.  You get much better application level timer performance
> > by synchronizing CLOCK_REALTIME to your PHC and using clock_nanosleep()
> > with CLOCK_REALTIME or CLOCK_MONOTONIC.
> 
> The code intend to get alarm by interrupt of ptp hardware. The code
> to fix ptp not support to application layer to get the alarm
> interrupt.  Do you mean the synchronizing at application layer by
> PHC (using clock_nanosleep()) to the CLOCK_REALTIME source? Then the
> kernel could using the hrtimer with CLOCK_REALTIME?

Yes, or with CLOCK_MONOTONIC.

> > > This won't change the user space system call code. Normally the user
> > > space set alarm by timer_create() and timer_settime(). Reference code
> > > are tools/testing/selftests/ptp/testptp.c.
> > 
> > That program still has misleading examples.  Sorry about that.  I'll submit 
> > a
> > patch to remove them.
> 
> Is there any replace method for an application code to get alarm interrupt by 
> the ptp source?

No the alarm functionality has been removed.  It will not be coming
back, unless there are really strong arguments to support it.

Here is the result of a study of a prototype alarm method.  It shows
why the hrtimer method is better.

   https://sourceforge.net/p/linuxptp/mailman/message/35535965/

Thanks,
Richard

Re: [PATCH v1] timer:clock:ptp: add support the dynamic posix clock alarm set for ptp

[Richard Cochran]

On Sun, May 05, 2019 at 05:02:05AM +, Po Liu wrote:
> Current kernel code do not support the dynamic posix clock alarm set.
> This code would support it by the posix timer structure.
> 
> 319  const struct k_clock clock_posix_dynamic = {
> 
> 320 .clock_getres   = pc_clock_getres,
> 321 .clock_set  = pc_clock_settime,
> 322 .clock_get  = pc_clock_gettime,
> 323 .clock_adj  = pc_clock_adjtime,
> 324 +   .timer_create   = pc_timer_create,
> 325 +   .timer_del  = pc_timer_delete,
> 326 +   .timer_set  = pc_timer_set,
> 327 +   .timer_arm  = pc_timer_arm,
> }
> 

Sorry, NAK, since we decided some time ago not to support timer_*
operations on dynamic clocks.  You get much better application level
timer performance by synchronizing CLOCK_REALTIME to your PHC and
using clock_nanosleep() with CLOCK_REALTIME or CLOCK_MONOTONIC.

> This won't change the user space system call code. Normally the user
> space set alarm by timer_create() and timer_settime(). Reference code
> are tools/testing/selftests/ptp/testptp.c.

That program still has misleading examples.  Sorry about that.  I'll
submit a patch to remove them.

> +static int pc_timer_create(struct k_itimer *new_timer)
> +{
> + return 0;
> +}
> +

This of course would never work.  Consider what happens when two or
more timers are created and armed.

Thanks,
Richard

Re: [PATCH 3/3] ptp_qoriq: convert to use module parameters for initialization

[Richard Cochran]

On Wed, Aug 01, 2018 at 04:36:40AM +, Y.b. Lu wrote:

> Could I add a function to calculate a set of default register values
> to initialize ptp timer when dts method failed to get required
> properties in driver?

Yes, it would be ideal if the driver can pick correct values
automatically.

However, the frequency on the FIPER outputs can't be configured
automatically, and we don't have an API for the user to choose this.

> I think this will be useful. The ptp timer on new platforms (you may
> see two dts patches in this patchset. Many platforms will be
> affected.) will work without these dts properties. If user want
> specific setting, they can set dts properties.

Sure.

Thanks,
Richard

Re: [PATCH 3/3] ptp_qoriq: convert to use module parameters for initialization

[Richard Cochran]

On Mon, Jul 30, 2018 at 06:01:54PM +0800, Yangbo Lu wrote:
> The ptp_qoriq driver initialized the 1588 timer with the
> configurations provided by the properties of device tree
> node. For example,
> 
>   fsl,tclk-period = <5>;
>   fsl,tmr-prsc= <2>;
>   fsl,tmr-add = <0xaaab>;
>   fsl,tmr-fiper1  = <5>;
>   fsl,tmr-fiper2  = <0>;
>   fsl,max-adj = <4>;
> 
> These things actually were runtime configurations which
> were not proper to be put into dts.

That is debatable.  While I agree that the dts isn't ideal for these,
still it is the lesser of two or more evils.

> This patch is to convert
> to use module parameters for 1588 timer initialization, and
> to support initial register values calculation.

It is hard for me to understand how using module parameters improves
the situation.

> If the parameters are not provided, the driver will calculate
> register values with a set of default parameters. With this
> patch, those dts properties are no longer needed for new
> platform to support 1588 timer, and many QorIQ DPAA platforms
> (some P series and T series platforms of PowerPC, and some
> LS series platforms of ARM64) could use this driver for their
> fman ptp timer with default module parameters. However, this
> patch didn't remove the dts method. Because there were still
> many old platforms using the dts method. We need to clean up
> their dts files, verify module parameters on them, and convert
> them to the new method gradually in case of breaking any
> function.

In addition, like it or not, because the dts is an ABI, you must
continue support of the dts values as a legacy option.

Thanks,
Richard

Re: [v3, 00/10] Support DPAA PTP clock and timestamping

[Richard Cochran]

On Thu, Jun 07, 2018 at 05:20:40PM +0800, Yangbo Lu wrote:
> This patchset is to support DPAA FMAN PTP clock and HW timestamping.
> It had been verified on both ARM platform and PPC platform.
> - The patch #1 to patch #5 are to support DPAA FMAN 1588 timer in
>   ptp_qoriq driver.
> - The patch #6 to patch #10 are to add HW timestamping support in
>   DPAA ethernet driver.

Right now, net-next is closed for new stuff.  You will have to post
the series again after the merge window closes.  You can check the
status here:

http://vger.kernel.org/~davem/net-next.html

When you do re-post, you can add my:

Acked-by: Richard Cochran 

Re: [PATCH 09/10] dpaa_eth: add support for hardware timestamping

[Richard Cochran]

On Tue, Jun 05, 2018 at 03:35:28AM +, Y.b. Lu wrote:
> [Y.b. Lu] Actually these timestamping codes affected DPAA networking 
> performance in our previous performance test.
> That's why we used ifdef for it.

How much does time stamping hurt performance?

If the time stamping is compiled in but not enabled at run time, does
it still affect performace?

Thanks,
Richard

Re: [PATCH 09/10] dpaa_eth: add support for hardware timestamping

[Richard Cochran]

On Mon, Jun 04, 2018 at 03:08:36PM +0800, Yangbo Lu wrote:

> +if FSL_DPAA_ETH
> +config FSL_DPAA_ETH_TS
> + bool "DPAA hardware timestamping support"
> + select PTP_1588_CLOCK_QORIQ
> + default n
> + help
> +   Enable DPAA hardware timestamping support.
> +   This option is useful for applications to get
> +   hardware time stamps on the Ethernet packets
> +   using the SO_TIMESTAMPING API.
> +endif

You should drop this #ifdef.  In general, if a MAC supports time
stamping and PHC, then the driver support should simply be compiled
in.

[ When time stamping incurs a large run time performance penalty to
  non-PTP users, then it might make sense to have a Kconfig option to
  disable it, but that doesn't appear to be the case here. ]

> @@ -1615,6 +1635,24 @@ static int dpaa_eth_refill_bpools(struct dpaa_priv 
> *priv)
>   skbh = (struct sk_buff **)phys_to_virt(addr);
>   skb = *skbh;
>  
> +#ifdef CONFIG_FSL_DPAA_ETH_TS
> + if (priv->tx_tstamp &&
> + skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {

This condition fits on one line easily.

> + struct skb_shared_hwtstamps shhwtstamps;
> + u64 ns;

Local variables belong at the top of the function.

> + memset(, 0, sizeof(shhwtstamps));
> +
> + if (!dpaa_get_tstamp_ns(priv->net_dev, ,
> + priv->mac_dev->port[TX],
> + (void *)skbh)) {
> + shhwtstamps.hwtstamp = ns_to_ktime(ns);
> + skb_tstamp_tx(skb, );
> + } else {
> + dev_warn(dev, "dpaa_get_tstamp_ns failed!\n");
> + }
> + }
> +#endif
>   if (unlikely(qm_fd_get_format(fd) == qm_fd_sg)) {
>   nr_frags = skb_shinfo(skb)->nr_frags;
>   dma_unmap_single(dev, addr, qm_fd_get_offset(fd) +
> @@ -2086,6 +2124,14 @@ static int dpaa_start_xmit(struct sk_buff *skb, struct 
> net_device *net_dev)
>   if (unlikely(err < 0))
>   goto skb_to_fd_failed;
>  
> +#ifdef CONFIG_FSL_DPAA_ETH_TS
> + if (priv->tx_tstamp &&
> + skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {

One line please.

> + fd.cmd |= FM_FD_CMD_UPD;
> + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
> + }
> +#endif
> +
>   if (likely(dpaa_xmit(priv, percpu_stats, queue_mapping, ) == 0))
>   return NETDEV_TX_OK;
>  

Thanks,
Richard

Re: [Y2038] [PATCH 04/11] posix timers:Introduce the 64bit methods with timespec64 type for k_clock structure

[Richard Cochran]

On Wed, Apr 22, 2015 at 03:50:45PM +0200, Arnd Bergmann wrote:
 time, stime, gettimeofday, settimeofday, adjtimex, nanosleep,
 getitimer, setitimer:
  all deprecated = wontfix

If adjtimex is deprecated, what will replace it?  It is really
important for ntp.

Thanks,
Richard

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Re: [Y2038] [PATCH 04/11] posix timers:Introduce the 64bit methods with timespec64 type for k_clock structure

[Richard Cochran]

On Wed, Apr 22, 2015 at 10:45:23AM +0200, Thomas Gleixner wrote:
 So we could save one translation step if we implement new syscalls
 which have a scalar nsec interface instead of the timespec/timeval
 cruft and let user space do the translation to whatever it wants.

+1

 I personally would welcome such an interface as it makes user space
 programming simpler. Just (re)arming a periodic nanosleep based on
 absolute expiry time is horrible stupid today:

Jup.

 Thoughts?

Current user space example: The linuxptp programs are doing ns64 to
timespec conversions to call into the kernel, which then does timespec
to ns64 to talk to the hardware.  I would bet that most (all?) use
cases are better served with 64 bit nanosecond system calls.

Thanks,
Richard
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Re: [PATCH 11/11] k_clock:Remove the 32bit methods with timespec type

[Richard Cochran]

On Mon, Apr 20, 2015 at 01:57:39PM +0800, Baolin Wang wrote:

 @@ -911,18 +907,14 @@ retry:
   return -EINVAL;
  
   kc = clockid_to_kclock(timr-it_clock);
 - if (WARN_ON_ONCE(!kc || (!kc-timer_set  !kc-timer_set64))) {
 + if (WARN_ON_ONCE(!kc || !kc-timer_set64)) {
   error = -EINVAL;
   } else {
 - if (kc-timer_set64) {
 - new_spec64 = itimerspec_to_itimerspec64(new_spec);
 - error = kc-timer_set64(timr, flags, new_spec64,
 - old_spec64);
 - if (old_setting)
 - old_spec = 
 itimerspec64_to_itimerspec(old_spec64);
 - } else {
 - error = kc-timer_set(timr, flags, new_spec, rtn);
 - }
 + new_spec64 = itimerspec_to_itimerspec64(new_spec);
 + error = kc-timer_set64(timr, flags, new_spec64,
 + old_spec64);

This statement can fit on one line.

 + if (old_setting)
 + old_spec = itimerspec64_to_itimerspec(old_spec64);
   }
  
   unlock_timer(timr, flag);

 @@ -1057,14 +1045,13 @@ SYSCALL_DEFINE2(clock_gettime, const clockid_t, 
 which_clock,
   if (!kc)
   return -EINVAL;
  
 - if (kc-clock_get64) {
 - error = kc-clock_get64(which_clock, kernel_tp64);
 - kernel_tp = timespec64_to_timespec(kernel_tp64);
 - } else {
 - error = kc-clock_get(which_clock, kernel_tp);
 - }
 + error = kc-clock_get64(which_clock, kernel_tp64);
 + if (!error)
 + return error;

Wrong test, should be: if (error) ...

 +
 + kernel_tp = timespec64_to_timespec(kernel_tp64);
  
 - if (!error  copy_to_user(tp, kernel_tp, sizeof (kernel_tp)))

The (!error  ...) was correct here!

 + if (copy_to_user(tp, kernel_tp, sizeof (kernel_tp)))
   error = -EFAULT;
  
   return error;

You can simplify this like so:

return copy_to_user(tp, kernel_tp, sizeof(kernel_tp)) ? -EFAULT : 0;

 @@ -1104,14 +1091,13 @@ SYSCALL_DEFINE2(clock_getres, const clockid_t, 
 which_clock,
   if (!kc)
   return -EINVAL;
  
 - if (kc-clock_getres64) {
 - error = kc-clock_getres64(which_clock, rtn_tp64);
 - rtn_tp = timespec64_to_timespec(rtn_tp64);
 - } else {
 - error = kc-clock_getres(which_clock, rtn_tp);
 - }
 + error = kc-clock_getres64(which_clock, rtn_tp64);
 + if (!error)
 + return error;

Also wrong.

 +
 + rtn_tp = timespec64_to_timespec(rtn_tp64);
  
 - if (!error  tp  copy_to_user(tp, rtn_tp, sizeof (rtn_tp)))
 + if (tp  copy_to_user(tp, rtn_tp, sizeof (rtn_tp)))
   error = -EFAULT;
  
   return error;
 -- 
 1.7.9.5
 

Thanks,
Richard
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Re: [PATCH V3] tick/broadcast: Make movement of broadcast hrtimer robust against hotplug

[Richard Cochran]

On Wed, Jan 28, 2015 at 03:32:58PM +0530, Preeti U Murthy wrote:
 Thomas ping. Would you be posting this patch?

FYI, Thomas is temporarily out of action, in bed with the flu.

Thanks,
Richard
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Re: [PATCH v2] powerpc/83xx: gianfar_ptp: select 1588 clock source through dts file

[Richard Cochran]

On Wed, Sep 25, 2013 at 11:24:23AM +0400, Aida Mynzhasova wrote:
 Currently IEEE 1588 timer reference clock source is determined through
 hard-coded value in gianfar_ptp driver. This patch allows to select ptp
 clock source by means of device tree file node.

Looks okay to me now.

Acked-by: Richard Cochran richardcoch...@gmail.com
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Re: [PATCH] powerpc/83xx: gianfar_ptp: select 1588 clock source through dts file

[Richard Cochran]

On Tue, Sep 24, 2013 at 11:39:57AM +0400, Aida Mynzhasova wrote:
 Currently IEEE 1588 timer reference clock source is determined through
 hard-coded value in gianfar_ptp driver. This patch allows to select ptp
 clock source by means of device tree file node.
 
 For instance:
 
   fsl,cksel = 0;
 
 for using external (TSEC_TMR_CLK input) high precision timer
 reference clock.
 
 Other acceptable values:
 
   1 : eTSEC system clock
   2 : eTSEC1 transmit clock
   3 : RTC clock input

I think it would be useful to have this table in the binding document
as well.

Thanks,
Richard
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Re: [PATCH] gianfar: add missing include

[Richard Cochran]

On Tue, Apr 10, 2012 at 02:18:47PM +1000, Michael Neuling wrote:
 This is because of a missing include file from:
   6663628 gianfar: Support the get_ts_info ethtool method.
 
 Signed-off-by: Michael Neuling mi...@neuling.org

I did a poor job testing the non-x86 stuff in this series.  Thanks for
the fix.

Acked-by: Richard Cochran richardcoch...@gmail.com

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Re: [git pull] Please pull powerpc.git merge branch

[Richard Cochran]

On Thu, May 19, 2011 at 02:06:18PM +1000, Benjamin Herrenschmidt wrote:
 are available in the git repository at:
 
   git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge

When I try to build 'next' (now at 208b3a4c), it does not compile due
to a change from the following commit.

 Benjamin Herrenschmidt (1):
   powerpc/smp: Make start_secondary_resume available to all CPU variants

I would appreciate your help in getting this fixed...

Thanks,
Richard

PS the error looks like this:

  AS  arch/powerpc/kernel/misc_32.o
arch/powerpc/kernel/misc_32.S: Assembler messages:
arch/powerpc/kernel/misc_32.S:703: Error: Unrecognized opcode: `std'
make[2]: *** [arch/powerpc/kernel/misc_32.o] Error 1
make[1]: *** [arch/powerpc/kernel] Error 2

 ${CROSS_COMPILE}gcc -v
Using built-in specs.
Target: powerpc-none-linux-gnuspe
Configured with: ../gcc-4.3.2/configure --target=powerpc-none-linux-gnuspe 
--host=i686-pc-linux-gnu 
--prefix=/opt/freescale/usr/local/gcc-4.3.74-eglibc-2.8.74-dp-2/powerpc-none-linux-gnuspe
 
--with-sysroot=/opt/freescale/usr/local/gcc-4.3.74-eglibc-2.8.74-dp-2/powerpc-none-linux-gnuspe/powerpc-none-linux-gnuspe/libc
 --disable-libssp --disable-libmudflap --disable-libstdcxx-pch --enable-libgomp 
--enable-shared --enable-threads --enable-languages=c,c++ 
--with-gmp=/usr/src/redhat/BUILD/csl-tc-4.3.74/host-libs/usr 
--with-mpfr=/usr/src/redhat/BUILD/csl-tc-4.3.74/host-libs/usr --with-cpu=8548 
--with-gnu-as --with-gnu-ld --enable-symvers=gnu --enable-__cxa_atexit 
--enable-cxx-flags=-mcpu=8548 --disable-multilib --with-long-double-128 
--disable-nls --enable-e500_double
Thread model: posix
gcc version 4.3.2 (GCC) 
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Re: [git pull] Please pull powerpc.git merge branch

[Richard Cochran]

On Fri, May 20, 2011 at 09:58:45AM -0400, Josh Boyer wrote:
 On Fri, May 20, 2011 at 03:23:29PM +0200, Richard Cochran wrote:
 When I try to build 'next' (now at 208b3a4c), it does not compile due
 to a change from the following commit.
 
  Benjamin Herrenschmidt (1):
powerpc/smp: Make start_secondary_resume available to all CPU 
  variants
 
 I would appreciate your help in getting this fixed...
 
 Could you try the patch below?

Yes, and it both compiles and boots.

Thanks,
Richard

 
 Commit 69e3cea8d5fd526 introduced start_secondary_resume to misc_32.S,
 however it uses a 64-bit instruction which is not valid on 32-bit
 platforms.  Use 'stw' instead.
 
 Reported-by: Richard Cochran richardcoch...@gmail.com
 Signed-off-by: Josh Boyer jwbo...@linux.vnet.ibm.com
 
 ---
 
 diff --git a/arch/powerpc/kernel/misc_32.S
 b/arch/powerpc/kernel/misc_32.S
 index 402560e..998a100 100644
 --- a/arch/powerpc/kernel/misc_32.S
 +++ b/arch/powerpc/kernel/misc_32.S
 @@ -700,7 +700,7 @@ _GLOBAL(start_secondary_resume)
   rlwinm  r1,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() */
   addir1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
   li  r3,0
 - std r3,0(r1)/* Zero the stack frame pointer */
 + stw r3,0(r1)/* Zero the stack frame pointer */
   bl  start_secondary
   b   .
  #endif /* CONFIG_SMP */
 
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Re: powerpc: mpc85xx regression since 2.6.39-rc2, one cpu core lame

[Richard Cochran]

On Wed, May 18, 2011 at 07:40:16AM +1000, Benjamin Herrenschmidt wrote:
 On Tue, 2011-05-17 at 18:28 +0200, Richard Cochran wrote:
  Ben,
  
  Recent 2.6.39-rc kernels behave strangely on the Freescale dual core
  mpc8572 and p2020. There is a long pause (like 2 seconds) in the boot
  sequence after mpic: requesting IPIs...
  
  When the system comes up, only one core shows in /proc/cpuinfo. Later
  on, lots of messages appear like the following:
  
 INFO: task ksoftirqd/1:9 blocked for more than 120 seconds.
  
  I bisected [1] the problem to:
  
 commit c56e58537d504706954a06570b4034c04e5b7500
 Author: Benjamin Herrenschmidt b...@kernel.crashing.org
 Date:   Tue Mar 8 14:40:04 2011 +1100
  
 powerpc/smp: Create idle threads on demand and properly reset them
  
  I don't see from that commit what had gone wrong. Perhaps you can
  help resolve this?
 
 Hrm, odd. Kumar, care to have a look ? That's what happens when you
 don't get me HW to test with :-)

(I get the feeling that I am the only one testing recent kernels with
the mpc85xx.)

Anyhow, I see that this commit was one of a series. For my own use,
can I simply revert this one commit independently?

Thanks,
Richard
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powerpc: mpc85xx regression since 2.6.39-rc2, one cpu core lame

[Richard Cochran]

Ben,

Recent 2.6.39-rc kernels behave strangely on the Freescale dual core
mpc8572 and p2020. There is a long pause (like 2 seconds) in the boot
sequence after mpic: requesting IPIs...

When the system comes up, only one core shows in /proc/cpuinfo. Later
on, lots of messages appear like the following:

   INFO: task ksoftirqd/1:9 blocked for more than 120 seconds.

I bisected [1] the problem to:

   commit c56e58537d504706954a06570b4034c04e5b7500
   Author: Benjamin Herrenschmidt b...@kernel.crashing.org
   Date:   Tue Mar 8 14:40:04 2011 +1100

   powerpc/smp: Create idle threads on demand and properly reset them

I don't see from that commit what had gone wrong. Perhaps you can
help resolve this?

Thanks,
Richard


1. I had to patch commit e5462d16 by hand when bisecting, which is a
   fixup for commit fa3f82c8 and not yet merged in c56e5853.
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Re: [PATCH V14 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

On Mon, Apr 18, 2011 at 09:57:25PM +0100, Ben Hutchings wrote:
 Would be better without the magic numbers.

Yes, of course, you are right, and also about patch #3.
Please take a look at v15 and see if it improves things.

Thanks,

Richard
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[PATCH V15 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

Here is V15 of the PHC patch series. I had been a bit lazy in adding
the acks that have accumulated since V13, and so now I have added them
into the commit message, unless the particular patch changed
substantially since the ack.

* Introduction

  The aim of this patch set is to add support for PTP Hardware Clocks
  (PHCs) into the Linux kernel. The patch series builds upon the
  dynamic posix clock work appearing in kernel version 2.6.39.

  Support for obtaining timestamps from a PHC already exists via the
  SO_TIMESTAMPING socket option, integrated in kernel version 2.6.30.
  This patch set completes the picture by allow user space programs to
  adjust the PHC and to control its ancillary features.

* Patches for ptpd on sf.net
  https://sourceforge.net/tracker/?group_id=139814atid=744634
  3225599 [PATCH 1/3] Convert to POSIX clock API.
  3225603 [PATCH 2/3] Adapted to use the Linux PTP Hardware Clock API. 
  3225607 [PATCH 3/3] Adapted to use the newer SO_TIMESTAMPING Linux API.

* PHC Patch ChangeLog
** v15
*** general
- allow test program to set system time from PTP HW clock
*** ixp46x and phyter packet matching
- check packet bounds
- handle variable ipv4 header length
- replace magic numbers with macros

* Why all the CCs?
  - One driver is for PowerPC, and adds device tree stuff.
  - One driver is for the ARM Xscale IXP465.

* Previous Discussions
  - [V14] http://lkml.org/lkml/2011/4/18/16
  - [V13] http://lkml.org/lkml/2011/3/27/2
  - [V12] http://lkml.org/lkml/2011/2/28/53
  - [V11] http://lkml.org/lkml/2011/2/23/107
  - [V10] http://lkml.org/lkml/2011/1/27/71
  - [V9]  http://lkml.org/lkml/2011/1/13/65
  - [V8]  http://lkml.org/lkml/2010/12/31/128
  - [V7]  http://lkml.org/lkml/2010/12/16/195
  - [V6]  http://lkml.org/lkml/2010/9/23/310
  - [V5]  http://lkml.org/lkml/2010/8/16/90
  - Thomas Gleixner: Rework of the PTP support series core code
http://lkml.org/lkml/2011/2/1/137
  - Dynamic clock devices [RFC]
http://lkml.org/lkml/2010/11/4/290
  - POSIX clock tuning syscall with dynamic clock ids
http://lkml.org/lkml/2010/9/3/119
  - POSIX clock tuning syscall with static clock ids
http://lkml.org/lkml/2010/8/23/49
  - Versions 1-4 appeared on the netdev list.


Richard Cochran (4):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp|   98 ++
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 +
 Documentation/ptp/ptp.txt  |   89 ++
 Documentation/ptp/testptp.c|  381 +++
 Documentation/ptp/testptp.mk   |   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h  |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/net/Makefile   |1 +
 drivers/net/arm/ixp4xx_eth.c   |  195 -
 drivers/net/gianfar_ptp.c  |  588 +++
 drivers/net/phy/Makefile   |1 +
 drivers/net/phy/dp83640.c  | 1100 
 drivers/net/phy/dp83640_reg.h  |  267 +
 drivers/ptp/Kconfig|   75 ++
 drivers/ptp/Makefile   |7 +
 drivers/ptp/ptp_chardev.c  |  159 +++
 drivers/ptp/ptp_clock.c|  343 ++
 drivers/ptp/ptp_ixp46x.c   |  332 ++
 drivers/ptp/ptp_private.h  |   92 ++
 drivers/ptp/ptp_sysfs.c|  230 
 include/linux/Kbuild   |1 +
 include/linux/ptp_classify.h   |7 +
 include/linux/ptp_clock.h  |   84 ++
 include/linux/ptp_clock_kernel.h   |  139 +++
 29 files changed, 4406 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp

[PATCH V15 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: David S. Miller da...@davemloft.net
---
 Documentation/ABI/testing/sysfs-ptp |   98 +
 Documentation/ptp/ptp.txt   |   89 
 Documentation/ptp/testptp.c |  381 +++
 Documentation/ptp/testptp.mk|   33 +++
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   30 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  159 +++
 drivers/ptp/ptp_clock.c |  343 +++
 drivers/ptp/ptp_private.h   |   92 +
 drivers/ptp/ptp_sysfs.c |  230 +
 include/linux/Kbuild|1 +
 include/linux/ptp_classify.h|7 +
 include/linux/ptp_clock.h   |   84 
 include/linux/ptp_clock_kernel.h|  139 +
 16 files changed, 1695 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..d40d2b5
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,98 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported.
+
+What:  /sys/class/ptp/ptpN/extts_enable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This write-only file enables or disables external
+   timestamps. To enable external timestamps, write the
+   channel index followed by a 1

[PATCH V15 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: David S. Miller da...@davemloft.net
Acked-by: John Stultz john.stu...@linaro.org
---
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/net/Makefile   |1 +
 drivers/net/gianfar_ptp.c  |  588 
 drivers/ptp/Kconfig|   13 +
 8 files changed, 708 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c

diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt 
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index edb7ae1..2c6be03 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -74,3 +74,57 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - fsl,tclk-period  Timer reference clock period in nanoseconds.
+  - fsl,tmr-prsc Prescaler, divides the output clock.
+  - fsl,tmr-add  Frequency compensation value.
+  - fsl,tmr-fiper1   Fixed interval period pulse generator.
+  - fsl,tmr-fiper2   Fixed interval period pulse generator.
+  - fsl,max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..502e17c 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,19 @@
sleep = pmc 0x0030;
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
+
enet0: ethernet@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..f6c04d2 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,19 @@
};
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 68 2 69 2 70 2 71 2

[PATCH V15 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: David S. Miller da...@davemloft.net
Acked-by: John Stultz john.stu...@linaro.org
Acked-by: Krzysztof Halasa k...@pm.waw.pl
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  195 ++-
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  332 +
 5 files changed, 616 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..292d55e
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 ch_control;  /* 0x40 Time Synchronization Channel Control */
+   u32 ch_event;/* 0x44 Time Synchronization Channel Event */
+   u32 tx_snap_lo;  /* 0x48 Transmit Snapshot Low Register */
+   u32 tx_snap_hi;  /* 0x4C Transmit Snapshot High Register */
+   u32 rx_snap_lo;  /* 0x50 Receive Snapshot Low Register */
+   u32 rx_snap_hi;  /* 0x54 Receive Snapshot High Register */
+   u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
+   u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 control; /* 0x00 Time Sync Control Register */
+   u32 event;   /* 0x04 Time Sync Event Register */
+   u32 addend;  /* 0x08 Time Sync Addend Register */
+   u32 accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 test;/* 0x10 Time Sync Test Register */
+   u32 unused;  /* 0x14 */
+   u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
+   u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
+   u32 systime_lo;  /* 0x20 SystemTime_Low Register */
+   u32 systime_hi;  /* 0x24 SystemTime_High Register */
+   u32 trgt_lo; /* 0x28 TargetTime_Low Register */
+   u32 trgt_hi; /* 0x2C TargetTime_High Register */
+   u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9eb9b98..de51e84 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,10 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)NPE_ID(p-id)
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN

[PATCH V15 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c | 1100 +
 drivers/net/phy/dp83640_reg.h |  267 ++
 drivers/ptp/Kconfig   |   19 +
 4 files changed, 1387 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..d463b8a
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,1100 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+#define CAL_EVENT  2
+#define CAL_GPIO   9
+#define CAL_TRIGGER2
+
+/* phyter seems to miss the mark by 16 ns */
+#define ADJTIME_FIX16
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+};
+
+struct rxts {
+   struct list_head list;
+   unsigned long tmo;
+   u64 ns;
+   u16 seqid;
+   u8  msgtype;
+   u16 hash;
+};
+
+struct dp83640_clock;
+
+struct dp83640_private {
+   struct list_head list;
+   struct dp83640_clock *clock;
+   struct phy_device *phydev;
+   struct work_struct ts_work;
+   int hwts_tx_en;
+   int hwts_rx_en;
+   int layer;
+   int version;
+   /* remember state of cfg0 during calibration */
+   int cfg0;
+   /* remember the last event time stamp */
+   struct phy_txts edata;
+   /* list of rx timestamps */
+   struct list_head rxts;
+   struct list_head rxpool;
+   struct rxts rx_pool_data[MAX_RXTS];
+   /* protects above three fields from concurrent access */
+   spinlock_t rx_lock;
+   /* queues of incoming and outgoing packets */
+   struct sk_buff_head rx_queue;
+   struct sk_buff_head tx_queue;
+};
+
+struct dp83640_clock {
+   /* keeps the instance in the 'phyter_clocks' list */
+   struct list_head list;
+   /* we create one clock instance per MII bus */
+   struct mii_bus *bus;
+   /* protects extended registers from concurrent access */
+   struct mutex extreg_lock;
+   /* remembers which page was last selected */
+   int page;
+   /* our advertised

[PATCH V14 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

* Introduction

  The aim of this patch set is to add support for PTP Hardware Clocks
  (PHCs) into the Linux kernel. The patch series builds upon the
  dynamic posix clock work appearing in kernel version 2.6.39.

  Support for obtaining timestamps from a PHC already exists via the
  SO_TIMESTAMPING socket option, integrated in kernel version 2.6.30.
  This patch set completes the picture by allow user space programs to
  adjust the PHC and to control its ancillary features.

* Patches for ptpd on sf.net
  https://sourceforge.net/tracker/?group_id=139814atid=744634
  3225599 [PATCH 1/3] Convert to POSIX clock API.
  3225603 [PATCH 2/3] Adapted to use the Linux PTP Hardware Clock API. 
  3225607 [PATCH 3/3] Adapted to use the newer SO_TIMESTAMPING Linux API.

* PHC Patch ChangeLog
** v14
*** general
- fixed unregister method to allow a clean module removal
- blocked fifo readers no longer prohibit module removal
- export skb_clone_tx_timestamp for module use
*** phyter
- allow mutiple clock/mdio bus instances
- fix endian bug in packet matching code for LE host
- fix module related null pointer dereference
- warn rather than BUG when MAC driver is missing

* Why all the CCs?
  - One driver is for PowerPC, and adds device tree stuff.
  - One driver is for the ARM Xscale IXP465.

* Previous Discussions
  - [V13] http://lkml.org/lkml/2011/3/27/2
  - [V12] http://lkml.org/lkml/2011/2/28/53
  - [V11] http://lkml.org/lkml/2011/2/23/107
  - [V10] http://lkml.org/lkml/2011/1/27/71
  - [V9]  http://lkml.org/lkml/2011/1/13/65
  - [V8]  http://lkml.org/lkml/2010/12/31/128
  - [V7]  http://lkml.org/lkml/2010/12/16/195
  - [V6]  http://lkml.org/lkml/2010/9/23/310
  - [V5]  http://lkml.org/lkml/2010/8/16/90
  - Thomas Gleixner: Rework of the PTP support series core code
http://lkml.org/lkml/2011/2/1/137
  - Dynamic clock devices [RFC]
http://lkml.org/lkml/2010/11/4/290
  - POSIX clock tuning syscall with dynamic clock ids
http://lkml.org/lkml/2010/9/3/119
  - POSIX clock tuning syscall with static clock ids
http://lkml.org/lkml/2010/8/23/49
  - Versions 1-4 appeared on the netdev list.


Richard Cochran (4):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp|   98 ++
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 +
 Documentation/ptp/ptp.txt  |   89 ++
 Documentation/ptp/testptp.c|  368 +++
 Documentation/ptp/testptp.mk   |   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h  |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/net/Makefile   |1 +
 drivers/net/arm/ixp4xx_eth.c   |  192 -
 drivers/net/gianfar_ptp.c  |  588 +++
 drivers/net/phy/Makefile   |1 +
 drivers/net/phy/dp83640.c  | 1100 
 drivers/net/phy/dp83640_reg.h  |  267 +
 drivers/ptp/Kconfig|   75 ++
 drivers/ptp/Makefile   |7 +
 drivers/ptp/ptp_chardev.c  |  159 +++
 drivers/ptp/ptp_clock.c|  343 ++
 drivers/ptp/ptp_ixp46x.c   |  332 ++
 drivers/ptp/ptp_private.h  |   92 ++
 drivers/ptp/ptp_sysfs.c|  230 
 include/linux/Kbuild   |1 +
 include/linux/ptp_clock.h  |   84 ++
 include/linux/ptp_clock_kernel.h   |  139 +++
 28 files changed, 4383 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_ixp46x.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h

[PATCH V14 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-ptp |   98 +
 Documentation/ptp/ptp.txt   |   89 +
 Documentation/ptp/testptp.c |  368 +++
 Documentation/ptp/testptp.mk|   33 +++
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   30 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  159 +++
 drivers/ptp/ptp_clock.c |  343 
 drivers/ptp/ptp_private.h   |   92 +
 drivers/ptp/ptp_sysfs.c |  230 ++
 include/linux/Kbuild|1 +
 include/linux/ptp_clock.h   |   84 
 include/linux/ptp_clock_kernel.h|  139 +
 15 files changed, 1675 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..d40d2b5
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,98 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported.
+
+What:  /sys/class/ptp/ptpN/extts_enable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This write-only file enables or disables external
+   timestamps. To enable external timestamps, write the
+   channel index followed by a 1 into the file.
+   To disable external timestamps, write the channel
+   index followed by a 0 into the file

[PATCH V14 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz john.stu...@linaro.org
---
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/net/Makefile   |1 +
 drivers/net/gianfar_ptp.c  |  588 
 drivers/ptp/Kconfig|   13 +
 8 files changed, 708 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c

diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt 
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index edb7ae1..2c6be03 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -74,3 +74,57 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - fsl,tclk-period  Timer reference clock period in nanoseconds.
+  - fsl,tmr-prsc Prescaler, divides the output clock.
+  - fsl,tmr-add  Frequency compensation value.
+  - fsl,tmr-fiper1   Fixed interval period pulse generator.
+  - fsl,tmr-fiper2   Fixed interval period pulse generator.
+  - fsl,max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..502e17c 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,19 @@
sleep = pmc 0x0030;
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
+
enet0: ethernet@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..f6c04d2 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,19 @@
};
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 68 2 69 2 70 2 71 2;
+   interrupt-parent =  mpic

[PATCH V14 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz john.stu...@linaro.org
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  192 ++-
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  332 +
 5 files changed, 613 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..292d55e
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 ch_control;  /* 0x40 Time Synchronization Channel Control */
+   u32 ch_event;/* 0x44 Time Synchronization Channel Event */
+   u32 tx_snap_lo;  /* 0x48 Transmit Snapshot Low Register */
+   u32 tx_snap_hi;  /* 0x4C Transmit Snapshot High Register */
+   u32 rx_snap_lo;  /* 0x50 Receive Snapshot Low Register */
+   u32 rx_snap_hi;  /* 0x54 Receive Snapshot High Register */
+   u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
+   u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 control; /* 0x00 Time Sync Control Register */
+   u32 event;   /* 0x04 Time Sync Event Register */
+   u32 addend;  /* 0x08 Time Sync Addend Register */
+   u32 accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 test;/* 0x10 Time Sync Test Register */
+   u32 unused;  /* 0x14 */
+   u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
+   u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
+   u32 systime_lo;  /* 0x20 SystemTime_Low Register */
+   u32 systime_hi;  /* 0x24 SystemTime_High Register */
+   u32 trgt_lo; /* 0x28 TargetTime_Low Register */
+   u32 trgt_hi; /* 0x2C TargetTime_High Register */
+   u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9eb9b98..c56fcb6 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,10 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)NPE_ID(p-id)
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +178,8 @@ struct port {
int id; /* logical

[PATCH V14 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c | 1100 +
 drivers/net/phy/dp83640_reg.h |  267 ++
 drivers/ptp/Kconfig   |   19 +
 4 files changed, 1387 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..11c7e2d
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,1100 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+#define CAL_EVENT  2
+#define CAL_GPIO   9
+#define CAL_TRIGGER2
+
+/* phyter seems to miss the mark by 16 ns */
+#define ADJTIME_FIX16
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+};
+
+struct rxts {
+   struct list_head list;
+   unsigned long tmo;
+   u64 ns;
+   u16 seqid;
+   u8  msgtype;
+   u16 hash;
+};
+
+struct dp83640_clock;
+
+struct dp83640_private {
+   struct list_head list;
+   struct dp83640_clock *clock;
+   struct phy_device *phydev;
+   struct work_struct ts_work;
+   int hwts_tx_en;
+   int hwts_rx_en;
+   int layer;
+   int version;
+   /* remember state of cfg0 during calibration */
+   int cfg0;
+   /* remember the last event time stamp */
+   struct phy_txts edata;
+   /* list of rx timestamps */
+   struct list_head rxts;
+   struct list_head rxpool;
+   struct rxts rx_pool_data[MAX_RXTS];
+   /* protects above three fields from concurrent access */
+   spinlock_t rx_lock;
+   /* queues of incoming and outgoing packets */
+   struct sk_buff_head rx_queue;
+   struct sk_buff_head tx_queue;
+};
+
+struct dp83640_clock {
+   /* keeps the instance in the 'phyter_clocks' list */
+   struct list_head list;
+   /* we create one clock instance per MII bus */
+   struct mii_bus *bus;
+   /* protects extended registers from concurrent access */
+   struct mutex extreg_lock;
+   /* remembers which page was last selected */
+   int page;
+   /* our advertised

Re: [PATCH V14 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

On Mon, Apr 18, 2011 at 08:56:03AM +0200, Arnd Bergmann wrote:
 On Monday 18 April 2011, Richard Cochran wrote:
  +
  +   lo = __raw_readl(regs-channel[ch].src_uuid_lo);
  +   hi = __raw_readl(regs-channel[ch].src_uuid_hi);
  +
 
 I guess you should use readl(), not __raw_readl() here. The __raw_* functions
 are not meant for device drivers.

Krzysztof had a different opinion about this.

https://lkml.org/lkml/2011/1/8/67

Anyway, it is his driver, and I just followed what he does elsewhere
in the driver. It make sense to me to keep the driver consistent.
Maybe we should make the change throughout?

Thanks,
Richard
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Re: [PATCH V14 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

Also, I forgot to add Krzysztof's ack to the commit message, but he
did ack V12.

Thanks,
Richard
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regression: 2.6.39-rc2,3 compile failure on p2020

[Richard Cochran]

When compiling mpc85xx_smp_defconfig, the kernel fails to link with:

   arch/powerpc/kernel/built-in.o: In function `cpu_die':
   arch/powerpc/kernel/smp.c:702: undefined reference to 
`start_secondary_resume'

I suspect:

  commit fa3f82c8bb7acbe049ea71f258b3ae0a33d9d40b
  powerpc/smp: soft-replugged CPUs must go back to start_secondary

The symbol start_secondary_resume is provided by head_32.S, but it is
not present in head_fsl_booke.S.

I don't now how to fix this and would appreciate any help.

Thanks,

Richard


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regression: 2.6.39-rc2,3 compile failure on p2020 (repost)

[Richard Cochran]

When compiling mpc85xx_smp_defconfig, the kernel fails to link with:

   arch/powerpc/kernel/built-in.o: In function `cpu_die':
   arch/powerpc/kernel/smp.c:702: undefined reference to 
`start_secondary_resume'

I suspect:

  commit fa3f82c8bb7acbe049ea71f258b3ae0a33d9d40b
  powerpc/smp: soft-replugged CPUs must go back to start_secondary

The symbol start_secondary_resume is provided by head_32.S, but it is
not present in head_fsl_booke.S.

I don't now how to fix this and would appreciate any help.

Thanks,

Richard
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[PATCH] powerpc: rename get_irq_desc_data and get_irq_desc_chip

[Richard Cochran]

These two functions disappeared in commit

0c6f8a8b917ad361319c8ace3e9f28e69bfdb4c1
genirq: Remove compat code

but they still exist in qe_ic.h.
This patch renames the function to their new names.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 arch/powerpc/include/asm/qe_ic.h |   16 
 1 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index 9e2cb20..f706164 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int 
priority, int high);
 static inline void qe_ic_cascade_low_ipic(unsigned int irq,
  struct irq_desc *desc)
 {
-   struct qe_ic *qe_ic = get_irq_desc_data(desc);
+   struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
 
if (cascade_irq != NO_IRQ)
@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
 static inline void qe_ic_cascade_high_ipic(unsigned int irq,
   struct irq_desc *desc)
 {
-   struct qe_ic *qe_ic = get_irq_desc_data(desc);
+   struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
 
if (cascade_irq != NO_IRQ)
@@ -101,9 +101,9 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
 static inline void qe_ic_cascade_low_mpic(unsigned int irq,
  struct irq_desc *desc)
 {
-   struct qe_ic *qe_ic = get_irq_desc_data(desc);
+   struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
-   struct irq_chip *chip = get_irq_desc_chip(desc);
+   struct irq_chip *chip = irq_desc_get_chip(desc);
 
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
@@ -114,9 +114,9 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
 static inline void qe_ic_cascade_high_mpic(unsigned int irq,
   struct irq_desc *desc)
 {
-   struct qe_ic *qe_ic = get_irq_desc_data(desc);
+   struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
-   struct irq_chip *chip = get_irq_desc_chip(desc);
+   struct irq_chip *chip = irq_desc_get_chip(desc);
 
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
@@ -127,9 +127,9 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
 static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
struct irq_desc *desc)
 {
-   struct qe_ic *qe_ic = get_irq_desc_data(desc);
+   struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq;
-   struct irq_chip *chip = get_irq_desc_chip(desc);
+   struct irq_chip *chip = irq_desc_get_chip(desc);
 
cascade_irq = qe_ic_get_high_irq(qe_ic);
if (cascade_irq == NO_IRQ)
-- 
1.7.0.4

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[PATCH V13 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

* Introduction

  The aim of this patch set is to add support for PTP Hardware Clocks
  (PHCs) into the Linux kernel. The patch series builds upon the
  dynamic posix clock work appearing in kernel version 2.6.39.

  Support for obtaining timestamps from a PHC already exists via the
  SO_TIMESTAMPING socket option, integrated in kernel version 2.6.30.
  This patch set completes the picture by allow user space programs to
  adjust the PHC and to control its ancillary features.

* Why all the CCs?
  - One driver is for PowerPC, and adds device tree stuff.
  - One driver is for the ARM Xscale IXP465.

* PHC Patch ChangeLog
** v13
*** Incorporate v12 review from Andrew Morton
- external timestamp read: mutex was held unnecessarily long
- external timestamp read: require size to be multiple of sizeof(extts)
- replaced 'uint' with 'unsigned int' in poll function
- replaced empty release function with NULL function pointer
*** Incorporate v12 review from John Stultz
- added comment to explain the ppm to ppb conversion
- commented the locking rules for the queue_cnt() function
- commented the ppb to ppm conversion in the example program
- fixed incomplete locking of external timestamp queue
- gianfar, dp83640: comment on the locking rules
- gianfar: fixed unlikely unprotected register access in probe()
- ixp4xx: gave some private functions more unique names

* Previous Discussions
  - [V12] http://lkml.org/lkml/2011/2/28/53
  - [V11] http://lkml.org/lkml/2011/2/23/107
  - [V10] http://lkml.org/lkml/2011/1/27/71


Richard Cochran (4):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp|   98 ++
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 +
 Documentation/ptp/ptp.txt  |   89 ++
 Documentation/ptp/testptp.c|  368 +++
 Documentation/ptp/testptp.mk   |   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h  |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/net/Makefile   |1 +
 drivers/net/arm/ixp4xx_eth.c   |  192 -
 drivers/net/gianfar_ptp.c  |  588 +++
 drivers/net/phy/Makefile   |1 +
 drivers/net/phy/dp83640.c  | 1015 
 drivers/net/phy/dp83640_reg.h  |  267 +
 drivers/ptp/Kconfig|   75 ++
 drivers/ptp/Makefile   |7 +
 drivers/ptp/ptp_chardev.c  |  155 +++
 drivers/ptp/ptp_clock.c|  339 +++
 drivers/ptp/ptp_ixp46x.c   |  332 +++
 drivers/ptp/ptp_private.h  |   91 ++
 drivers/ptp/ptp_sysfs.c|  230 +
 include/linux/Kbuild   |1 +
 include/linux/ptp_clock.h  |   84 ++
 include/linux/ptp_clock_kernel.h   |  139 +++
 28 files changed, 4289 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_ixp46x.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

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[PATCH V13 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-ptp |   98 +
 Documentation/ptp/ptp.txt   |   89 +
 Documentation/ptp/testptp.c |  368 +++
 Documentation/ptp/testptp.mk|   33 +++
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   30 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  155 +++
 drivers/ptp/ptp_clock.c |  339 
 drivers/ptp/ptp_private.h   |   91 +
 drivers/ptp/ptp_sysfs.c |  230 ++
 include/linux/Kbuild|1 +
 include/linux/ptp_clock.h   |   84 
 include/linux/ptp_clock_kernel.h|  139 +
 15 files changed, 1666 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..d40d2b5
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,98 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported.
+
+What:  /sys/class/ptp/ptpN/extts_enable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This write-only file enables or disables external
+   timestamps. To enable external timestamps, write the
+   channel index followed by a 1 into the file.
+   To disable external timestamps, write the channel
+   index followed by a 0 into the file

[PATCH V13 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/net/Makefile   |1 +
 drivers/net/gianfar_ptp.c  |  588 
 drivers/ptp/Kconfig|   13 +
 8 files changed, 708 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c

diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt 
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index edb7ae1..2c6be03 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -74,3 +74,57 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - fsl,tclk-period  Timer reference clock period in nanoseconds.
+  - fsl,tmr-prsc Prescaler, divides the output clock.
+  - fsl,tmr-add  Frequency compensation value.
+  - fsl,tmr-fiper1   Fixed interval period pulse generator.
+  - fsl,tmr-fiper2   Fixed interval period pulse generator.
+  - fsl,max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..502e17c 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,19 @@
sleep = pmc 0x0030;
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
+
enet0: ethernet@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..f6c04d2 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,19 @@
};
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 68 2 69 2 70 2 71 2;
+   interrupt-parent =  mpic ;
+   fsl,tclk-period = 5

[PATCH V13 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz johns...@us.ibm.com
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  192 ++-
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  332 +
 5 files changed, 613 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..292d55e
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 ch_control;  /* 0x40 Time Synchronization Channel Control */
+   u32 ch_event;/* 0x44 Time Synchronization Channel Event */
+   u32 tx_snap_lo;  /* 0x48 Transmit Snapshot Low Register */
+   u32 tx_snap_hi;  /* 0x4C Transmit Snapshot High Register */
+   u32 rx_snap_lo;  /* 0x50 Receive Snapshot Low Register */
+   u32 rx_snap_hi;  /* 0x54 Receive Snapshot High Register */
+   u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
+   u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 control; /* 0x00 Time Sync Control Register */
+   u32 event;   /* 0x04 Time Sync Event Register */
+   u32 addend;  /* 0x08 Time Sync Addend Register */
+   u32 accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 test;/* 0x10 Time Sync Test Register */
+   u32 unused;  /* 0x14 */
+   u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
+   u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
+   u32 systime_lo;  /* 0x20 SystemTime_Low Register */
+   u32 systime_hi;  /* 0x24 SystemTime_High Register */
+   u32 trgt_lo; /* 0x28 TargetTime_Low Register */
+   u32 trgt_hi; /* 0x2C TargetTime_High Register */
+   u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9eb9b98..c56fcb6 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,10 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)NPE_ID(p-id)
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +178,8 @@ struct port {
int id; /* logical port

[PATCH V13 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c | 1015 +
 drivers/net/phy/dp83640_reg.h |  267 +++
 drivers/ptp/Kconfig   |   19 +
 4 files changed, 1302 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..61d682d
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,1015 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+#define CAL_EVENT  2
+#define CAL_GPIO   9
+#define CAL_TRIGGER2
+
+/* phyter seems to miss the mark by 16 ns */
+#define ADJTIME_FIX16
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+};
+
+struct rxts {
+   struct list_head list;
+   unsigned long tmo;
+   u64 ns;
+   u16 seqid;
+   u8  msgtype;
+   u16 hash;
+};
+
+struct dp83640_clock;
+
+struct dp83640_private {
+   struct list_head list;
+   struct dp83640_clock *clock;
+   struct phy_device *phydev;
+   struct work_struct ts_work;
+   int hwts_tx_en;
+   int hwts_rx_en;
+   int layer;
+   int version;
+   /* remember state of cfg0 during calibration */
+   int cfg0;
+   /* remember the last event time stamp */
+   struct phy_txts edata;
+   /* list of rx timestamps */
+   struct list_head rxts;
+   struct list_head rxpool;
+   struct rxts rx_pool_data[MAX_RXTS];
+   /* protects above three fields from concurrent access */
+   spinlock_t rx_lock;
+   /* queues of incoming and outgoing packets */
+   struct sk_buff_head rx_queue;
+   struct sk_buff_head tx_queue;
+};
+
+struct dp83640_clock {
+   /* protects extended registers from concurrent access */
+   struct mutex extreg_lock;
+   /* remembers which page was last selected */
+   int page;
+   /* our advertised capabilities */
+   struct ptp_clock_info caps;
+   /* the one phyter from which we shall read */
+   struct dp83640_private *chosen;
+   /* list of the other

Re: [PATCH V12 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Wed, Mar 23, 2011 at 02:19:20PM -0700, John Stultz wrote:
 On Mon, 2011-02-28 at 08:57 +0100, Richard Cochran wrote:
  +++ b/drivers/ptp/ptp_clock.c
  @@ -0,0 +1,320 @@
 [snip]
  +static void enqueue_external_timestamp(struct timestamp_event_queue *queue,
  +  struct ptp_clock_event *src)
  +{
  +   struct ptp_extts_event *dst;
  +   unsigned long flags;
  +   u32 remainder;
  +
  +   dst = queue-buf[queue-tail];
 
 Doesn't the lock need to happen before you access the
 queue-buf[queue-tail] ? 
 
 For example: What happens if two cpus enter the function at the same
 time, both get the same tail index, one overwrite the other's data, then
 both take turns bumping up the tail pointer?

Yes, thanks for that catch.

  +struct timestamp_event_queue {
  +   struct ptp_extts_event buf[PTP_MAX_TIMESTAMPS];
  +   int head;
  +   int tail;
  +   spinlock_t lock;
  +};
  +
  +struct ptp_clock {
  +   struct posix_clock clock;
  +   struct device *dev;
  +   struct ptp_clock_info *info;
  +   dev_t devid;
  +   int index; /* index into clocks.map */
  +   struct pps_device *pps_source;
  +   struct timestamp_event_queue tsevq; /* simple fifo for time stamps */
  +   struct mutex tsevq_mux; /* one process at a time reading the fifo */
  +   wait_queue_head_t tsev_wq;
  +};
  +
  +static inline int queue_cnt(struct timestamp_event_queue *q)
  +{
  +   int cnt = q-tail - q-head;
  +   return cnt  0 ? PTP_MAX_TIMESTAMPS + cnt : cnt;
  +}
 
 q-tail and head access probably need to happen only when locked. 
 
 So probably need a comment that queue_cnt must be called only when
 holding the proper lock.

In this case, calling without a lock is allowed. However, I'll add
comment like the following.

 * The function queue_cnt() is safe for readers to call without
 * holding q-lock. Readers use this function to verify that the queue
 * is nonempty before proceeding with a dequeue operation. The fact
 * that a writer might concurrently increment the tail does not
 * matter, since the queue remains nonempty nonetheless.

Thanks for your feedback,

Richard
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Re: [PATCH V12 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Wed, Mar 23, 2011 at 02:30:04PM -0700, John Stultz wrote:
 On Mon, 2011-02-28 at 08:57 +0100, Richard Cochran wrote:
  +/*
  + * Register access functions
  + */
 
 So what are the locking rules on the functions below? I assume the
 etsects-lock needs to be held prior to calling, so that should be made
 explicit in a comment.

Yes, you are right. I'll add comments.

  +   gfar_write(etsects-regs-tmr_ctrl,   tmr_ctrl);
  +   gfar_write(etsects-regs-tmr_add,etsects-tmr_add);
  +   gfar_write(etsects-regs-tmr_prsc,   etsects-tmr_prsc);
  +   gfar_write(etsects-regs-tmr_fiper1, etsects-tmr_fiper1);
  +   gfar_write(etsects-regs-tmr_fiper2, etsects-tmr_fiper2);
  +   set_alarm(etsects);
  +   gfar_write(etsects-regs-tmr_ctrl,   tmr_ctrl|FS|RTPE|TE);
 
 Does any of the above need a lock should an irq land in the middle of
 the writes?

Since these interrupts first must be enabled, I think it unlikely that
an IRQ could occur. However, it can't hurt to add the lock, either.

Thanks,

Richard
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Re: [PATCH V12 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

On Wed, Mar 23, 2011 at 02:46:25PM -0700, John Stultz wrote:
 On Mon, 2011-02-28 at 08:58 +0100, Richard Cochran wrote:
  +static int tdr_write(int bc, struct phy_device *dev,
  +const struct timespec *ts, u16 cmd)
  +{
  +   ext_write(bc, dev, PAGE4, PTP_TDR, ts-tv_nsec  0x);/* ns[15:0]  */
  +   ext_write(bc, dev, PAGE4, PTP_TDR, ts-tv_nsec  16);   /* ns[31:16] */
  +   ext_write(bc, dev, PAGE4, PTP_TDR, ts-tv_sec  0x); /* sec[15:0] */
  +   ext_write(bc, dev, PAGE4, PTP_TDR, ts-tv_sec  16);/* sec[31:16]*/
  +
  +   ext_write(bc, dev, PAGE4, PTP_CTL, cmd);
  +
  +   return 0;
  +}
 
 The above needs to hold the extreg_lock, and should be commented as
 such.

Okay, will do.

 And again, the function names are sort of generic, and could use a
 dp83640_ prefix or something.

So, I will rename the IXP functions in the other driver to make them
more unique, but in this case I really prefer to keep the short names
for the sake of readability.

Just about every operation on this PHY requires four 16-bit writes,
where each write can really mean two writes, with the first one to set
a page register for the following write.

Keeping the tabular style (shown above) makes it much more clear what
is going on, IMHO. If the function names become longer, that would
force line breaks and spoil the nice formatting.

Also, these names are not in use anywhere else in the kernel's eight
million LOC.

Thanks,

Richard
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[PATCH] powerpc: add clock_adjtime for powerpc

[Richard Cochran]

This patch adds the clock_adjtime system call to the powerpc architecture.

The call was introduced in f1f1d5ebd10ffa4242bce7a90a56a222d6b7bc77

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 arch/powerpc/include/asm/systbl.h |1 +
 arch/powerpc/include/asm/unistd.h |3 ++-
 2 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/systbl.h 
b/arch/powerpc/include/asm/systbl.h
index aa0f1eb..6a1152c 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -348,3 +348,4 @@ COMPAT_SYS_SPU(sendmsg)
 COMPAT_SYS_SPU(recvmsg)
 COMPAT_SYS_SPU(recvmmsg)
 SYSCALL_SPU(accept4)
+COMPAT_SYS_SPU(clock_adjtime)
diff --git a/arch/powerpc/include/asm/unistd.h 
b/arch/powerpc/include/asm/unistd.h
index 6151937..386de07 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -367,10 +367,11 @@
 #define __NR_recvmsg   342
 #define __NR_recvmmsg  343
 #define __NR_accept4   344
+#define __NR_clock_adjtime 345
 
 #ifdef __KERNEL__
 
-#define __NR_syscalls  345
+#define __NR_syscalls  346
 
 #define __NR__exit __NR_exit
 #define NR_syscalls__NR_syscalls
-- 
1.7.0.4

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Re: [PATCH] powerpc: add clock_adjtime for powerpc

[Richard Cochran]

On Thu, Mar 24, 2011 at 04:05:17PM +0100, Richard Cochran wrote:
 This patch adds the clock_adjtime system call to the powerpc architecture.

Never mind this patch.

Stephen Rothwell already posted a patch on linuxppc-dev adding this
syscall eariler today.

Thanks,
Richard
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Re: [PATCH V12 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

For all those interested in the user space aspect, I have posted some
patches to ptpd project showing how the API works.

https://sourceforge.net/tracker/?group_id=139814atid=744634

3225599 [PATCH 1/3] Convert to POSIX clock API.
3225603 [PATCH 2/3] Adapted to use the Linux PTP Hardware Clock API.
3225607 [PATCH 3/3] Adapted to use the newer SO_TIMESTAMPING Linux API.

Enjoy,

Richard

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Re: [PATCH V12 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Mon, Feb 28, 2011 at 08:57:03AM +0100, Richard Cochran wrote:
 * PHC Patch ChangeLog
 ** v12
 *** gianfar_ptp
- fixed up device tree
- inlined the header file
- use platform_ calls instead of deprecated of_ calls
- removed static global single instance
- removed John Stultz's ack from this patch

@Thomas and John:

Can I get your acks on the remaining patches?

Can this be merged for 2.6.39?

Thanks,

Richard
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[PATCH V12 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

This really might be the last review of the PTP hardware clock patch
series. These patches apply on top of the timers/core branch in the
tip tree.

* Why all the CCs?
  - One driver is for PowerPC, and adds device tree stuff.
  - One driver is for the ARM Xscale IXP465.

* PHC Patch ChangeLog
** v12
*** gianfar_ptp
   - fixed up device tree
   - inlined the header file
   - use platform_ calls instead of deprecated of_ calls
   - removed static global single instance
   - removed John Stultz's ack from this patch

* Previous Discussions

  - [V11] http://lkml.org/lkml/2011/2/23/107
  - [V10] http://lkml.org/lkml/2011/1/27/71
  - [V9]  http://lkml.org/lkml/2011/1/13/65
  - [V8]  http://lkml.org/lkml/2010/12/31/128
  - [V7]  http://lkml.org/lkml/2010/12/16/195
  - [V6]  http://lkml.org/lkml/2010/9/23/310
  - [V5]  http://lkml.org/lkml/2010/8/16/90

  - Thomas Gleixner: Rework of the PTP support series core code
http://lkml.org/lkml/2011/2/1/137

  - Dynamic clock devices [RFC]
http://lkml.org/lkml/2010/11/4/290

  - POSIX clock tuning syscall with dynamic clock ids
http://lkml.org/lkml/2010/9/3/119

  - POSIX clock tuning syscall with static clock ids
http://lkml.org/lkml/2010/8/23/49

  - Versions 1-4 appeared on the netdev list.


Richard Cochran (4):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp|   98 ++
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 +
 Documentation/ptp/ptp.txt  |   89 ++
 Documentation/ptp/testptp.c|  352 +++
 Documentation/ptp/testptp.mk   |   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h  |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/net/Makefile   |1 +
 drivers/net/arm/ixp4xx_eth.c   |  192 -
 drivers/net/gianfar_ptp.c  |  579 +++
 drivers/net/phy/Makefile   |1 +
 drivers/net/phy/dp83640.c  | 1012 
 drivers/net/phy/dp83640_reg.h  |  267 +
 drivers/ptp/Kconfig|   75 ++
 drivers/ptp/Makefile   |7 +
 drivers/ptp/ptp_chardev.c  |  156 +++
 drivers/ptp/ptp_clock.c|  320 ++
 drivers/ptp/ptp_ixp46x.c   |  332 +++
 drivers/ptp/ptp_private.h  |   86 ++
 drivers/ptp/ptp_sysfs.c|  230 +
 include/linux/Kbuild   |1 +
 include/linux/ptp_clock.h  |   84 ++
 include/linux/ptp_clock_kernel.h   |  139 +++
 28 files changed, 4238 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_ixp46x.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

___
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Linuxppc-dev@lists.ozlabs.org
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[PATCH V12 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-ptp |   98 ++
 Documentation/ptp/ptp.txt   |   89 +
 Documentation/ptp/testptp.c |  352 +++
 Documentation/ptp/testptp.mk|   33 
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   30 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  156 
 drivers/ptp/ptp_clock.c |  320 +++
 drivers/ptp/ptp_private.h   |   86 +
 drivers/ptp/ptp_sysfs.c |  230 +++
 include/linux/Kbuild|1 +
 include/linux/ptp_clock.h   |   84 +
 include/linux/ptp_clock_kernel.h|  139 ++
 15 files changed, 1627 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..d40d2b5
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,98 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported.
+
+What:  /sys/class/ptp/ptpN/extts_enable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This write-only file enables or disables external
+   timestamps. To enable external timestamps, write the
+   channel index followed by a 1 into the file.
+   To disable external timestamps, write the channel
+   index followed by a 0

[PATCH V12 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   54 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   13 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   13 +
 arch/powerpc/boot/dts/p2020ds.dts  |   13 +
 arch/powerpc/boot/dts/p2020rdb.dts |   13 +
 drivers/net/Makefile   |1 +
 drivers/net/gianfar_ptp.c  |  579 
 drivers/ptp/Kconfig|   13 +
 8 files changed, 699 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c

diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt 
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index edb7ae1..2c6be03 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -74,3 +74,57 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - fsl,tclk-period  Timer reference clock period in nanoseconds.
+  - fsl,tmr-prsc Prescaler, divides the output clock.
+  - fsl,tmr-add  Frequency compensation value.
+  - fsl,tmr-fiper1   Fixed interval period pulse generator.
+  - fsl,tmr-fiper2   Fixed interval period pulse generator.
+  - fsl,max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..502e17c 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,19 @@
sleep = pmc 0x0030;
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   fsl,tclk-period = 10;
+   fsl,tmr-prsc= 100;
+   fsl,tmr-add = 0x99A4;
+   fsl,tmr-fiper1  = 0x3B9AC9F6;
+   fsl,tmr-fiper2  = 0x00018696;
+   fsl,max-adj = 65998;
+   };
+
enet0: ethernet@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..f6c04d2 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,19 @@
};
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 68 2 69 2 70 2 71 2;
+   interrupt-parent =  mpic ;
+   fsl,tclk-period = 5

[PATCH V12 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz johns...@us.ibm.com
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  192 ++-
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  332 +
 5 files changed, 613 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..292d55e
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 ch_control;  /* 0x40 Time Synchronization Channel Control */
+   u32 ch_event;/* 0x44 Time Synchronization Channel Event */
+   u32 tx_snap_lo;  /* 0x48 Transmit Snapshot Low Register */
+   u32 tx_snap_hi;  /* 0x4C Transmit Snapshot High Register */
+   u32 rx_snap_lo;  /* 0x50 Receive Snapshot Low Register */
+   u32 rx_snap_hi;  /* 0x54 Receive Snapshot High Register */
+   u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
+   u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 control; /* 0x00 Time Sync Control Register */
+   u32 event;   /* 0x04 Time Sync Event Register */
+   u32 addend;  /* 0x08 Time Sync Addend Register */
+   u32 accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 test;/* 0x10 Time Sync Test Register */
+   u32 unused;  /* 0x14 */
+   u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
+   u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
+   u32 systime_lo;  /* 0x20 SystemTime_Low Register */
+   u32 systime_hi;  /* 0x24 SystemTime_High Register */
+   u32 trgt_lo; /* 0x28 TargetTime_Low Register */
+   u32 trgt_hi; /* 0x2C TargetTime_High Register */
+   u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9eb9b98..fa08c17 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,10 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)NPE_ID(p-id)
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +178,8 @@ struct port {
int id; /* logical port

[PATCH V12 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c | 1012 +
 drivers/net/phy/dp83640_reg.h |  267 +++
 drivers/ptp/Kconfig   |   19 +
 4 files changed, 1299 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..74f751e
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,1012 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+#define CAL_EVENT  2
+#define CAL_GPIO   9
+#define CAL_TRIGGER2
+
+/* phyter seems to miss the mark by 16 ns */
+#define ADJTIME_FIX16
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+};
+
+struct rxts {
+   struct list_head list;
+   unsigned long tmo;
+   u64 ns;
+   u16 seqid;
+   u8  msgtype;
+   u16 hash;
+};
+
+struct dp83640_clock;
+
+struct dp83640_private {
+   struct list_head list;
+   struct dp83640_clock *clock;
+   struct phy_device *phydev;
+   struct work_struct ts_work;
+   int hwts_tx_en;
+   int hwts_rx_en;
+   int layer;
+   int version;
+   /* remember state of cfg0 during calibration */
+   int cfg0;
+   /* remember the last event time stamp */
+   struct phy_txts edata;
+   /* list of rx timestamps */
+   struct list_head rxts;
+   struct list_head rxpool;
+   struct rxts rx_pool_data[MAX_RXTS];
+   /* protects above three fields from concurrent access */
+   spinlock_t rx_lock;
+   /* queues of incoming and outgoing packets */
+   struct sk_buff_head rx_queue;
+   struct sk_buff_head tx_queue;
+};
+
+struct dp83640_clock {
+   /* protects extended registers from concurrent access */
+   struct mutex extreg_lock;
+   /* remembers which page was last selected */
+   int page;
+   /* our advertised capabilities */
+   struct ptp_clock_info caps;
+   /* the one phyter from which we shall read */
+   struct dp83640_private *chosen;
+   /* list of the other

Re: [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Wed, Feb 23, 2011 at 10:54:59AM -0700, Grant Likely wrote:
 On Wed, Feb 23, 2011 at 11:26:12AM -0600, Scott Wood wrote:

  The eTSEC revision is probeable as well, but due the way PTP is described as
  a separate node, the driver doesn't have straightforward access to those
  registers.
 
 Ignorant question: Should the ptp be described as a separate node?

Well, the PTP Hardware Clock function is logically separate from the
MAC function. PHCs can be implemented in the MAC, in the PHY, or in
between in an FPGA on MII bus.

If the PHC is in the MAC, then it might be wise to implement one
driver that offers both the MAC and the PHC.

In the case of gianfar, it is not really necessary to combine the PHC
into the gianfar driver, since the registers are pretty well
separated. Also, given the size and complexity (and churn over time)
of the gianfar driver, I decided to keep the PHC separate.

Right now, the driver correctly handles all the clock revisions in the
boards that I have (mpc8313, mpc8572, p2020ds, p2020rdb).

If checking the revision becomes important, then we can always export
a function from gianfar to provide this.

Thanks,

Richard
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Re: [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Wed, Feb 23, 2011 at 01:24:44PM -0600, Scott Wood wrote:
 Whatever string is used should be written into a binding document.
 
 fsl,etsec-v1.6-ptp seems like it would be just as good for that purpose.
 
 Even just fsl,etsec-ptp will identify the binding, though it's lacking in
 identifying the hardware (in the absence of access to the eTSEC ID
 registers).

I read the conversation, and I don't mind admitting that I do not
understand what you both are arguing/discussing about.

How should I set the strings?  Like this?

arch/powerpc/boot/dts/mpc8313erdb.dts:
ptp_clock@24E00 {
compatible = fsl,mpc8313-etsec-ptp;
}
arch/powerpc/boot/dts/mpc8572ds.dts:
ptp_clock@24E00 {
compatible = fsl,mpc8572-etsec-ptp;
} 
arch/powerpc/boot/dts/p2020ds.dts:
ptp_clock@24E00 {
compatible = fsl,p2020ds-etsec-ptp;
} 
arch/powerpc/boot/dts/p2020rdb.dts:
ptp_clock@24E00 {
compatible = fsl,p2020rdb-etsec-ptp;
} 

drivers/net/gianfar_ptp.c:

static struct of_device_id match_table[] = {
{ .compatible = fsl,mpc8313-etsec-ptp },
{ .compatible = fsl,mpc8572-etsec-ptp },
{ .compatible = fsl,p2020ds-etsec-ptp },
{ .compatible = fsl,p2020rdb-etsec-ptp },
{},
};

Please let me know if this is what you meant.

Thanks,
Richard
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Re: [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Wed, Feb 23, 2011 at 09:50:58AM -0700, Grant Likely wrote:
 On Wed, Feb 23, 2011 at 11:38:17AM +0100, Richard Cochran wrote:
  +Clock Properties:
  +
  +  - tclk-period  Timer reference clock period in nanoseconds.
  +  - tmr-prsc Prescaler, divides the output clock.
  +  - tmr-add  Frequency compensation value.
  +  - cksel0= external clock, 1= eTSEC system clock, 3= RTC clock 
  input.
  + Currently the driver only supports choice 1.
 
 I'd be hesitant about defining something that isn't actually
 implemented yet.  You may find the binding to be insufficient at a
 later date.

Okay, I'll remove it.
We never got the external VCO working anyhow.

  +  - tmr-fiper1   Fixed interval period pulse generator.
  +  - tmr-fiper2   Fixed interval period pulse generator.
  +  - max-adj  Maximum frequency adjustment in parts per billion.
 
 These are all custom properties (not part of any shared binding) so
 they should probably be prefixed with 'fsl,'.

Okay, fine.

  +  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
  +  driver expects that tmr_fiper1 will be correctly set to produce a 1
  +  Pulse Per Second (PPS) signal, since this will be offered to the PPS
  +  subsystem to synchronize the Linux clock.
 
 Good documentation, thanks.  Question though, how many of these values
 will the end user (or board builder) be likely to want to change.  It
 is risky encoding the calculation results into the device tree when
 they aren't the actually parameters that will be manipulated, or at
 least very user-unfriendly.

The whole thing is pretty opaque, and my explanation is (IMHO) way
better that Freescale's documentation of how the fipers work.

The board designer / system designer will want to set these carefully,
but never change them. Basically, for a given input clock, there is
only one optimal setting.

I think the device tree is the right place for that kind of setting.

The fiper1 signal should always be a 1 PPS.  We could make fiper2 run
time programmable via PHC ioctls, but I think this can wait.


  +   etsects-irq = irq_of_parse_and_map(node, 0);
 
 Use platform_get_irq().

Okay.

  +   etsects-regs = of_iomap(node, 0);
 
 Use platform_get_resource(), and don't forget to request the
 resources.

Okay, but didn't you tell me before to do this way?

   http://marc.info/?l=linux-netdevm=127662247203659w=4

  +static struct of_platform_driver gianfar_ptp_driver = {
 
 Use a platform_driver instead.  of_platform_driver is deprecated and
 being removed.

Ja, should have noticed that myself, sorry.

  +++ b/drivers/net/gianfar_ptp_reg.h
 
 This data is only used by gianfar_ptp.c, so there is no need for a
 separate include file.  Move the contents of gianfar_ptp_reg.h into
 gianfar_ptp.c

You are right, of course, since private #defines and declarations
should simply stay in their .c files. Some people think that all
#defines and declarations must go into a header file.

I am not one of those people, but in this case, I generated the file
from a little tool I wrote and so kept it separate.

Still, it is no trouble to combine the header into the driver .c file.

Thanks for your review,

Richard
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Re: [PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Thu, Feb 24, 2011 at 11:27:31AM -0600, Scott Wood wrote:

 My vote, if it goes in a separate node at all, is fsl,etsec-ptp,

So, that is what the patch does.

 and let the driver use SVR.

What is SVR?

Thanks,
Richard
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[PATCH V11 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

This just might be the last round of review of the PTP hardware clock
patch series. These patches apply on top of the timers/core branch in
the tip tree. Patches 1 and 4 have changed since the last version.

* Why all the CCs?
  - One driver is for PowerPC, and adds device tree stuff.
  - One driver is for the ARM Xscale IXP465.

* Patch ChangeLog
** v11
   - added more padding to the structures in the user space ABI
   - tweaked Kconfig to make dependencies more clear
   - fixed locking on time stamp event queue
   - added John Stultz's acks on patches 2 and 3.
   - now the phyter driver handles multiple PHYs


Richard Cochran (4):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp|   98 ++
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   57 ++
 Documentation/ptp/ptp.txt  |   89 ++
 Documentation/ptp/testptp.c|  352 +++
 Documentation/ptp/testptp.mk   |   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h  |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   14 +
 arch/powerpc/boot/dts/p2020ds.dts  |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts |   14 +
 drivers/Kconfig|2 +
 drivers/Makefile   |1 +
 drivers/net/Makefile   |1 +
 drivers/net/arm/ixp4xx_eth.c   |  192 -
 drivers/net/gianfar_ptp.c  |  448 +
 drivers/net/gianfar_ptp_reg.h  |  113 +++
 drivers/net/phy/Makefile   |1 +
 drivers/net/phy/dp83640.c  | 1012 
 drivers/net/phy/dp83640_reg.h  |  267 +
 drivers/ptp/Kconfig|   75 ++
 drivers/ptp/Makefile   |7 +
 drivers/ptp/ptp_chardev.c  |  156 +++
 drivers/ptp/ptp_clock.c|  320 ++
 drivers/ptp/ptp_ixp46x.c   |  332 +++
 drivers/ptp/ptp_private.h  |   86 ++
 drivers/ptp/ptp_sysfs.c|  230 +
 include/linux/Kbuild   |1 +
 include/linux/ptp_clock.h  |   84 ++
 include/linux/ptp_clock_kernel.h   |  139 +++
 29 files changed, 4227 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/gianfar_ptp_reg.h
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_ixp46x.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

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[PATCH V11 1/4] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-ptp |   98 ++
 Documentation/ptp/ptp.txt   |   89 +
 Documentation/ptp/testptp.c |  352 +++
 Documentation/ptp/testptp.mk|   33 
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   30 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  156 
 drivers/ptp/ptp_clock.c |  320 +++
 drivers/ptp/ptp_private.h   |   86 +
 drivers/ptp/ptp_sysfs.c |  230 +++
 include/linux/Kbuild|1 +
 include/linux/ptp_clock.h   |   84 +
 include/linux/ptp_clock_kernel.h|  139 ++
 15 files changed, 1627 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..d40d2b5
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,98 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported.
+
+What:  /sys/class/ptp/ptpN/extts_enable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This write-only file enables or disables external
+   timestamps. To enable external timestamps, write the
+   channel index followed by a 1 into the file.
+   To disable external timestamps, write the channel
+   index followed by a 0

[PATCH V11 2/4] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz johns...@us.ibm.com
---
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |   57 +++
 arch/powerpc/boot/dts/mpc8313erdb.dts  |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts|   14 +
 arch/powerpc/boot/dts/p2020ds.dts  |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts |   14 +
 drivers/net/Makefile   |1 +
 drivers/net/gianfar_ptp.c  |  448 
 drivers/net/gianfar_ptp_reg.h  |  113 +
 drivers/ptp/Kconfig|   13 +
 9 files changed, 688 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/gianfar_ptp_reg.h

diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt 
b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index edb7ae1..f6edbb8 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -74,3 +74,60 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - tclk-period  Timer reference clock period in nanoseconds.
+  - tmr-prsc Prescaler, divides the output clock.
+  - tmr-add  Frequency compensation value.
+  - cksel0= external clock, 1= eTSEC system clock, 3= RTC clock input.
+ Currently the driver only supports choice 1.
+  - tmr-fiper1   Fixed interval period pulse generator.
+  - tmr-fiper2   Fixed interval period pulse generator.
+  - max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..85a7eaa 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,20 @@
sleep = pmc 0x0030;
};
 
+   ptp_clock@24E00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
+
enet0: ethernet@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..74208cd 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,20

[PATCH V11 4/4] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c | 1012 +
 drivers/net/phy/dp83640_reg.h |  267 +++
 drivers/ptp/Kconfig   |   19 +
 4 files changed, 1299 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..74f751e
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,1012 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+#define CAL_EVENT  2
+#define CAL_GPIO   9
+#define CAL_TRIGGER2
+
+/* phyter seems to miss the mark by 16 ns */
+#define ADJTIME_FIX16
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+};
+
+struct rxts {
+   struct list_head list;
+   unsigned long tmo;
+   u64 ns;
+   u16 seqid;
+   u8  msgtype;
+   u16 hash;
+};
+
+struct dp83640_clock;
+
+struct dp83640_private {
+   struct list_head list;
+   struct dp83640_clock *clock;
+   struct phy_device *phydev;
+   struct work_struct ts_work;
+   int hwts_tx_en;
+   int hwts_rx_en;
+   int layer;
+   int version;
+   /* remember state of cfg0 during calibration */
+   int cfg0;
+   /* remember the last event time stamp */
+   struct phy_txts edata;
+   /* list of rx timestamps */
+   struct list_head rxts;
+   struct list_head rxpool;
+   struct rxts rx_pool_data[MAX_RXTS];
+   /* protects above three fields from concurrent access */
+   spinlock_t rx_lock;
+   /* queues of incoming and outgoing packets */
+   struct sk_buff_head rx_queue;
+   struct sk_buff_head tx_queue;
+};
+
+struct dp83640_clock {
+   /* protects extended registers from concurrent access */
+   struct mutex extreg_lock;
+   /* remembers which page was last selected */
+   int page;
+   /* our advertised capabilities */
+   struct ptp_clock_info caps;
+   /* the one phyter from which we shall read */
+   struct dp83640_private *chosen;
+   /* list of the other

[PATCH V11 3/4] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
Acked-by: John Stultz johns...@us.ibm.com
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  192 ++-
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  332 +
 5 files changed, 613 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..292d55e
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 ch_control;  /* 0x40 Time Synchronization Channel Control */
+   u32 ch_event;/* 0x44 Time Synchronization Channel Event */
+   u32 tx_snap_lo;  /* 0x48 Transmit Snapshot Low Register */
+   u32 tx_snap_hi;  /* 0x4C Transmit Snapshot High Register */
+   u32 rx_snap_lo;  /* 0x50 Receive Snapshot Low Register */
+   u32 rx_snap_hi;  /* 0x54 Receive Snapshot High Register */
+   u32 src_uuid_lo; /* 0x58 Source UUID0 Low Register */
+   u32 src_uuid_hi; /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 control; /* 0x00 Time Sync Control Register */
+   u32 event;   /* 0x04 Time Sync Event Register */
+   u32 addend;  /* 0x08 Time Sync Addend Register */
+   u32 accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 test;/* 0x10 Time Sync Test Register */
+   u32 unused;  /* 0x14 */
+   u32 rsystime_lo; /* 0x18 RawSystemTime_Low Register */
+   u32 rsystime_hi; /* 0x1C RawSystemTime_High Register */
+   u32 systime_lo;  /* 0x20 SystemTime_Low Register */
+   u32 systime_hi;  /* 0x24 SystemTime_High Register */
+   u32 trgt_lo; /* 0x28 TargetTime_Low Register */
+   u32 trgt_hi; /* 0x2C TargetTime_High Register */
+   u32 asms_lo; /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 asms_hi; /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 amms_lo; /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 amms_hi; /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 9eb9b98..fa08c17 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,10 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)NPE_ID(p-id)
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +178,8 @@ struct port {
int id; /* logical port

Re: [PATCH V11 0/4] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

* Previous Discussions

  This patch set previously appeared on the netdev list. Since V5 of
  the character device patch set, the discussion has moved to the
  lkml.

  - IEEE 1588 hardware clock support [V5]
http://lkml.org/lkml/2010/8/16/90

  - POSIX clock tuning syscall with static clock ids
http://lkml.org/lkml/2010/8/23/49

  - POSIX clock tuning syscall with dynamic clock ids
http://lkml.org/lkml/2010/9/3/119

  - IEEE 1588 hardware clock support [V6]
http://lkml.org/lkml/2010/9/23/310

  - Dynamic clock devices [RFC]
http://lkml.org/lkml/2010/11/4/290

  - IEEE 1588 hardware clock support [V7]
http://lkml.org/lkml/2010/12/16/195

  - IEEE 1588 hardware clock support [V8]
http://lkml.org/lkml/2010/12/31/128

  - IEEE 1588 hardware clock support [V9]
http://lkml.org/lkml/2011/1/13/65

  - IEEE 1588 hardware clock support [V10]
http://lkml.org/lkml/2011/1/27/71

  - Thomas Gleixner: Rework of the PTP support series core code
http://lkml.org/lkml/2011/2/1/137
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Re: [PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Mon, Sep 27, 2010 at 10:14:23AM -0600, M. Warner Losh wrote:
 
 This is a common error that I've seen repeated in this thread.  The
 only reason that it has historically been important is because when
 you are doing timestamping in software based on an interrupt, that
 stuff does matter.

Yes, thanks for your helpful explanation.

To further illustrate how small the effect of running the servo in
user space is, consider the following.

It is true that delays and jitter in the time to process the received
packet negatively affect the clock servo loop. However, the effect in
our case will be quite small.

John Eidson's book [1] presents a rigorous servo model that includes
an analysis of the delay from the time the samples (timestamps) are
taken until the corrective action is performed by the PTP software.

For PTP, the sample time is at the sender (the remote host, the master
clock). The master sends *two* packets, where the second one (the so
called follow-up packet) contains the hardware time stamp of the first
one. So, the computational delay includes the time spent by the sender
in its PTP stack preparing the second packet, the time the packet
spends in transit, and the time in the receiver's PTP stack and servo.

According to Eidson's analysis, a delay of up to 10 milliseconds would
be acceptable, even with a sample rate of 10 Hz. Therefore, saving a
few dozen microseconds by placing the servo (and PTP stack) into the
kernel is not worth the effort.

Richard


[1] title = {Measurement, control, and communication using IEEE 1588},
author ={J. C. Eidson},
year =  2006,
publisher = {Springer-Verlag},
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Re: [PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Mon, Sep 27, 2010 at 06:05:58PM +0100, Alan Cox wrote:
 On Mon, 27 Sep 2010 10:56:09 -0500 (CDT)
 Christoph Lameter c...@linux.com wrote:
 
  
  On Fri, 24 Sep 2010, Alan Cox wrote:
  
   Whether you add new syscalls or do the fd passing using flags and hide
   the ugly bits in glibc is another question.
  
  Use device specific ioctls instead of syscalls?
 
 Some of the ioctls are probably not device specific, the job of the OS in
 part is to present a unified interface. We already have a mess of HPET
 and RTC driver ioctls.

Yes, and the whole point of introducing a PTP hardare clock API was to
avoid each new clock driver introducing yet another ioctl interface.

I had proposed a standard ioctl interface for PTP hardware clocks, but
that interface was rightly criticized for duplicating the posix clock
API. It does not make sense to have multiple interfaces with the exact
same functionality.

It is impossible to support every last feature of every possible
hardware clock with a generic interface, so there will always need to
be special ioctls for such features.

However, some clock functions *are* completely generic and apply to
every clock:

- set time
- get time
- adjust the frequency by N ppb
- shift the time by a given offset

The first two are provided by the posix clock interface, the third by
the NTP adjtimex call, which also can support (by a single mode
extension) the last item.

Richard
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Re: [PATCH 1/8] posix clocks: introduce a syscall for clock tuning.

[Richard Cochran]

On Thu, Sep 23, 2010 at 12:48:51PM -0700, john stultz wrote:
 On Thu, 2010-09-23 at 19:31 +0200, Richard Cochran wrote:
  A new syscall is introduced that allows tuning of a POSIX clock. The
  syscall is implemented for four architectures: arm, blackfin, powerpc,
  and x86.
  
  The new syscall, clock_adjtime, takes two parameters, the clock ID,
  and a pointer to a struct timex. The semantics of the timex struct
  have been expanded by one additional mode flag, which allows an
  absolute offset correction. When specificied, the clock offset is
  immediately corrected by adding the given time value to the current
  time value.
 
 
 So I'd still split this patch up a little bit more.
 
 1) Patch that implements the ADJ_SETOFFSET  (*and its implementation*)
 in do_adjtimex.
 
 2) Patch that adds the new syscall and clock_id multiplexing.
 
 3) Patches that wire it up to the rest of the architectures (there's
 still a bunch missing here).

I was not sure what the policy is about adding syscalls. Is it the
syscall author's responsibility to add it into every arch?

The last time (see a2e2725541fad7) the commit only added half of some
archs, and ignored others. In my patch, the syscall *really* works on
the archs that are present in the patch.

(Actually, I did not test blackfin, since I don't have one, but I
included it since I know they have a PTP hardware clock.)

  +static inline int common_clock_adj(const clockid_t which_clock, struct 
  timex *t)
  +{
  +   if (CLOCK_REALTIME == which_clock)
  +   return do_adjtimex(t);
  +   else
  +   return -EOPNOTSUPP;
  +}
 
 
 Would it make sense to point to the do_adjtimex() in the k_clock
 definition for CLOCK_REALTIME rather then conditionalizing it here?

But what about CLOCK_MONOTONIC_RAW, for example?

Does it make sense to allow it to be adjusted?

Thanks,
Richard
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Re: [PATCH 1/8] posix clocks: introduce a syscall for clock tuning.

[Richard Cochran]

On Fri, Sep 24, 2010 at 08:03:43AM +1000, Benjamin Herrenschmidt wrote:
 On Thu, 2010-09-23 at 19:31 +0200, Richard Cochran wrote:
  A new syscall is introduced that allows tuning of a POSIX clock. The
  syscall is implemented for four architectures: arm, blackfin, powerpc,
  and x86.
  
  The new syscall, clock_adjtime, takes two parameters, the clock ID,
  and a pointer to a struct timex. The semantics of the timex struct
  have been expanded by one additional mode flag, which allows an
  absolute offset correction. When specificied, the clock offset is
  immediately corrected by adding the given time value to the current
  time value.
 
 Any reason why you CC'ed device-tree discuss ?
 
 This list is getting way too much unrelated stuff, which I find
 annoying, it would be nice if we were all a bit more careful here with
 our CC lists.

Sorry, I only added device-tree because some one asked me to do so.

http://marc.info/?l=linux-netdevm=127273157912358

I'll leave it off next time.

Thanks,
Richard
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Re: [PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Thu, Sep 23, 2010 at 12:53:20PM -0500, Christoph Lameter wrote:
 On Thu, 23 Sep 2010, Richard Cochran wrote:
  3.3 Synchronizing the Linux System Time
  
 
 One could offer a PHC as a combined clock source and clock event
 device. The advantage of this approach would be that it obviates
 the need for synchronization when the PHC is selected as the system
 timer. However, some PHCs, namely the PHY based clocks, cannot be
 used in this way.
 
 Why not? Do PHY based clock not at least provide a counter that increments
 in synchronized intervals throughout the network?

The counter in the PHY is accessed via the MDIO bus. One 16 bit read
takes anywhere from 25 to 40 microseconds. Reading the 64 bit time
value requires four reads, so we're talking about 100 to 160
microseconds, just for a single time reading.

In addition to that, reading MDIO bus can sleep.  So, we can't (in
general) to offer PHCs as clock sources.

 Instead, the patch set provides a way to offer a Pulse Per Second
 (PPS) event from the PHC to the Linux PPS subsystem. A user space
 application can read the PPS events and tune the system clock, just
 like when using other external time sources like radio clocks or
 GPS.
 
 User space is subject to various latencies created by the OS etc. I would
 that in order to have fine grained (read microsecond) accurary we would
 have to run the portions that are relevant to obtaining the desired
 accuracy in the kernel.

The time-critical operations are all performed in hardware (packet
timestamp), or in kernel space (input PPS timestamp). User space only
runs the servo (using hardware or kernel timestamps as input) and
performs the clock correction. With a sample rate of 1 PPS, the small
user space induced delay (a few dozen microseconds) between sample
time and clock correction is not an issue.

Thanks,
Richard
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Re: [PATCH 6/8] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

On Thu, Sep 23, 2010 at 02:17:36PM -0500, Christoph Lameter wrote:
 On Thu, 23 Sep 2010, Richard Cochran wrote:
  +  These properties set the operational parameters for the PTP
  +  clock. You must choose these carefully for the clock to work right.
  +  Here is how to figure good values:
  +
  +  TimerOsc = system clock   MHz
  +  tclk_period  = desired clock period   nanoseconds
  +  NominalFreq  = 1000 / tclk_period MHz
  +  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
  +  tmr_add  = ceil(2^32 / FreqDivRatio)
  +  OutputClock  = NominalFreq / tmr_prsc MHz
  +  PulseWidth   = 1 / OutputClockmicroseconds
  +  FiperFreq1   = desired frequency in Hz
  +  FiperDiv1= 100 * OutputClock / FiperFreq1
  +  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
  +  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
 
 Great stuff for clock synchronization...
 
  +  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
  +  driver expects that tmr_fiper1 will be correctly set to produce a 1
  +  Pulse Per Second (PPS) signal, since this will be offered to the PPS
  +  subsystem to synchronize the Linux clock.
 
 Argh. And conceptually completely screwed up. Why go through the PPS
 subsystem if you can directly tune the system clock based on a number of
 the cool periodic clock features that you have above? See how the other
 clocks do that easily? Look into drivers/clocksource. Add it there.
 
 Please do not introduce useless additional layers for clock sync. Load
 these ptp clocks like the other regular clock modules and make them sync
 system time like any other clock.
 
 Really guys: I want a PTP solution! Now! And not some idiotic additional
 kernel layers that just pass bits around because its so much fun and
 screws up clock accurary in due to the latency noise introduced while
 having so much fun with the bits.

(Sorry if this message comes twice. Mutt/Gmail flaked out again.)

I think you misunderstood this particular patch. The device tree
parameters are really just internal driver stuff. When you use the
eTSEC, you must make some design choices at the same time as you plan
your board. The proper values for some of the eTSEC registers are
based on these design choices. Since the Freescale documentation is a
bit thin on this, I added a few notes to help my fellow board
designers.

Because these values are closely related to the board itself, I think
that it is nicer to configure them via the device tree than using
either CONFIG_ variables or platform data.

Richard
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Re: [PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Thu, Sep 23, 2010 at 09:36:54PM +0100, Alan Cox wrote:
 Drop the clockid_t and swap it for a file handle like a proper Unix or
 Linux interface. The rest is much the same
 
   fd = open /sys/class/timesource/[whatever]
 
   various queries you may want to do to check the name etc
 
   fclock_adjtime(fd, ...)

Okay, but lets extend the story:

clock_getttime(fd, ...);

clock_settime(fd, ...);

timer_create(fd, ...);

Can you agree to that as well?

(We would need to ensure that 'fd' avoids the range 0 to MAX_CLOCKS).

Richard
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Re: [PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

On Thu, Sep 23, 2010 at 12:38:53PM -0700, john stultz wrote:
 On Thu, 2010-09-23 at 19:30 +0200, Richard Cochran wrote:
  /sys/class/timesource/name/id
  /sys/class/ptp/ptp_clock_X/id
  
 So yea, I'm not a fan of the timesource sysfs interface. One, I think
 the name is poor (posix_clocks or something a little more specific would
 be an improvement), and second, I don't like the dictionary interface,
 where one looks up the clock by name.
 
 Instead, I think having the id hanging off the class driver is much
 better, as it allows mapping the actual hardware to the id more clearly.
 
 So I'd drop the timesource listing. And maybe change id to
 clock_id so its a little more clear what the id is for.

Okay, I will drop /sys/class/timesource (hope Alan Cox agrees :)

I threw it out there mostly for the sake of discussion. I imagined
that there could be other properties in that directory, like time
scale (TAI, UTC, etc). But it seems like we don't really need anything
in that direction.

  3.3 Synchronizing the Linux System Time 
  
  
 One could offer a PHC as a combined clock source and clock event
 device. The advantage of this approach would be that it obviates
 the need for synchronization when the PHC is selected as the system
 timer. However, some PHCs, namely the PHY based clocks, cannot be
 used in this way.
 
 Again, I'd scratch this. 

Okay, I only wanted to preempt the question which people are asking
all the time: why can't it work with the system clock transparently?

 Instead, the patch set provides a way to offer a Pulse Per Second
 (PPS) event from the PHC to the Linux PPS subsystem. A user space
 application can read the PPS events and tune the system clock, just
 like when using other external time sources like radio clocks or
 GPS.
 
 Forgive me for a bit of a tangent here:
   So while I think this PPS method is a neat idea, I'm a little curious
 how much of a difference the PPS method for syncing the clock would be
 over just a simple reading of the two clocks and correcting the offset.
 
 It seems much of it depends on the read latency of the PTP hardware vs
 the interrupt latency. Also the PTP clock granularity would effect the
 read accuracy (like on the RTC, you don't really know how close to the
 second boundary you are).
 
 Have you done any such measurements between the two methods?

I have not yet tested how well the PPS method works, but I expect at
least as good results as when using a GPS.

 I just
 wonder if it would actually be something noticeable, and if its not, how
 much lighter this patch-set would be without the PPS connection.

As you say, the problem with just reading two clocks at nearly the
same time is that you have two uncertain operations. If you use a PPS,
then there is only one clock to read, and that clock is the system
clock, which hopefully is not too slow to read!

In addition, PHY reads can sleep, and that surely won't work. Even with
MAC PHCs, reading outside of interrupt context makes you vulnerable to
other interrupts.

 Again, this isn't super critical, just trying to make sure we don't end
 up adding a bunch of code that doesn't end up being used.

The PPS hooks are really only just a few lines of code.

The great advantage of a PPS approach over and ad-hoc read two clocks
and compare, is that, with a steady, known sample rate, you can
analyze and predict your control loop behavior. There is lots of
literature available on how to do it. IMHO, that is the big weakness
of the timecompare.c stuff used in the current IGB driver.

 Also PPS
 interrupts are awfully frequent, so systems concerned with power-saving
 and deep idles probably would like something that could be done at a
 more coarse interval.

We could always make the pulse rate programmable, for power-saving
applications.

  4.1 Supported Hardware Clocks 
  ==
  
 + Standard Linux system timer
   This driver exports the standard Linux timer as a PTP clock.
   Although this duplicates CLOCK_REALTIME, the code serves as a
   simple example for driver development and lets people who without
   special hardware try the new API.
 
 Still not a fan of this one, figure the app should handle the special
 case where there are no PTP clocks and just use CLOCK_REALTIME rather
 then funneling CLOCK_REALTIME through the PTP interface.

It is really just as an example and for people who want to test driver
the API. It can surely be removed before the final version...

Thanks for your comments,

Richard
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[PATCH v6 0/8] ptp: IEEE 1588 hardware clock support

[Richard Cochran]

)
 - 2 Alarm registers (optional interrupt)
 - 3 Periodic signals (optional interrupt)

   + National Semiconductor DP83640
 - 6 GPIOs programmable as inputs or outputs
 - 6 GPIOs with dedicated functions (LED/JTAG/clock) can also be
   used as general inputs or outputs
 - GPIO inputs can time stamp external triggers
 - GPIO outputs can produce periodic signals
 - 1 interrupt pin

   + Intel IXP465
 - Auxiliary Slave/Master Mode Snapshot (optional interrupt)
 - Target Time (optional interrupt)

4.2 Open Driver Issues 
===

4.2.1 DP83640 
--
In order to make this work, one line must be added into the MAC
driver. If you have the DP83640 and want to try the driver, you
need to add this one line to your MAC driver: In the
.ndo_start_xmit function, add skb_tx_timestamp(skb).

4.2.2 IXP465 
-
I do not know how to correctly choose the timestamp channel
based on the port identifier:

+#define PORT2CHANNEL(p)1
+/*
+ * PHYSICAL_ID(p-id) ?
+ * TODO - Figure out correct mapping.
+ */

   Krzysztof, can you help?


Richard Cochran (8):
  posix clocks: introduce a syscall for clock tuning.
  posix clocks: dynamic clock ids.
  posix clocks: introduce a sysfs presence.
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a simulated PTP hardware clock.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/ABI/testing/sysfs-ptp |  107 +++
 Documentation/ABI/testing/sysfs-timesource  |   24 +
 Documentation/powerpc/dts-bindings/fsl/tsec.txt |   57 ++
 Documentation/ptp/ptp.txt   |   94 +++
 Documentation/ptp/testptp.c |  358 +
 Documentation/ptp/testptp.mk|   33 +
 arch/arm/include/asm/unistd.h   |1 +
 arch/arm/kernel/calls.S |1 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h   |   78 ++
 arch/blackfin/include/asm/unistd.h  |3 +-
 arch/blackfin/mach-common/entry.S   |1 +
 arch/powerpc/boot/dts/mpc8313erdb.dts   |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts |   14 +
 arch/powerpc/boot/dts/p2020ds.dts   |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts  |   14 +
 arch/powerpc/include/asm/systbl.h   |1 +
 arch/powerpc/include/asm/unistd.h   |3 +-
 arch/x86/ia32/ia32entry.S   |1 +
 arch/x86/include/asm/unistd_32.h|3 +-
 arch/x86/include/asm/unistd_64.h|2 +
 arch/x86/kernel/syscall_table_32.S  |1 +
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/char/mmtimer.c  |1 +
 drivers/net/Makefile|1 +
 drivers/net/arm/ixp4xx_eth.c|  191 +
 drivers/net/gianfar_ptp.c   |  447 
 drivers/net/gianfar_ptp_reg.h   |  113 +++
 drivers/net/phy/Kconfig |   29 +
 drivers/net/phy/Makefile|1 +
 drivers/net/phy/dp83640.c   |  887 +++
 drivers/net/phy/dp83640_reg.h   |  261 +++
 drivers/ptp/Kconfig |   67 ++
 drivers/ptp/Makefile|8 +
 drivers/ptp/ptp_chardev.c   |  178 +
 drivers/ptp/ptp_clock.c |  382 ++
 drivers/ptp/ptp_ixp46x.c|  345 +
 drivers/ptp/ptp_linux.c |  165 +
 drivers/ptp/ptp_private.h   |   64 ++
 drivers/ptp/ptp_sysfs.c |  235 ++
 include/linux/Kbuild|1 +
 include/linux/posix-timers.h|   14 +-
 include/linux/ptp_clock.h   |   79 ++
 include/linux/ptp_clock_kernel.h|  139 
 include/linux/syscalls.h|2 +
 include/linux/time.h|2 +
 include/linux/timex.h   |3 +-
 kernel/compat.c |  136 +++--
 kernel/posix-cpu-timers.c   |6 +
 kernel/posix-timers.c   |   98 +++-
 kernel/time/ntp.c   |2 +
 51 files changed, 4624 insertions(+), 60 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ABI/testing/sysfs-timesource
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 arch/arm/mach-ixp4xx/include

[PATCH 2/8] posix clocks: dynamic clock ids.

[Richard Cochran]

This patch augments the POSIX clock code to offer a dynamic clock
creation method. Instead of registering a hard coded clock ID, modules
may call create_posix_clock(), which returns a new clock ID.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 include/linux/posix-timers.h |7 ++-
 include/linux/time.h |2 ++
 kernel/posix-timers.c|   41 ++---
 3 files changed, 42 insertions(+), 8 deletions(-)

diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h
index abf61cc..08aa4da 100644
--- a/include/linux/posix-timers.h
+++ b/include/linux/posix-timers.h
@@ -68,6 +68,7 @@ struct k_itimer {
 };
 
 struct k_clock {
+   clockid_t id;
int res;/* in nanoseconds */
int (*clock_getres) (const clockid_t which_clock, struct timespec *tp);
int (*clock_set) (const clockid_t which_clock, struct timespec * tp);
@@ -86,7 +87,11 @@ struct k_clock {
   struct itimerspec * cur_setting);
 };
 
-void register_posix_clock(const clockid_t clock_id, struct k_clock *new_clock);
+/* Regsiter a posix clock with a well known clock id. */
+int register_posix_clock(const clockid_t id, struct k_clock *clock);
+
+/* Create a new posix clock with a dynamic clock id. */
+clockid_t create_posix_clock(struct k_clock *clock);
 
 /* error handlers for timer_create, nanosleep and settime */
 int do_posix_clock_nonanosleep(const clockid_t, int flags, struct timespec *,
diff --git a/include/linux/time.h b/include/linux/time.h
index 9f15ac7..914c48d 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -299,6 +299,8 @@ struct itimerval {
 #define CLOCKS_MASK(CLOCK_REALTIME | CLOCK_MONOTONIC)
 #define CLOCKS_MONOCLOCK_MONOTONIC
 
+#define CLOCK_INVALID  -1
+
 /*
  * The various flags for setting POSIX.1b interval timers:
  */
diff --git a/kernel/posix-timers.c b/kernel/posix-timers.c
index 446b566..67fba5c 100644
--- a/kernel/posix-timers.c
+++ b/kernel/posix-timers.c
@@ -132,6 +132,8 @@ static DEFINE_SPINLOCK(idr_lock);
  */
 
 static struct k_clock posix_clocks[MAX_CLOCKS];
+static DECLARE_BITMAP(clocks_map, MAX_CLOCKS);
+static DEFINE_MUTEX(clocks_mux); /* protects 'posix_clocks' and 'clocks_map' */
 
 /*
  * These ones are defined below.
@@ -484,18 +486,43 @@ static struct pid *good_sigevent(sigevent_t * event)
return task_pid(rtn);
 }
 
-void register_posix_clock(const clockid_t clock_id, struct k_clock *new_clock)
+int register_posix_clock(const clockid_t id, struct k_clock *clock)
 {
-   if ((unsigned) clock_id = MAX_CLOCKS) {
-   printk(POSIX clock register failed for clock_id %d\n,
-  clock_id);
-   return;
-   }
+   struct k_clock *kc;
+   int err = 0;
 
-   posix_clocks[clock_id] = *new_clock;
+   mutex_lock(clocks_mux);
+   if (test_bit(id, clocks_map)) {
+   pr_err(clock_id %d already registered\n, id);
+   err = -EBUSY;
+   goto out;
+   }
+   kc = posix_clocks[id];
+   *kc = *clock;
+   kc-id = id;
+   set_bit(id, clocks_map);
+out:
+   mutex_unlock(clocks_mux);
+   return err;
 }
 EXPORT_SYMBOL_GPL(register_posix_clock);
 
+clockid_t create_posix_clock(struct k_clock *clock)
+{
+   clockid_t id;
+
+   mutex_lock(clocks_mux);
+   id = find_first_zero_bit(clocks_map, MAX_CLOCKS);
+   mutex_unlock(clocks_mux);
+
+   if (id  MAX_CLOCKS) {
+   register_posix_clock(id, clock);
+   return id;
+   }
+   return CLOCK_INVALID;
+}
+EXPORT_SYMBOL_GPL(create_posix_clock);
+
 static struct k_itimer * alloc_posix_timer(void)
 {
struct k_itimer *tmr;
-- 
1.7.0.4

___
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[PATCH 1/8] posix clocks: introduce a syscall for clock tuning.

[Richard Cochran]

A new syscall is introduced that allows tuning of a POSIX clock. The
syscall is implemented for four architectures: arm, blackfin, powerpc,
and x86.

The new syscall, clock_adjtime, takes two parameters, the clock ID,
and a pointer to a struct timex. The semantics of the timex struct
have been expanded by one additional mode flag, which allows an
absolute offset correction. When specificied, the clock offset is
immediately corrected by adding the given time value to the current
time value.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 arch/arm/include/asm/unistd.h  |1 +
 arch/arm/kernel/calls.S|1 +
 arch/blackfin/include/asm/unistd.h |3 +-
 arch/blackfin/mach-common/entry.S  |1 +
 arch/powerpc/include/asm/systbl.h  |1 +
 arch/powerpc/include/asm/unistd.h  |3 +-
 arch/x86/ia32/ia32entry.S  |1 +
 arch/x86/include/asm/unistd_32.h   |3 +-
 arch/x86/include/asm/unistd_64.h   |2 +
 arch/x86/kernel/syscall_table_32.S |1 +
 include/linux/posix-timers.h   |3 +
 include/linux/syscalls.h   |2 +
 include/linux/timex.h  |3 +-
 kernel/compat.c|  136 +++-
 kernel/posix-cpu-timers.c  |4 +
 kernel/posix-timers.c  |   17 +
 16 files changed, 130 insertions(+), 52 deletions(-)

diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index c891eb7..f58d881 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -396,6 +396,7 @@
 #define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
 #define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
 #define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
+#define __NR_clock_adjtime (__NR_SYSCALL_BASE+370)
 
 /*
  * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 5c26ecc..430de4c 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -379,6 +379,7 @@
CALL(sys_fanotify_init)
CALL(sys_fanotify_mark)
CALL(sys_prlimit64)
+/* 370 */  CALL(sys_clock_adjtime)
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3)  ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/blackfin/include/asm/unistd.h 
b/arch/blackfin/include/asm/unistd.h
index 14fcd25..79ad99b 100644
--- a/arch/blackfin/include/asm/unistd.h
+++ b/arch/blackfin/include/asm/unistd.h
@@ -392,8 +392,9 @@
 #define __NR_fanotify_init 371
 #define __NR_fanotify_mark 372
 #define __NR_prlimit64 373
+#define __NR_clock_adjtime 374
 
-#define __NR_syscall   374
+#define __NR_syscall   375
 #define NR_syscalls__NR_syscall
 
 /* Old optional stuff no one actually uses */
diff --git a/arch/blackfin/mach-common/entry.S 
b/arch/blackfin/mach-common/entry.S
index af1bffa..ee68730 100644
--- a/arch/blackfin/mach-common/entry.S
+++ b/arch/blackfin/mach-common/entry.S
@@ -1631,6 +1631,7 @@ ENTRY(_sys_call_table)
.long _sys_fanotify_init
.long _sys_fanotify_mark
.long _sys_prlimit64
+   .long _sys_clock_adjtime
 
.rept NR_syscalls-(.-_sys_call_table)/4
.long _sys_ni_syscall
diff --git a/arch/powerpc/include/asm/systbl.h 
b/arch/powerpc/include/asm/systbl.h
index 3d21266..2485d8f 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -329,3 +329,4 @@ COMPAT_SYS(rt_tgsigqueueinfo)
 SYSCALL(fanotify_init)
 COMPAT_SYS(fanotify_mark)
 SYSCALL_SPU(prlimit64)
+COMPAT_SYS_SPU(clock_adjtime)
diff --git a/arch/powerpc/include/asm/unistd.h 
b/arch/powerpc/include/asm/unistd.h
index 597e6f9..85d5067 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -348,10 +348,11 @@
 #define __NR_fanotify_init 323
 #define __NR_fanotify_mark 324
 #define __NR_prlimit64 325
+#define __NR_clock_adjtime 326
 
 #ifdef __KERNEL__
 
-#define __NR_syscalls  326
+#define __NR_syscalls  327
 
 #define __NR__exit __NR_exit
 #define NR_syscalls__NR_syscalls
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 518bb99..0ed7896 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -851,4 +851,5 @@ ia32_sys_call_table:
.quad sys_fanotify_init
.quad sys32_fanotify_mark
.quad sys_prlimit64 /* 340 */
+   .quad compat_sys_clock_adjtime
 ia32_syscall_end:
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index b766a5e..b6f73f1 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -346,10 +346,11 @@
 #define __NR_fanotify_init 338
 #define __NR_fanotify_mark 339
 #define __NR_prlimit64 340
+#define __NR_clock_adjtime 341
 
 #ifdef __KERNEL__
 
-#define NR_syscalls 341
+#define NR_syscalls 342
 
 #define

[PATCH 3/8] posix clocks: introduce a sysfs presence.

[Richard Cochran]

This patch adds a 'timesource' class into sysfs. Each registered POSIX
clock appears by name under /sys/class/timesource. The idea is to
expose to user space the dynamic mapping between clock devices and
clock IDs.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-timesource |   24 
 drivers/char/mmtimer.c |1 +
 include/linux/posix-timers.h   |4 +++
 kernel/posix-cpu-timers.c  |2 +
 kernel/posix-timers.c  |   40 
 5 files changed, 71 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-timesource

diff --git a/Documentation/ABI/testing/sysfs-timesource 
b/Documentation/ABI/testing/sysfs-timesource
new file mode 100644
index 000..f991de2
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-timesource
@@ -0,0 +1,24 @@
+What:  /sys/class/timesource/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the available
+   time sources.
+
+What:  /sys/class/timesource/name/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of a time
+   source registered with the POSIX clock subsystem.
+
+What:  /sys/class/timesource/name/id
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the clock ID (a non-negative
+   integer) of the named time source registered with the
+   POSIX clock subsystem. This value may be passed as the
+   first argument to the POSIX clock and timer system
+   calls. See man CLOCK_GETRES(2) and TIMER_CREATE(2).
diff --git a/drivers/char/mmtimer.c b/drivers/char/mmtimer.c
index ea7c99f..e9173e3 100644
--- a/drivers/char/mmtimer.c
+++ b/drivers/char/mmtimer.c
@@ -758,6 +758,7 @@ static int sgi_timer_set(struct k_itimer *timr, int flags,
 }
 
 static struct k_clock sgi_clock = {
+   .name = sgi_cycle,
.res = 0,
.clock_set = sgi_clock_set,
.clock_get = sgi_clock_get,
diff --git a/include/linux/posix-timers.h b/include/linux/posix-timers.h
index 08aa4da..64e6fee 100644
--- a/include/linux/posix-timers.h
+++ b/include/linux/posix-timers.h
@@ -67,7 +67,11 @@ struct k_itimer {
} it;
 };
 
+#define KCLOCK_MAX_NAME 32
+
 struct k_clock {
+   char name[KCLOCK_MAX_NAME];
+   struct device *dev;
clockid_t id;
int res;/* in nanoseconds */
int (*clock_getres) (const clockid_t which_clock, struct timespec *tp);
diff --git a/kernel/posix-cpu-timers.c b/kernel/posix-cpu-timers.c
index e1c2e7b..df9cbab 100644
--- a/kernel/posix-cpu-timers.c
+++ b/kernel/posix-cpu-timers.c
@@ -1611,6 +1611,7 @@ static long thread_cpu_nsleep_restart(struct 
restart_block *restart_block)
 static __init int init_posix_cpu_timers(void)
 {
struct k_clock process = {
+   .name = process_cputime,
.clock_getres = process_cpu_clock_getres,
.clock_get = process_cpu_clock_get,
.clock_set = do_posix_clock_nosettime,
@@ -1619,6 +1620,7 @@ static __init int init_posix_cpu_timers(void)
.nsleep_restart = process_cpu_nsleep_restart,
};
struct k_clock thread = {
+   .name = thread_cputime,
.clock_getres = thread_cpu_clock_getres,
.clock_get = thread_cpu_clock_get,
.clock_set = do_posix_clock_nosettime,
diff --git a/kernel/posix-timers.c b/kernel/posix-timers.c
index 67fba5c..719aa11 100644
--- a/kernel/posix-timers.c
+++ b/kernel/posix-timers.c
@@ -46,6 +46,7 @@
 #include linux/wait.h
 #include linux/workqueue.h
 #include linux/module.h
+#include linux/device.h
 
 /*
  * Management arrays for POSIX timers.  Timers are kept in slab memory
@@ -135,6 +136,8 @@ static struct k_clock posix_clocks[MAX_CLOCKS];
 static DECLARE_BITMAP(clocks_map, MAX_CLOCKS);
 static DEFINE_MUTEX(clocks_mux); /* protects 'posix_clocks' and 'clocks_map' */
 
+static struct class *timesource_class;
+
 /*
  * These ones are defined below.
  */
@@ -271,20 +274,40 @@ static int posix_get_coarse_res(const clockid_t 
which_clock, struct timespec *tp
*tp = ktime_to_timespec(KTIME_LOW_RES);
return 0;
 }
+
+/*
+ * sysfs attributes
+ */
+
+static ssize_t show_clock_id(struct device *dev,
+struct device_attribute *attr, char *page)
+{
+   struct k_clock *kc = dev_get_drvdata(dev);
+   return snprintf(page, PAGE_SIZE-1, %d\n, kc-id);
+}
+
+static struct device_attribute timesource_dev_attrs[] = {
+   __ATTR(id,   0444, show_clock_id,   NULL

[PATCH 4/8] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
presented as a standard POSIX clock.

The ancillary clock features are exposed in two different ways, via
the sysfs and by a character device.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ABI/testing/sysfs-ptp |  107 ++
 Documentation/ptp/ptp.txt   |   94 +
 Documentation/ptp/testptp.c |  358 
 Documentation/ptp/testptp.mk|   33 +++
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/ptp/Kconfig |   27 +++
 drivers/ptp/Makefile|6 +
 drivers/ptp/ptp_chardev.c   |  178 
 drivers/ptp/ptp_clock.c |  382 +++
 drivers/ptp/ptp_private.h   |   64 ++
 drivers/ptp/ptp_sysfs.c |  235 +
 include/linux/Kbuild|1 +
 include/linux/ptp_clock.h   |   79 +++
 include/linux/ptp_clock_kernel.h|  139 +
 15 files changed, 1706 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-ptp
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_chardev.c
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 drivers/ptp/ptp_private.h
 create mode 100644 drivers/ptp/ptp_sysfs.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ABI/testing/sysfs-ptp 
b/Documentation/ABI/testing/sysfs-ptp
new file mode 100644
index 000..47142ce
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-ptp
@@ -0,0 +1,107 @@
+What:  /sys/class/ptp/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains files and directories
+   providing a standardized interface to the ancillary
+   features of PTP hardware clocks.
+
+What:  /sys/class/ptp/ptpN/
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This directory contains the attributes of the Nth PTP
+   hardware clock registered into the PTP class driver
+   subsystem.
+
+What:  /sys/class/ptp/ptpN/clock_id
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the POSIX clock ID (a non-negative
+   integer) corresponding to the PTP hardware clock. This
+   value may be passed as the first argument to the POSIX
+   clock and timer system calls. See man CLOCK_GETRES(2)
+   and TIMER_CREATE(2).
+
+What:  /sys/class/ptp/ptpN/clock_name
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the name of the PTP hardware clock
+   as a human readable string.
+
+What:  /sys/class/ptp/ptpN/max_adjustment
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the PTP hardware clock's maximum
+   frequency adjustment value (a positive integer) in
+   parts per billion.
+
+What:  /sys/class/ptp/ptpN/n_alarms
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of periodic or one shot
+   alarms offer by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_external_timestamps
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of external timestamp
+   channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/n_periodic_outputs
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file contains the number of programmable periodic
+   output channels offered by the PTP hardware clock.
+
+What:  /sys/class/ptp/ptpN/pps_avaiable
+Date:  September 2010
+Contact:   Richard Cochran richardcoch...@gmail.com
+Description:
+   This file indicates whether the PTP hardware clock
+   supports a Pulse Per Second to the host CPU. Reading
+   1 means that the PPS is supported, while 0 means
+   not supported

[PATCH 5/8] ptp: Added a simulated PTP hardware clock.

[Richard Cochran]

This patch adds a driver that simulates a PTP hardware clock. The
driver serves as a simple example for writing real clock driver and
can be used for testing the PTP clock API.

The basic clock operations are implemented using the system clock,
and the ancillary clock operations are simulated.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/ptp/Kconfig |   14 
 drivers/ptp/Makefile|1 +
 drivers/ptp/ptp_linux.c |  165 +++
 kernel/time/ntp.c   |2 +
 4 files changed, 182 insertions(+), 0 deletions(-)
 create mode 100644 drivers/ptp/ptp_linux.c

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index 17be208..94f329f 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -24,4 +24,18 @@ config PTP_1588_CLOCK
  To compile this driver as a module, choose M here: the module
  will be called ptp.
 
+config PTP_1588_CLOCK_LINUX
+   tristate Simulated PTP clock
+   depends on PTP_1588_CLOCK
+   help
+ This driver adds support for a simulated PTP clock. It
+ implements the basic clock operations by using the standard
+ Linux system time. The driver simulates the ancillary clock
+ operations. This clock can be used to test PTP programs
+ provided they use software time stamps for the PTP Ethernet
+ packets.
+
+ To compile this driver as a module, choose M here: the module
+ will be called ptp_linux.
+
 endmenu
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index 480e2af..266d4f2 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -4,3 +4,4 @@
 
 ptp-y  := ptp_clock.o ptp_chardev.o ptp_sysfs.o
 obj-$(CONFIG_PTP_1588_CLOCK)   += ptp.o
+obj-$(CONFIG_PTP_1588_CLOCK_LINUX) += ptp_linux.o
diff --git a/drivers/ptp/ptp_linux.c b/drivers/ptp/ptp_linux.c
new file mode 100644
index 000..57b3da4
--- /dev/null
+++ b/drivers/ptp/ptp_linux.c
@@ -0,0 +1,165 @@
+/*
+ * PTP 1588 clock using the Linux system clock
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/device.h
+#include linux/err.h
+#include linux/hrtimer.h
+#include linux/init.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/timex.h
+
+#include linux/ptp_clock_kernel.h
+
+static struct ptp_clock *linux_clock;
+
+DEFINE_SPINLOCK(adjtime_lock);
+
+static int ptp_linux_adjfreq(void *priv, s32 ppb)
+{
+   struct timex txc;
+   s64 tmp = ppb;
+   int err;
+   pr_debug(ptp_linux: adjfreq ppb=%d\n, ppb);
+   txc.freq = div_s64(tmp16, 1000);
+   txc.modes = ADJ_FREQUENCY;
+   err = do_adjtimex(txc);
+   return err  0 ? err : 0;
+}
+
+static int ptp_linux_adjtime(void *priv, struct timespec *ts)
+{
+   s64 delta;
+   ktime_t now;
+   struct timespec t2;
+   unsigned long flags;
+   int err;
+
+   delta = 10LL * ts-tv_sec + ts-tv_nsec;
+
+   spin_lock_irqsave(adjtime_lock, flags);
+
+   now = ktime_get_real();
+
+   now = delta  0 ? ktime_sub_ns(now, -delta) : ktime_add_ns(now, delta);
+
+   t2 = ktime_to_timespec(now);
+
+   err = do_settimeofday(t2);
+
+   spin_unlock_irqrestore(adjtime_lock, flags);
+
+   return err;
+}
+
+static int ptp_linux_gettime(void *priv, struct timespec *ts)
+{
+   getnstimeofday(ts);
+   return 0;
+}
+
+static int ptp_linux_settime(void *priv, struct timespec *ts)
+{
+   return do_settimeofday(ts);
+}
+
+#define sim(x...) pr_warn(ptp_linux simulation:  x)
+
+static int ptp_linux_enable(void *priv, struct ptp_clock_request *rq, int on)
+{
+   struct ptp_clock_event event;
+   ktime_t kt;
+   int i;
+
+   switch (rq-type) {
+
+   case PTP_CLK_REQ_EXTTS:
+   if (on) {
+   sim(enable external timestamped events\n);
+   for (i = 0; i  100; i++) {
+   kt = ktime_get_real();
+   event.type = PTP_CLOCK_EXTTS;
+   event.index = 0;
+   event.timestamp = ktime_to_ns(kt);
+   ptp_clock_event(linux_clock, event

[PATCH 6/8] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps, one alarm, and the PPS callback.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/powerpc/dts-bindings/fsl/tsec.txt |   57 +++
 arch/powerpc/boot/dts/mpc8313erdb.dts   |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts |   14 +
 arch/powerpc/boot/dts/p2020ds.dts   |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts  |   14 +
 drivers/net/Makefile|1 +
 drivers/net/gianfar_ptp.c   |  447 +++
 drivers/net/gianfar_ptp_reg.h   |  113 ++
 drivers/ptp/Kconfig |   13 +
 9 files changed, 687 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/gianfar_ptp_reg.h

diff --git a/Documentation/powerpc/dts-bindings/fsl/tsec.txt 
b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
index edb7ae1..f6edbb8 100644
--- a/Documentation/powerpc/dts-bindings/fsl/tsec.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
@@ -74,3 +74,60 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - tclk-period  Timer reference clock period in nanoseconds.
+  - tmr-prsc Prescaler, divides the output clock.
+  - tmr-add  Frequency compensation value.
+  - cksel0= external clock, 1= eTSEC system clock, 3= RTC clock input.
+ Currently the driver only supports choice 1.
+  - tmr-fiper1   Fixed interval period pulse generator.
+  - tmr-fiper2   Fixed interval period pulse generator.
+  - max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_cl...@24e00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..85a7eaa 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,20 @@
sleep = pmc 0x0030;
};
 
+   ptp_cl...@24e00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
+
enet0: ether...@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..74208cd 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,20 @@
};
};
 
+   ptp_cl...@24e00 {
+   compatible

[PATCH 7/8] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  191 ++
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  345 +
 5 files changed, 628 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..729a6b2
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 Ch_Control; /* 0x40 Time Synchronization Channel Control */
+   u32 Ch_Event;   /* 0x44 Time Synchronization Channel Event */
+   u32 TxSnapLo;   /* 0x48 Transmit Snapshot Low Register */
+   u32 TxSnapHi;   /* 0x4C Transmit Snapshot High Register */
+   u32 RxSnapLo;   /* 0x50 Receive Snapshot Low Register */
+   u32 RxSnapHi;   /* 0x54 Receive Snapshot High Register */
+   u32 SrcUUIDLo;  /* 0x58 Source UUID0 Low Register */
+   u32 SrcUUIDHi;  /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 Control; /* 0x00 Time Sync Control Register */
+   u32 Event;   /* 0x04 Time Sync Event Register */
+   u32 Addend;  /* 0x08 Time Sync Addend Register */
+   u32 Accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 Test;/* 0x10 Time Sync Test Register */
+   u32 Unused;  /* 0x14 */
+   u32 RSysTime_Lo; /* 0x18 RawSystemTime_Low Register */
+   u32 RSysTimeHi;  /* 0x1C RawSystemTime_High Register */
+   u32 SysTimeLo;   /* 0x20 SystemTime_Low Register */
+   u32 SysTimeHi;   /* 0x24 SystemTime_High Register */
+   u32 TrgtLo;  /* 0x28 TargetTime_Low Register */
+   u32 TrgtHi;  /* 0x2C TargetTime_High Register */
+   u32 ASMSLo;  /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 ASMSHi;  /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 AMMSLo;  /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 AMMSHi;  /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 6028226..eaff9dd 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,14 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)1
+/*
+ * PHYSICAL_ID(p-id) ?
+ * TODO - Figure out correct mapping.
+ */
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +182,8 @@ struct port {
int id

[PATCH 8/8] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Kconfig   |   29 ++
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c |  887 +
 drivers/net/phy/dp83640_reg.h |  261 
 4 files changed, 1178 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index eb799b3..2e6463d 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -77,6 +77,35 @@ config NATIONAL_PHY
---help---
  Currently supports the DP83865 PHY.
 
+config DP83640_PHY
+   tristate Driver for the National Semiconductor DP83640 PHYTER
+   depends on PTP_1588_CLOCK
+   depends on NETWORK_PHY_TIMESTAMPING
+   ---help---
+ Supports the DP83640 PHYTER with IEEE 1588 features.
+
+ This driver adds support for using the DP83640 as a PTP
+ clock. This clock is only useful if your PTP programs are
+ getting hardware time stamps on the PTP Ethernet packets
+ using the SO_TIMESTAMPING API.
+
+ In order for this to work, your MAC driver must also
+ implement the skb_tx_timetamp() function.
+
+config DP83640_PHY_STATUS_FRAMES
+   bool DP83640 Status Frames
+   default y
+   depends on DP83640_PHY
+   ---help---
+ This option allows the DP83640 PHYTER driver to obtain time
+ stamps from the PHY via special status frames, rather than
+ reading over the MDIO bus. Using status frames is therefore
+ more efficient. However, if enabled, this option will cause
+ the driver to add a mutlicast address to the MAC.
+
+ Say Y here, unless your MAC does not support multicast
+ destination addresses.
+
 config STE10XP
depends on PHYLIB
tristate Driver for STMicroelectronics STe10Xp PHYs
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..4cabd0d
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,887 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#ifdef CONFIG_DP83640_PHY_STATUS_FRAMES
+#define USE_STATUS_FRAMES
+#endif
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Tue, Sep 21, 2010 at 04:47:45PM -0400, Kyle Moffett wrote:
 Well how about something much more straightforward:

I am about to post another patch set for discussion, so please comment
on it when it appears.

Thanks,
Richard
___
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Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Fri, Aug 27, 2010 at 03:30:39PM -0700, John Stultz wrote:
 On Fri, 2010-08-27 at 14:38 +0200, Richard Cochran wrote:
  We have not introduced new PPS interface. We use existing PPS subsystem.
 
 Doesn't the pps subsystem have its own way to control the pps signal
 interrupt? I'm not totally sure here, but given your point above that
 having multiple pps events it seems like they should be selectable. It
 seems something that we'd want to control via the global pps interface,
 rather then having a pps-enable flag on every random bit of hardware
 that can support it.

The PPS subsystem offers no way to disable PPS interrupts. 

   Same for the timestamps and periodic output (ie: and how do they differ
   from reading or setting a timer on CLOCK_PTP?)
  
  The posix timer calls won't work:
  
  I have a PTP hardware clocks with multiple external timestamp
  channels. Using timer_gettime, how can I specify (or decode) the
  channel of interest to me?
 
 I guess I'm not following you here. Again, I'm not super familiar with
 the hardware involved. Could you clarify a bit more? What do you mean by
 external timestamp? Is this what is used on the packet timestamping? 

No, the packet timestamp occurs in the PHY, MAC, or on the MII bus and
is an essential feature to support the PTP.

An external timestamp is just a wire going into the clock and is an
optional feature to make the clock more useful. The clock can latch
the current time value when an edge is dectected on the wire. Using
external timestamps, you correlate real world events with the absolute
time in the clock.

Typically, a clock offers two or more such input channels (wires), but
timer_gettime does not offer a way to differentiate between them, and
thus is not suitable.

 The posix clock id interface is frustrating because the flat static
 enumeration is really limiting.
 
 I wonder if a dynamic enumeration for posix clocks would be possibly a
 way to go?

I am perfectly happy with this.

 In other words, a driver registers a clock with the system, and the
 system reserves a clock_id for it from the designated available pool and
 assigns it back. Then userland could query the driver via something like
 sysfs to get the clockid for the hardware. 
 
 Would that maybe work? 

I have now posted a sample implementation of this idea. Do you like it?

  The sysfs will include one class device for each PTP clock. Each clock
  has a sysfs attribute with the corresponding clock id.
 
 Do you mean the clock_id # in the posix clocks namespace?

Yes.

  I would also be happy with the character device idea already
  posted. Just pick one of the two, and I'll resubmit the patch set...
 
 Personally, with regard to exposing the ptp clock to userland I'm more
 comfortable via the chardev. However, the posix clocks/timer api is
 really close to what you need, so I'm not totally set against it. And
 maybe the dynamic enumeration would resolve my main problems with it?

Okay, I have posted a draft of the dynamic idea. Can you support it?

 That said, with the chardev method, I don't like the idea of duplicating
 the existing time apis via a systemtime device. Dropping that from your
 earlier patch would ease the majority of my objections.

Well, the clock interface needs to offer basic services:

1. Set time
2. Get time
3. Jump offset
4. Adjust frequency

This is similar to what the posix clock and ntp API offer. Using a
chardev, should I make the ioctls really different, just for the
purpose of being different?

To me, it makes more sense to offer a familiar interface.

I was perfectly happy with the chardev idea. In fact, that is the way
I first implemented it. Now, I have also gone ahead and implemented
the dynamic posix clock idea, too.

  At this point I would just like to go forward with one of the two
  proposed APIs. I had modelled the character device on the posix clock
  calls in order to make it immediately familar, and I think it is a
  viable approach. After the lkml discussion, I think it is even cleaner
  and nicer to just offer a new clock id.

I would like to repeat the sentiment in this last paragraph! I already
implemented and would be content with either form for the new clock
control API:

1. Character device
2. POSIX clock with dynamic ids

Please, just take your pick ;^)

Thanks,
Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Thu, Aug 26, 2010 at 06:57:49PM -0700, john stultz wrote:
 On Wed, 2010-08-25 at 11:40 +0200, Christian Riesch wrote:
  2) Master clock:
  We have one or more network ports. Our system has a really good clock
  (ovenized quartz crystal, an atomic clock, a GPS timing receiver...)
  and it distributes this time on the network. In such a case we do not
  steer our clock based on the (packet) timestamps we get from our
  timestamping unit. Instead, we directly drive our clock hardware with
  a very stable frequency that we get from the OCXO or the atomic
  clock...

 Ok. Following you here...

  or we use one of the ancillary features of the PTP clock that
  Richard mentioned to timestamp not network packets but a 1pps signal
  and use these timestamps to steer the clock.

 Wait.. I thought we weren't using PTP to steer the clock? But now we're
 using the pps signal from it to do so? Do I misunderstand you? Or did
 you just not mean this?

The master node in a PTP network probably takes its time from a
precise external time source, like GPS. The GPS provides a 1 PPS
directly to the PTP clock hardware, which latches the PTP hardware
clock time on the PPS edge. This provides one sample as input to a
clock servo (in the PTPd) that, in turn, regulates the PTP clock
hardware.

  Packet time stamping is
  used to distribute the time to the slaves, but it is not part of the
  control loop in this case.

 I assume here you mean PTPd is steering the PTP clock according to the
 system time (which is NTP/GPS/whatever sourced)? And then the PTP clock
 distributes that time through the network?

Yes, but in this case, system time has nothing to do with the Linux
system time. For a PTP master clock, it really doesn't matter whether
the Linux time is correct, or not. It doesn't hurt either (but see
below about chaining servos).

 So first of all, thanks for the extra explanation and context here! I
 really appreciate it, as I'm not familiar with all the hardware details
 and possible use cases, but I'm trying to learn.

 So in the two cases you mention, the time flow is something like:

 #1) [Master Clock on Network1] = [PTP Clock] = [PTPd] =
   [PTP Clock] = [PTP Clients on Network2]

I would only draw the PTP clock once, perhaps like this:

+--+
|  ^
V  |
[Master Clock on NW 1]---[HW timestamp]---[PTPd]--adj--[PTP Clock]
[Slaves on NW 2,3,...]---[HW timestamp]---[]


 #2) [GPS] = [NTPd] = [System Time] = [PTPd] = [PTP clock] =
   [PTP clients on Network]

Nope. More like this:

  +--+
  |  ^
  V  |
[GPS]--PPS-[Latch  timestamp]---[PTPd]--adj--[PTP Clock]
[Slaves on NW 1,2,3,...]---[HW pkt timestamp]---[]

 And the original case:
 #3) [Master Clock on Network] = [PTP clock] = [PTPd] = [PTP clock]

More like:

[Master Clock on NW 1]---[HW timestamp]---[PTPd]--adj--[PTP Clock]

 With a secondary control flow:
   [PPS signal from PTP clock] = [NTPd] = [System Time]

Yes.


 So, just brainstorming here, I guess the question I'm trying to figure
 out here, is can the System Time and PTP clock be merged/globbed
 into a single Time interface from the userspace point of view?

This is the core issue and source of misunderstanding, in my view. The
fact of the matter is, the current generation of computers has
multiple clocks, and these are usually unsynchronized. I think we
should not try too hard to cover up or work around this. It is a fact
of life.

It would be nice if there were only one clock, and that clock could do
everything that we need. Indeed, the next generation of SoC computers may
all have PTP build in to the main CPU. Well, one can always wish.

If we can make it appear that multiple clocks are just one clock, then
I agree that we should do it. But I would not want to sacrifice
synchronization accuracy or application features just to keep that
illusion.

 In other words, if internal to the kernel, the PTP clock was always
 synced to the system time, couldn't the flow look something like:

 #3') [Master clock on network] = [PTP clock] = [PTPd] =
[System Time] = [in-kernel sync thread] = [PTP clock]

 So PTPd sees the offset adjustment from the PTP clock, and then feeds
 that offset correction right into (a possibly enhanced) adjtimex. The
 kernel would then immediately steer the PTP clock by the same amount to
 keep it in sync with system time (along with a periodic offset/freq
 correction step to deal with crystal drift).

 Similarly:

 #2') [GPS] = [NTPd] = [System Time] = [in-kernel sync thread] =
   [PTP clock] = [PTP clients on Network]

 and

 #1') [Master Clock on Network1] = [PTP Clock] 

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Mon, Aug 23, 2010 at 01:21:39PM -0700, john stultz wrote:
 On Thu, 2010-08-19 at 17:38 +0200, Richard Cochran wrote:
  On Thu, Aug 19, 2010 at 02:28:04PM +0200, Arnd Bergmann wrote:
   My point was that a syscall is better than an ioctl based interface here,
   which I definitely still think. Given that John knows much more about
   clocks than I do, we still need to get agreement on the question that
   he raised, which is whether we actually need to expose this clock to the
   user or not.
   
   If we can find a way to sync system time accurate enough with PTP and
   PPS, user applications may not need to see two separate clocks at all.
  
  At the very least, one user application (the PTPd) needs to see the
  PTP clock.
  
SYSCALL_DEFINE3(clock_adjtime, const clockid_t, clkid,
int, ppb, struct timespec __user *, ts)

ppb - desired frequency adjustment in parts per billion
ts  - desired time step (or jump) in sec,nsec to correct
  a measured offset

Arguably, this syscall might be useful for other clocks, too.
   
   This is a mix of adjtime and adjtimex with the addition of
   the clkid parameter, right?
  
  Sort of, but not really. ADJTIME(3) takes an offset and slowly
  corrects the clock using a servo in the kernel, over hours.
  
  For this function, the offset passed in the 'ts' parameter will be
  immediately corrected, by jumping to the new time. This reflects the
  way that PTP works. After the first few samples, the PTPd has an
  estimate of the offset to the master and the rate difference. The PTPd
  can proceed in one of two ways.
  
  1. If resetting the clock is not desired, then the clock is set to the
 maximum adjustment (in the right direction) until the clock time is
 close to the master's time.
  
  2. The estimated offset is added to the current time, resulting in a
 jump in time.
  
  We need clock_adjtime(id, 0, ts) for the second case.
 
   Have you considered passing a struct timex instead of ppb and ts?
  
  Yes, but the timex is not suitable, IMHO.
 
 Could you expand on this?

We need to able to specify that the call is for a PTP clock. We could
add that to the modes flag, like this:

/*timex.h*/
#define ADJ_PTP_0 0x1
#define ADJ_PTP_1 0x2
#define ADJ_PTP_2 0x3
#define ADJ_PTP_3 0x4

I can live with this, if everyone else can, too.
 
 Could we not add a adjustment mode ADJ_SETOFFSET or something that would
 provide the instantaneous offset correction?

Yes, but we would also need to add a struct timespec to the struct
timex, in order to get nanosecond resolution. I think it would be
possible to do in the padding at the end?

 You're right that the timex is a little crufty. But its legacy that we
 will support indefinitely. So following the established interface helps
 maintainability.

We can use it for PTP, with the modifications suggested above. Or we
can just introduce the clock_adjtime method, instead.
 
 So if the clock_adjtime interface is needed, it would seem best for it
 to be generic enough to support not only PTP, but also the NTP kernel
 PLL.

For the proposed clock_adjime, what else is needed to support clock
adjustment in general?

I don't mind making the interface generic enough to support any
(realistic) conceivable clock adjustment scheme, but beyond the
present PTP hardware clocks, I don't know what else might be needed.

Richard


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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Mon, Aug 23, 2010 at 01:08:45PM -0700, john stultz wrote:
 On Thu, 2010-08-19 at 07:55 +0200, Richard Cochran wrote:
  The clockid_t CLOCK_PTP will be arch-neutral.
 
 Sure, but are they conceptually neutral? There are other clock
 synchronization algorithms out there. Will they need their own
 similar-but-different clock_ids?
 
 Look at the other clock ids and what the represent:

IMHO, the presently offered clock ids are a mixed bag...
 
 CLOCK_REALTIME : Wall time (possibly freq/offset corrected)
 CLOCK_MONOTONIC: Monotonic time (possibly freq corrected).
 CLOCK_PROCESS_CPUTIME_ID: Process cpu time.
 CLOCK_THREAD_CPUTIME_ID: Thread cpu time.

The amount of time a thread has been granted by the kernel is really
not connected to the real passage of time, at least not in a direct
way.

 CLOCK_MONOTONIC_RAW: Non freq corrected monotonic time.

This one comes from commit 2d42244ae71d6c7b0884b5664cf2eda30fb2ae68
and is surely a special case, unrelated to the other clock ids. The
commit message mentions that this was added to help the btime.sf.net
project. That project does not seem to have had any activity since
2007. If we can justify adding a clock id in this case, surely we can
add one for PTP as well!

 CLOCK_REALTIME_COARSE: Tick granular wall time (filesystem timestamp)
 CLOCK_MONOTONIC_COARSE: Tick granular monotonic time.

These were added in commit da15cfdae03351c689736f8d142618592e3cebc3
in order to fulfill needs of special applications.

 CLOCK_PTP that you're proposing doesn't seem to be at the same level of
 abstraction. I'm not saying that this isn't the right place for it, but
 can we take a step back from PTP and consider what your exposing in more
 generic terms. In other words, could someone use the same
 packet-timestamping hardware to implement a different non-PTP time
 synchronization algorithm?

Yes, of course. There is nothing at all in the patch set about the PTP
protocol itself. It just lets you access the hardware. In short:

1. SO_TIMESTAMPING delivers timestamped packets
2. the PTP API lets you tune the clock.

That's all, folks.

 Further, if we're using PTP to synchoronize the system time, then there
 shouldn't be any measurable difference between CLOCK_PTP and
 CLOCK_REALTIME, no?

When using software timestamping, then the clocks are one in the same.

When using PTP, with the PPS hook to synchoronize the Linux system
time, the clocks will be a close as the servo algorithm provides. I
have not measured this yet, but it cannot be much different than using
any other PPS source.

  SYSCALL_DEFINE3(clock_adjtime, const clockid_t, clkid,
  int, ppb, struct timespec __user *, ts)
  
  ppb - desired frequency adjustment in parts per billion
  ts  - desired time step (or jump) in sec,nsec to correct
a measured offset
  
  Arguably, this syscall might be useful for other clocks, too.
 
 So yea, obviously the syscall should not be CLOCK_PTP specific, so we
 would want it to be usable against CLOCK_REALTIME.
 
 That said, the clock_adjtime your proposing does not seem to be
 sufficient for usage by NTPd. So this suggests that it is not generic
 enough.

I don't think we need to support ntpd. It already has adjtimex, and it
won't get any better by using another interface.

  I think the ancillary features from PTP hardware clocks should be made
  available throught the sysfs. A syscall for these would end up very
  ugly, looking like an ioctl. Also, it is hard to see how these
  features relate to the more general idea of the clockid.
 
 This may be a good approach, but be aware that adding stuff to sysfs
 requires similar scrutiny as adding a syscall.  

Yes, it will be properly documented and maintained. I have already
implemented the ancillary stuff in two ways, via sysfs and with a
character device. The next patch set will include them both, and you
all can just choose which one to delete (or leave them both).

  In contrast, sysfs attributes will fit the need nicely:
  
  1. enable or disable pps
  2. enable or disable external timestamps
  3. read out external timestamp
  4. configure period for periodic output
 
 Things to consider here:
 Do having these options really make sense? 

Yes, since they represent the PTP clock's hardware features. As I
explained previously, if you don't have any hardware interfaces, then
having your clocks synchoronized to under 100 nanoseconds does not
help you more than having them to within 1 microsecond.

 Why would we want pps disabled?

If you are a master clock, then you want to take your PPS from an
external time source, like GPS.  If you leave the PTP PPS events on,
then they will occur close in time to the GPS PPS events and may add
unwanted latency to the interrupt handler.

 And if that does make sense, would it
 be better to do so via the existing pps interface instead of adding a
 new ptp specific one? 

We have not introduced new PPS interface. We use existing PPS subsystem.

 Same for the timestamps and periodic

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Fri, Aug 27, 2010 at 02:38:44PM +0100, Alan Cox wrote:
  2007. If we can justify adding a clock id in this case, surely we can
  add one for PTP as well!
 
 But PTP isn't really a clock - its a time sync protocol. You can (and may
 need to) have multiple clocks of this form on the same host because it's
 master based and you may have to deal with multiple masters who disagree.

Okay, I really meant for PTP hardware clocks. In general the
discussion is about supporting a kind of hardware and not about the
PTP network protocol. In fact, the hardware clocks and clock servo
loops are not at all part of the IEEE 1588 standard.

Sorry for causing confusion, but please understand a hardware clock
with timestamping capabilities than can be used for PTP support
whenever I wrote PTP or PTP clock.

Well, what I just said is not entirely true.

In fact, most of the current crop of PTP hardware clocks operate by
recognizing PTP network frames and timestamping them. One clock I know
of can timestamp every frame, but that seems to be the exception
rather than the rule. So, in theory they are just clocks, but actually
most are bound to the PTP protocol. That may change in the future...

  viable approach. After the lkml discussion, I think it is even cleaner
  and nicer to just offer a new clock id.
 
 PTP is not a clock, it's many clocks so a clock id doesn't really work.
 You could assume a single time domain and add a CLOCK_TAI plus then use
 PTP to track it I guess ?
 
 The question then is who would consume it and how ?
 
 Generic applications want POSIX time, which is managed by NTP but could
 in userspace also be slewed via the existing API to track a PTP source if
 someone wanted and if there is a GPS source around they can compute UTC
 from it.

Yes, and even without a GPS, the PTP protocol (this time I really do
mean the protocol!) does provide the UTC offset whenever it is known.

 Specialist applications will presumably need to know which time source or
 sources they are tracking and synchronizing too out of multiple potential
 PTP sources

Yes, the PTPd will have some special knowledge.

 Kernel stuff is more of a problem.
 
 I'm not sure shoehorning a source of many clocks and time sync bases into
 a jump up and down and make it fit single time assumption is wise. Making
 system time bimble track a source makes sense just as with NTP but making
 it a new clock seems the wrong model extending a non-too-bright API when
 you can just put the time sources in a file tree.

Don't get your meaning here, what did you mean by file tree?

Thanks,
Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Wed, Aug 18, 2010 at 05:02:03PM +0200, Arnd Bergmann wrote:
 You might want to use callbacks for these system calls that you
 can register to at module load time, like it is done for the
 existing syscalls.

Can you point me to a specific example?

 The simpler way (e.g. for testing) is using Kconfig dependencies, like
 
 config PTP
   bool IEEE 1588 Precision Time Protocol
 
 config PPS
   tristate Pulse per Second
   depends on PTP || !PTP
 
 The depends statement is a way of expressing that when PTP is enabled,
 PPS cannot be a module, while it may be a module if PTP is disabled.

THis did not work for me.

What I got was, in effect, two independent booleans.


Thanks,

Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Thu, Aug 19, 2010 at 02:28:04PM +0200, Arnd Bergmann wrote:
 My point was that a syscall is better than an ioctl based interface here,
 which I definitely still think. Given that John knows much more about
 clocks than I do, we still need to get agreement on the question that
 he raised, which is whether we actually need to expose this clock to the
 user or not.
 
 If we can find a way to sync system time accurate enough with PTP and
 PPS, user applications may not need to see two separate clocks at all.

At the very least, one user application (the PTPd) needs to see the
PTP clock.

  SYSCALL_DEFINE3(clock_adjtime, const clockid_t, clkid,
  int, ppb, struct timespec __user *, ts)
  
  ppb - desired frequency adjustment in parts per billion
  ts  - desired time step (or jump) in sec,nsec to correct
a measured offset
  
  Arguably, this syscall might be useful for other clocks, too.
 
 This is a mix of adjtime and adjtimex with the addition of
 the clkid parameter, right?

Sort of, but not really. ADJTIME(3) takes an offset and slowly
corrects the clock using a servo in the kernel, over hours.

For this function, the offset passed in the 'ts' parameter will be
immediately corrected, by jumping to the new time. This reflects the
way that PTP works. After the first few samples, the PTPd has an
estimate of the offset to the master and the rate difference. The PTPd
can proceed in one of two ways.

1. If resetting the clock is not desired, then the clock is set to the
   maximum adjustment (in the right direction) until the clock time is
   close to the master's time.

2. The estimated offset is added to the current time, resulting in a
   jump in time.

We need clock_adjtime(id, 0, ts) for the second case.

 Have you considered passing a struct timex instead of ppb and ts?

Yes, but the timex is not suitable, IMHO.

 Is using ppb instead of the timex ppm required to get the accuracy
 you want?

That is one very good reason.

Another is this: can you explain what the 20+ fields mean?

Consider the field, freq. The comment says frequency offset (scaled
ppm).  To what is it scaled? The only way I know of to find out is to
read the NTP code (which is fairly complex) and see what the unit
really is meant to be. Ditto for the other fields.

The timex structure reveals, AFAICT, the inner workings of the kernel
clock servo. For PTP, we don't need or want the kernel servo. The PTPd
has its own clock servo in user space.

Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Tue, Aug 17, 2010 at 05:22:43PM -0700, john stultz wrote:
 Why would system time not be adjusted to the PTP time?
 
 This is my main concern, that we're presenting a fractured API to
 userland. Suddenly there isn't just system time, but ptp time as well,
 and possibly multiple different ptp times.

John, it is a good thing to make thoughts about the big picture with
PTP clocks and the system time, like you are doing. However, the
situation is not as troubled as you think. Let me try to explain.

 The PTP clock is a bit of hardware (usually on the NIC) that can put
 timestamps on packets (both incoming or outgoing?).

Not only on the NIC. There are bunch of new products doing the
timestamping in the PHY or in a switch fabric attached to the host
like a PHY. The synchronization that one can achieve with PHY
timestamps is better that that with MAC timestamping.

 So while to me, it think it would be more ideal (or maybe just less
 different) to have a read-only interface (like the RTC), leaving PTPd to
 manage offset calculations and use that to steer the system time. I can
 acknowledge the need to have some way to correct the freq so the packet
 timestamps are corrected.

The PTPd need not change the system time at all for PTP clock to be
useful. (see below)

 I still feel a little concerned over the timer/alarm related interfaces.
 Could you explain why the alarm interface is necessary? 

The timer/alarm stuff is ancillary and is not at all necessary. It
is just a nice to have. I will happily remove it, if it is too
troubling for people.
 
 So really I think my initial negative gut reaction to this was mostly
 out of the fact that you introduced a char dev that provides almost 100%
 coverage of the posix-time interface. That is duplication we definitely
 don't want. 

The reason why I modelled the char device on the posix interface was
to make the API more familiar to application programmers. After the
recent discussion (and having reviewed the posix clock implementation
in Linux), I now think it would be even better to simply offer a new
posic clock ID for PTP.

I was emulating the posix interface. Instead I should use it directly.

 Also I think the documentation I've read about PTP (likely just due to
 the engineering focus) has an odd inverted sense of priority, focusing
 on keeping obscure hardware clocks on NIC cards in sync, rather then the
 the more tangible feature of keeping the system time in sync.
 
 This could be comically interpreted as trying to create a shadow-time on
 the system that is the real time and yea, maybe we'll let the system
 know what time it is, but user-apps who want to know the score can send
 a magic ioctl to /dev/something and get the real deal. ;)  I'm sure
 that's not the case, but I'd like to keep any confusion in userland
 about which time is the best time to a minimum (ie: use the system
 time).

You are right. As John Eidson's excellent book points out, modern
computers and operating systems provide surprisingly little support
for programming based on absolute time. It is not PTP's fault. PTP is
actually a step in the right direction, but it doesn't yet really fit
in to the present computing world.

Okay, here is the Big Picture.

1. Use Case: SW timestamping

   PTP with software timestamping (ie without special hardware) can
   acheive synchronization within a few dozen microseconds, after
   about twenty minutes. This is sufficient for very many people. The
   new API (whether char device or syscall) fully and simply supports
   this use case. When the PTPd adjusts the PTP clock, it is actually
   adjusting the system time, just like NTPd.

2. Use Case: HW timestamping for industrial control

   PTP with hardware timestamping can acheive synchronization within
   100 nanoseconds after one minute. If you want to do something with
   your wonderfully synchronization PTP clock, it must have some kind
   of special hardware, like timestamping external signals or
   generating one-shot or periodic outputs. The new API (whether char
   device or syscall) supports this use case via the ancillary
   commands.

   In this case, the end user has an application that interfaces with
   the outside world via the PTP clock API. Such a specialized
   application (for example, motor control) uses only the PTP API,
   since it knows that the standard posix API cannot help. It is
   irrelevant that the system time is not synchronized, in this case.

   The PTP clock hardware may or may not provide a hardware interface
   (interrupt) to the main CPU. In this case, it does not matter. The
   PTP clock is useful all by itself.

3. Use Case: HW timestamping with PPS to host

   This case is the same as case 2, with the exception that the PTP
   clock can interrupt the main CPU. The PTP clock driver advertises
   the PPS capability. When enabled, the PTP layer delivers events
   via the existing Linux PPS subsystem. Programs like NTPd can use
   these events to regulate the system 

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Tue, Aug 17, 2010 at 01:36:29PM +0200, Arnd Bergmann wrote:
 On Tuesday 17 August 2010, Richard Cochran wrote:
  I've been looking at offering the PTP clock as a posix clock, and it
  is not as hard as I first thought. The PTP clock or clocks just have
  to be registered as one of the posix_clocks[MAX_CLOCKS] in
  posix-timers.c.
 
 Ok sounds good.

I've been working turning the PTP stuff into syscalls, but here is a
little issue I ran into. The PTP clock layer wants to call the PPS
code via pps_register_source(), but the PPS can be compiled as a
module. Since the PTP layer is now offering syscalls, it must always
be present in the kernel. So I need to make sure that the PPS is
either absent entirely or staticly linked in.

How can I do this?

Thanks,

Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Wed, Aug 18, 2010 at 05:12:56PM -0700, john stultz wrote:
 On Wed, 2010-08-18 at 09:19 +0200, Richard Cochran wrote:
  The timer/alarm stuff is ancillary and is not at all necessary. It
  is just a nice to have. I will happily remove it, if it is too
  troubling for people.
 
 If there's a compelling argument for it, I'm interested to hear. But
 again, it seems like just
 yet-another-way-to-get-alarm/timer-functionality, so before we add an
 extra API (or widen an existing API) I'd like to understand the need.

We don't really need it, IMHO.

But if we offer clockid_t CLOCK_PTP, then we get timer_settime()
without any extra effort.

  I was emulating the posix interface. Instead I should use it directly.
 
 I'm definitely interested to see what you come up with here. I'm still
 hesitant with adding a PTP clock_id, but extending the posix-clocks
 interface in this way isn't unprecedented (see: CLOCK_SGI_CYCLE) I just
 would like to make sure we don't end up with a clock_id namespace
 littered with oddball clocks that were not well abstracted (see:
 CLOCK_SGI_CYCLE :).
 
 For instance: imagine if instead of keeping the clocksource abstraction
 internal to the timekeeping core, we exposed each clocksource to
 userland via a clock_id.  Every arch would have different ids, and each
 arch might have multiple ids. Programming against that would be a huge
 pain.

The clockid_t CLOCK_PTP will be arch-neutral.

 So in thinking about this, try to focus on what the new clock_id
 provides that the other existing clockids do not? Are they at comparable
 levels of abstraction? 15 years from now, are folks likely to still be
 using it? Will it be maintainable? etc...

Arnd convinced me that clockid_t=CLOCK_PTP is a good fit. My plan
would be to introduce just one additional syscall:

SYSCALL_DEFINE3(clock_adjtime, const clockid_t, clkid,
int, ppb, struct timespec __user *, ts)

ppb - desired frequency adjustment in parts per billion
ts  - desired time step (or jump) in sec,nsec to correct
  a measured offset

Arguably, this syscall might be useful for other clocks, too.

I think the ancillary features from PTP hardware clocks should be made
available throught the sysfs. A syscall for these would end up very
ugly, looking like an ioctl. Also, it is hard to see how these
features relate to the more general idea of the clockid.

In contrast, sysfs attributes will fit the need nicely:

1. enable or disable pps
2. enable or disable external timestamps
3. read out external timestamp
4. configure period for periodic output

  1. Use Case: SW timestamping
 The way I tend to see it: PTP is just one of the many ways to sync
 system time.

  2. Use Case: HW timestamping for industrial control
 These specialized applications are part of what concerns me the most. 

PTP was not invented to just to get a computer's system time in the
ball park. For that, NTP is good enough. Rather, some people want to
use their computers for tasks that require close synchronization, like
industrial control, audio/video streaming, and many others.

Are you saying that we should not support such applications?

 For example, I can see some parallels between things like audio
 processing, where you have a buffer consumed by the card at a certain
 rate. Now, the card has its own crystal it uses to time its consumption,
 so it has its own time domain, and could drift from system time. Thus
 you want to trigger buffer-refill interrupts off of the audio card's
 clock, not the system time which might run the risk of being late.
 
 But again, we don't expose the audio hardware clock to userland in the
 same way we expose system time.

This is a good example of the poverty (in regards to time
synchronization) of our current systems.

Lets say I want to build a surround sound audio system, using a set of
distributed computers, each host connected to one speaker. How I can
be sure that the samples in one channel (ie one host) pass through the
DA converter at exactly the same time?

 Again, my knowledge in the networking stack is pretty limited. But it
 would seem that having an interface that does something to the effect of
 adjust the timestamp clock on the hardware that generated it from this
 packet by Xppb would feel like the right level of abstraction. Its
 closely related to SO_TIMESTAMP, option right? Would something like
 using the setsockopt/getsockopt interface with
 SO_TIMESTAMP_ADJUST/OFFSET/SET/etc be reasonable?

The clock and its adjustment have nothing to do with a network
socket. The current PTP hacks floating around all add private ioctls
to the MAC driver. That is the *wrong* way to do it.

  3. Use Case: HW timestamping with PPS to host
...
 And yes, this seems perfectly reasonable feature to add. Its not
 controversial to me, because its likely to work within the existing
 interfaces and won't expose anything new to userland.

Okay, then will you support an elegant solution for case 3, that also
supports cases 1 and 2

Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Mon, Aug 16, 2010 at 09:59:39PM +0200, Arnd Bergmann wrote:
 Why does it matter how long it takes to read the clock? I wasn't thinking
 of replacing the system clock with this, just exposing the additional
 clock as a new clockid_t value that can be accessed using the existing
 syscalls.

Okay, now I see. You are suggesting this:

  clock_gettime(CLOCK_PTP, ts);
  clock_settime(CLOCK_PTP, ts);

I like this. If there is agreement about it, I am happy to implement
the PTP stuff that way.

 Why did you not want to add syscalls? Adding ioctls instead of syscalls
 does not make the interface better, just less visible.

I bet that, had I posted patch set with new syscalls, someone would
have said, You are adding new syscalls. Can't you just use a char
device instead!

If you add syscalls and introduce CLOCK_PTP, then you add it to
everyone's kernel, even those people who never heard of PTP. A char
device has the advantage that can it be simply ignored. Also, a
syscall has got to have the right form from the very beginning. If the
next generation of PTP hardware looks very different, then it is not
that much of a crime to change an ioctl interface, provided it has
versioning.

Richard

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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Mon, Aug 16, 2010 at 12:24:48PM -0700, john stultz wrote:
 3) I'm not sure I see the benefit of being able to have multiple
 frequency corrected time domains.  In other words, what benefit would
 you get from adjusting a PTP clock's frequency instead of just
 adjusting the system's time freq? Having the PTP time as a reference
 to correct the system time seems reasonable, but I'm not sure I see
 why userland would want to adjust the PTP clock's freq.

For PTP enabled hardware, the timestamp on the network packet comes
from from the PTP clock, not from the system time.

Of course, you can always just leave the PTP clock alone, figure the
needed correction, and apply it whenever needed. But this has some
disadvantages. First of all, the (one and only) open source PTPd does
not do it that way. Also, only one program (the PTPd or equivalent)
will know the correct time. Other programs will not be able to ask the
operating system for time services. Instead, they would need to use
IPC to the PTPd.

The PTP protocol (and some PTP hardware) offers a one step method,
where the timestamps are inserted by the hardware on the fly. Here you
really do need the PTP clock to be correctly adjusted.

All of the PTP hardware that I am familiar with provides a clock
adjustment method, so it simpler and cleaner just to use this facility
to tune the PTP clock.

Richard
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Re: [PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

On Tue, Aug 17, 2010 at 09:25:55AM +, Arnd Bergmann wrote:
 Another difference is that we generally use ioctl for devices that can
 be enumerated, while syscalls are for system services that are not tied to
 a specific device. This argument works both ways for PTP IMHO: On the one
 hand you want to have a reliable clock that you can use without knowing
 where it comes from, on the other you might have multiple PTP sources that
 you need to differentiate.

Yes, I agree. In normal use, there will be only one PTP clock in a
system. However, for research purposes, it would be nice to have more
than one.

I've been looking at offering the PTP clock as a posix clock, and it
is not as hard as I first thought. The PTP clock or clocks just have
to be registered as one of the posix_clocks[MAX_CLOCKS] in
posix-timers.c.

My suggestion would be to reserve three clock ids in time.h,
CLOCK_PTP0, CLOCK_PTP1, and CLOCK_PTP2. The first one would be the
same as CLOCK_REALTIME, for SW timestamping, and the other two would
allow two different PTP clocks at the same time, for the research use
case.

Using the clock id will bring another advantage, since it will then be
possible for user space to specify the desired timestamp source for
SO_TIMESTAMPING.

Richard
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[PATCH v5 0/5] ptp: IEEE 1588 clock support

[Richard Cochran]

Now and again there has been talk on the netdev list of adding PTP
support into Linux. One part of the picture is already in place, the
SO_TIMESTAMPING API for hardware time stamping. This patch set offers
the missing second part needed for complete IEEE 1588 support.

* Why all the CCs?

  1. IMHO, the patches should go through netdev.
  2. A reviewer on netdev said, this should appear on lkml.
  3. One driver is for PowerPC, and adds device tree stuff.
  4. One driver is for the ARM Xscale IXP465.

* Open Issues:

** DP83640
   In order to make this work, one line must be added into the MAC
   driver. If you have the DP83640 and want to try the driver, you
   need to add this one line to your MAC driver: In the
   .ndo_start_xmit function, add skb_tx_timestamp(skb).

** IXP465
   I do not know how to correctly choose the timestamp channel based
   on the port identifier:

+#define PORT2CHANNEL(p)1
+/*
+ * PHYSICAL_ID(p-id) ?
+ * TODO - Figure out correct mapping.
+ */

   Krzysztof, can you help?

* PTP Patch ChangeLog
** v5
*** general
   - Added a hook into the PPS subsystem
   - Corrected max_adj in all drivers
   - Removed unnecessary sysfs stuff
   - Replaced spinlock with mutex in class driver
*** gianfar
   - Added PPS support
   - Changed underscore to minus in device tree bindings
   - Use of_iomap instead of ioremap
*** ixp465
   - Added an external trigger event
   - Corrected in_progress logic
*** phyter
   - Added an external trigger event
   - Added support for phy status frames

** v4
*** general
   - Added a clock driver for the National Semiconductor PHYTER.
   - Added a clock driver for the Intel IXP465.
   - Made more stylish according to checkstyle.pl.
*** gianfar
   - Replace device_type and model with compatible string (fsl,etsec-ptp)
   - Register only one interrupt, since others are superfluous.
   - Combine ptp clock instance with private variable structure.
   - ISR now returns NONE or HANDLED properly.
   - Print error message if something is missing from the device nodes.

** v3
*** general
   - Added documentation on writing clock drivers.
   - Added the ioctls for the ancillary clock features.
   - Changed wrong subsys_initcall() to module_init() in clock drivers.
   - Removed the (too coarse) character device mutex.
   - Setting the clock now requires CAP_SYS_TIME.
*** gianfar
   - Added alarm feature.
   - Added device tree node binding description.
   - Added fine grain locking of the clock registers.
   - Added the external time stamp feature.
   - Added white space for better style.
   - Coverted base+offset to structure pointers for register access.
   - When removing the driver, we now disable all PTP functions.

** v2
   - Changed clock list from a static array into a dynamic list. Also,
 use a bitmap to manage the clock's minor numbers.
   - Replaced character device semaphore with a mutex.
   - Drop .ko from module names in Kbuild help.
   - Replace deprecated unifdef-y with header-y for user space header file.
   - Added links to both of the ptpd patches on sourceforge.
   - Gianfar driver now gets parameters from device tree.
   - Added API documentation to Documentation/ptp/ptp.txt


Richard Cochran (5):
  ptp: Added a brand new class driver for ptp clocks.
  ptp: Added a clock that uses the Linux system time.
  ptp: Added a clock that uses the eTSEC found on the MPC85xx.
  ptp: Added a clock driver for the IXP46x.
  ptp: Added a clock driver for the National Semiconductor PHYTER.

 Documentation/powerpc/dts-bindings/fsl/tsec.txt |   57 ++
 Documentation/ptp/ptp.txt   |   95 +++
 Documentation/ptp/testptp.c |  306 
 Documentation/ptp/testptp.mk|   33 +
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h   |   78 ++
 arch/powerpc/boot/dts/mpc8313erdb.dts   |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts |   14 +
 arch/powerpc/boot/dts/p2020ds.dts   |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts  |   14 +
 drivers/Kconfig |2 +
 drivers/Makefile|1 +
 drivers/net/Makefile|1 +
 drivers/net/arm/ixp4xx_eth.c|  191 +
 drivers/net/gianfar_ptp.c   |  527 +
 drivers/net/gianfar_ptp_reg.h   |  113 +++
 drivers/net/phy/Kconfig |   29 +
 drivers/net/phy/Makefile|1 +
 drivers/net/phy/dp83640.c   |  904 +++
 drivers/net/phy/dp83640_reg.h   |  261 +++
 drivers/ptp/Kconfig |   65 ++
 drivers/ptp/Makefile|7 +
 drivers/ptp/ptp_clock.c |  514 +
 drivers/ptp/ptp_ixp46x.c|  359 +
 drivers/ptp/ptp_linux.c |  136 
 include/linux

[PATCH 1/5] ptp: Added a brand new class driver for ptp clocks.

[Richard Cochran]

This patch adds an infrastructure for hardware clocks that implement
IEEE 1588, the Precision Time Protocol (PTP). A class driver offers a
registration method to particular hardware clock drivers. Each clock is
exposed to user space as a character device with ioctls that allow tuning
of the PTP clock.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/ptp/ptp.txt|   95 +++
 Documentation/ptp/testptp.c  |  306 ++
 Documentation/ptp/testptp.mk |   33 +++
 drivers/Kconfig  |2 +
 drivers/Makefile |1 +
 drivers/ptp/Kconfig  |   27 ++
 drivers/ptp/Makefile |5 +
 drivers/ptp/ptp_clock.c  |  514 ++
 include/linux/Kbuild |1 +
 include/linux/ptp_clock.h|   79 ++
 include/linux/ptp_clock_kernel.h |  137 ++
 11 files changed, 1200 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/ptp/ptp.txt
 create mode 100644 Documentation/ptp/testptp.c
 create mode 100644 Documentation/ptp/testptp.mk
 create mode 100644 drivers/ptp/Kconfig
 create mode 100644 drivers/ptp/Makefile
 create mode 100644 drivers/ptp/ptp_clock.c
 create mode 100644 include/linux/ptp_clock.h
 create mode 100644 include/linux/ptp_clock_kernel.h

diff --git a/Documentation/ptp/ptp.txt b/Documentation/ptp/ptp.txt
new file mode 100644
index 000..46858b3
--- /dev/null
+++ b/Documentation/ptp/ptp.txt
@@ -0,0 +1,95 @@
+
+* PTP infrastructure for Linux
+
+  This patch set introduces support for IEEE 1588 PTP clocks in
+  Linux. Together with the SO_TIMESTAMPING socket options, this
+  presents a standardized method for developing PTP user space
+  programs, synchronizing Linux with external clocks, and using the
+  ancillary features of PTP hardware clocks.
+
+  A new class driver exports a kernel interface for specific clock
+  drivers and a user space interface. The infrastructure supports a
+  complete set of PTP functionality.
+
+  + Basic clock operations
+- Set time
+- Get time
+- Shift the clock by a given offset atomically
+- Adjust clock frequency
+
+  + Ancillary clock features
+- One short or periodic alarms, with signal delivery to user program
+- Time stamp external events
+- Period output signals configurable from user space
+- Synchronization of the Linux system time via the PPS subsystem
+
+** PTP kernel API
+
+   A PTP clock driver registers itself with the class driver. The
+   class driver handles all of the dealings with user space. The
+   author of a clock driver need only implement the details of
+   programming the clock hardware. The clock driver notifies the class
+   driver of asynchronous events (alarms and external time stamps) via
+   a simple message passing interface.
+
+   The class driver supports multiple PTP clock drivers. In normal use
+   cases, only one PTP clock is needed. However, for testing and
+   development, it can be useful to have more than one clock in a
+   single system, in order to allow performance comparisons.
+
+** PTP user space API
+
+   The class driver creates a character device for each registered PTP
+   clock. User space programs may control the clock using standardized
+   ioctls. A program may query, enable, configure, and disable the
+   ancillary clock features. User space can receive time stamped
+   events via blocking read() and poll(). One shot and periodic
+   signals may be configured via an ioctl API with semantics similar
+   to the POSIX timer_settime() system call.
+
+   As an real life example, the following two patches for ptpd version
+   1.0.0 demonstrate how the API works.
+
+   
https://sourceforge.net/tracker/?func=detailaid=2992845group_id=139814atid=744634
+
+   
https://sourceforge.net/tracker/?func=detailaid=2992847group_id=139814atid=744634
+
+** Writing clock drivers
+
+   Clock drivers include include/linux/ptp_clock_kernel.h and register
+   themselves by presenting a 'struct ptp_clock_info' to the
+   registration method. Clock drivers must implement all of the
+   functions in the interface. If a clock does not offer a particular
+   ancillary feature, then the driver should just return -EOPNOTSUPP
+   from those functions.
+
+   Drivers must ensure that all of the methods in interface are
+   reentrant. Since most hardware implementations treat the time value
+   as a 64 bit integer accessed as two 32 bit registers, drivers
+   should use spin_lock_irqsave/spin_unlock_irqrestore to protect
+   against concurrent access. This locking cannot be accomplished in
+   class driver, since the lock may also be needed by the clock
+   driver's interrupt service routine.
+
+** Supported hardware
+
+   + Standard Linux system timer
+ - No special PTP features
+ - For use with software time stamping
+
+   + Freescale eTSEC gianfar
+ - 2 Time stamp external triggers, programmable polarity (opt. interrupt

[PATCH 2/5] ptp: Added a clock that uses the Linux system time.

[Richard Cochran]

This PTP clock simply uses the NTP time adjustment system calls. The
driver can be used in systems that lack a special hardware PTP clock.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/ptp/Kconfig |   12 
 drivers/ptp/Makefile|1 +
 drivers/ptp/ptp_linux.c |  136 +++
 kernel/time/ntp.c   |2 +
 4 files changed, 151 insertions(+), 0 deletions(-)
 create mode 100644 drivers/ptp/ptp_linux.c

diff --git a/drivers/ptp/Kconfig b/drivers/ptp/Kconfig
index cd7becb..3aa517a 100644
--- a/drivers/ptp/Kconfig
+++ b/drivers/ptp/Kconfig
@@ -24,4 +24,16 @@ config PTP_1588_CLOCK
  To compile this driver as a module, choose M here: the module
  will be called ptp_clock.
 
+config PTP_1588_CLOCK_LINUX
+   tristate Linux system timer as PTP clock
+   depends on PTP_1588_CLOCK
+   help
+ This driver adds support for using the standard Linux time
+ source as a PTP clock. This clock is only useful if your PTP
+ programs are using software time stamps for the PTP Ethernet
+ packets.
+
+ To compile this driver as a module, choose M here: the module
+ will be called ptp_linux.
+
 endmenu
diff --git a/drivers/ptp/Makefile b/drivers/ptp/Makefile
index b86695c..1651d52 100644
--- a/drivers/ptp/Makefile
+++ b/drivers/ptp/Makefile
@@ -3,3 +3,4 @@
 #
 
 obj-$(CONFIG_PTP_1588_CLOCK)   += ptp_clock.o
+obj-$(CONFIG_PTP_1588_CLOCK_LINUX) += ptp_linux.o
diff --git a/drivers/ptp/ptp_linux.c b/drivers/ptp/ptp_linux.c
new file mode 100644
index 000..f93ae0c
--- /dev/null
+++ b/drivers/ptp/ptp_linux.c
@@ -0,0 +1,136 @@
+/*
+ * PTP 1588 clock using the Linux system clock
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/device.h
+#include linux/err.h
+#include linux/hrtimer.h
+#include linux/init.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/timex.h
+
+#include linux/ptp_clock_kernel.h
+
+static struct ptp_clock *linux_clock;
+
+DEFINE_SPINLOCK(adjtime_lock);
+
+static int ptp_linux_adjfreq(void *priv, s32 delta)
+{
+   struct timex txc;
+   s64 tmp = delta;
+   int err;
+   txc.freq = div_s64(tmp16, 1000);
+   txc.modes = ADJ_FREQUENCY;
+   err = do_adjtimex(txc);
+   return err  0 ? err : 0;
+}
+
+static int ptp_linux_adjtime(void *priv, struct timespec *ts)
+{
+   s64 delta;
+   ktime_t now;
+   struct timespec t2;
+   unsigned long flags;
+   int err;
+
+   delta = 10LL * ts-tv_sec + ts-tv_nsec;
+
+   spin_lock_irqsave(adjtime_lock, flags);
+
+   now = ktime_get_real();
+
+   now = delta  0 ? ktime_sub_ns(now, -delta) : ktime_add_ns(now, delta);
+
+   t2 = ktime_to_timespec(now);
+
+   err = do_settimeofday(t2);
+
+   spin_unlock_irqrestore(adjtime_lock, flags);
+
+   return err;
+}
+
+static int ptp_linux_gettime(void *priv, struct timespec *ts)
+{
+   getnstimeofday(ts);
+   return 0;
+}
+
+static int ptp_linux_settime(void *priv, struct timespec *ts)
+{
+   return do_settimeofday(ts);
+}
+
+static int ptp_linux_gettimer(void *priv, int index, struct itimerspec *ts)
+{
+   /* We do not offer any ancillary features at all. */
+   return -EOPNOTSUPP;
+}
+
+static int ptp_linux_settimer(void *p, int i, int abs, struct itimerspec *ts)
+{
+   /* We do not offer any ancillary features at all. */
+   return -EOPNOTSUPP;
+}
+
+static int ptp_linux_enable(void *priv, struct ptp_clock_request *rq, int on)
+{
+   /* We do not offer any ancillary features at all. */
+   return -EOPNOTSUPP;
+}
+
+static struct ptp_clock_info ptp_linux_caps = {
+   .owner  = THIS_MODULE,
+   .name   = Linux timer,
+   .max_adj= 512000,
+   .n_alarm= 0,
+   .n_ext_ts   = 0,
+   .n_per_out  = 0,
+   .pps= 0,
+   .priv   = NULL,
+   .adjfreq= ptp_linux_adjfreq,
+   .adjtime= ptp_linux_adjtime,
+   .gettime= ptp_linux_gettime,
+   .settime= ptp_linux_settime,
+   .gettimer   = ptp_linux_gettimer,
+   .settimer   = ptp_linux_settimer,
+   .enable

[PATCH 3/5] ptp: Added a clock that uses the eTSEC found on the MPC85xx.

[Richard Cochran]

The eTSEC includes a PTP clock with quite a few features. This patch adds
support for the basic clock adjustment functions, plus two external time
stamps and one alarm.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 Documentation/powerpc/dts-bindings/fsl/tsec.txt |   57 +++
 arch/powerpc/boot/dts/mpc8313erdb.dts   |   14 +
 arch/powerpc/boot/dts/mpc8572ds.dts |   14 +
 arch/powerpc/boot/dts/p2020ds.dts   |   14 +
 arch/powerpc/boot/dts/p2020rdb.dts  |   14 +
 drivers/net/Makefile|1 +
 drivers/net/gianfar_ptp.c   |  527 +++
 drivers/net/gianfar_ptp_reg.h   |  113 +
 drivers/ptp/Kconfig |   13 +
 9 files changed, 767 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/gianfar_ptp.c
 create mode 100644 drivers/net/gianfar_ptp_reg.h

diff --git a/Documentation/powerpc/dts-bindings/fsl/tsec.txt 
b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
index edb7ae1..f6edbb8 100644
--- a/Documentation/powerpc/dts-bindings/fsl/tsec.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
@@ -74,3 +74,60 @@ Example:
interrupt-parent = mpic;
phy-handle = phy0
};
+
+* Gianfar PTP clock nodes
+
+General Properties:
+
+  - compatible   Should be fsl,etsec-ptp
+  - reg  Offset and length of the register set for the device
+  - interrupts   There should be at least two interrupts. Some devices
+ have as many as four PTP related interrupts.
+
+Clock Properties:
+
+  - tclk-period  Timer reference clock period in nanoseconds.
+  - tmr-prsc Prescaler, divides the output clock.
+  - tmr-add  Frequency compensation value.
+  - cksel0= external clock, 1= eTSEC system clock, 3= RTC clock input.
+ Currently the driver only supports choice 1.
+  - tmr-fiper1   Fixed interval period pulse generator.
+  - tmr-fiper2   Fixed interval period pulse generator.
+  - max-adj  Maximum frequency adjustment in parts per billion.
+
+  These properties set the operational parameters for the PTP
+  clock. You must choose these carefully for the clock to work right.
+  Here is how to figure good values:
+
+  TimerOsc = system clock   MHz
+  tclk_period  = desired clock period   nanoseconds
+  NominalFreq  = 1000 / tclk_period MHz
+  FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
+  tmr_add  = ceil(2^32 / FreqDivRatio)
+  OutputClock  = NominalFreq / tmr_prsc MHz
+  PulseWidth   = 1 / OutputClockmicroseconds
+  FiperFreq1   = desired frequency in Hz
+  FiperDiv1= 100 * OutputClock / FiperFreq1
+  tmr_fiper1   = tmr_prsc * tclk_period * FiperDiv1 - tclk_period
+  max_adj  = 10 * (FreqDivRatio - 1.0) - 1
+
+  The calculation for tmr_fiper2 is the same as for tmr_fiper1. The
+  driver expects that tmr_fiper1 will be correctly set to produce a 1
+  Pulse Per Second (PPS) signal, since this will be offered to the PPS
+  subsystem to synchronize the Linux clock.
+
+Example:
+
+   ptp_cl...@24e00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts 
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 183f2aa..85a7eaa 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -208,6 +208,20 @@
sleep = pmc 0x0030;
};
 
+   ptp_cl...@24e00 {
+   compatible = fsl,etsec-ptp;
+   reg = 0x24E00 0xB0;
+   interrupts = 12 0x8 13 0x8;
+   interrupt-parent =  ipic ;
+   tclk-period = 10;
+   tmr-prsc= 100;
+   tmr-add = 0x99A4;
+   cksel   = 0x1;
+   tmr-fiper1  = 0x3B9AC9F6;
+   tmr-fiper2  = 0x00018696;
+   max-adj = 65998;
+   };
+
enet0: ether...@24000 {
#address-cells = 1;
#size-cells = 1;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts 
b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc128..74208cd 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,20 @@
};
};
 
+   ptp_cl...@24e00 {
+   compatible = fsl,etsec-ptp

[PATCH 4/5] ptp: Added a clock driver for the IXP46x.

[Richard Cochran]

This patch adds a driver for the hardware time stamping unit found on the
IXP465. The basic clock operations and an external trigger are implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h |   78 ++
 drivers/net/arm/ixp4xx_eth.c  |  191 +
 drivers/ptp/Kconfig   |   13 +
 drivers/ptp/Makefile  |1 +
 drivers/ptp/ptp_ixp46x.c  |  359 +
 5 files changed, 642 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
 create mode 100644 drivers/ptp/ptp_ixp46x.c

diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h 
b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
new file mode 100644
index 000..729a6b2
--- /dev/null
+++ b/arch/arm/mach-ixp4xx/include/mach/ixp46x_ts.h
@@ -0,0 +1,78 @@
+/*
+ * PTP 1588 clock using the IXP46X
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IXP46X_TS_H_
+#define _IXP46X_TS_H_
+
+#define DEFAULT_ADDEND 0xF029
+#define TICKS_NS_SHIFT 4
+
+struct ixp46x_channel_ctl {
+   u32 Ch_Control; /* 0x40 Time Synchronization Channel Control */
+   u32 Ch_Event;   /* 0x44 Time Synchronization Channel Event */
+   u32 TxSnapLo;   /* 0x48 Transmit Snapshot Low Register */
+   u32 TxSnapHi;   /* 0x4C Transmit Snapshot High Register */
+   u32 RxSnapLo;   /* 0x50 Receive Snapshot Low Register */
+   u32 RxSnapHi;   /* 0x54 Receive Snapshot High Register */
+   u32 SrcUUIDLo;  /* 0x58 Source UUID0 Low Register */
+   u32 SrcUUIDHi;  /* 0x5C Sequence Identifier/Source UUID0 High */
+};
+
+struct ixp46x_ts_regs {
+   u32 Control; /* 0x00 Time Sync Control Register */
+   u32 Event;   /* 0x04 Time Sync Event Register */
+   u32 Addend;  /* 0x08 Time Sync Addend Register */
+   u32 Accum;   /* 0x0C Time Sync Accumulator Register */
+   u32 Test;/* 0x10 Time Sync Test Register */
+   u32 Unused;  /* 0x14 */
+   u32 RSysTime_Lo; /* 0x18 RawSystemTime_Low Register */
+   u32 RSysTimeHi;  /* 0x1C RawSystemTime_High Register */
+   u32 SysTimeLo;   /* 0x20 SystemTime_Low Register */
+   u32 SysTimeHi;   /* 0x24 SystemTime_High Register */
+   u32 TrgtLo;  /* 0x28 TargetTime_Low Register */
+   u32 TrgtHi;  /* 0x2C TargetTime_High Register */
+   u32 ASMSLo;  /* 0x30 Auxiliary Slave Mode Snapshot Low  */
+   u32 ASMSHi;  /* 0x34 Auxiliary Slave Mode Snapshot High */
+   u32 AMMSLo;  /* 0x38 Auxiliary Master Mode Snapshot Low */
+   u32 AMMSHi;  /* 0x3C Auxiliary Master Mode Snapshot High */
+
+   struct ixp46x_channel_ctl channel[3];
+};
+
+/* 0x00 Time Sync Control Register Bits */
+#define TSCR_AMM (13)
+#define TSCR_ASM (12)
+#define TSCR_TTM (11)
+#define TSCR_RST (10)
+
+/* 0x04 Time Sync Event Register Bits */
+#define TSER_SNM (13)
+#define TSER_SNS (12)
+#define TTIPEND  (11)
+
+/* 0x40 Time Synchronization Channel Control Register Bits */
+#define MASTER_MODE   (10)
+#define TIMESTAMP_ALL (11)
+
+/* 0x44 Time Synchronization Channel Event Register Bits */
+#define TX_SNAPSHOT_LOCKED (10)
+#define RX_SNAPSHOT_LOCKED (11)
+
+#endif
diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c
index 4f1cc71..3d36154 100644
--- a/drivers/net/arm/ixp4xx_eth.c
+++ b/drivers/net/arm/ixp4xx_eth.c
@@ -30,9 +30,12 @@
 #include linux/etherdevice.h
 #include linux/io.h
 #include linux/kernel.h
+#include linux/net_tstamp.h
 #include linux/phy.h
 #include linux/platform_device.h
+#include linux/ptp_classify.h
 #include linux/slab.h
+#include mach/ixp46x_ts.h
 #include mach/npe.h
 #include mach/qmgr.h
 
@@ -67,6 +70,14 @@
 #define RXFREE_QUEUE(port_id)  (NPE_ID(port_id) + 26)
 #define TXDONE_QUEUE   31
 
+#define PTP_SLAVE_MODE 1
+#define PTP_MASTER_MODE2
+#define PORT2CHANNEL(p)1
+/*
+ * PHYSICAL_ID(p-id) ?
+ * TODO - Figure out correct mapping.
+ */
+
 /* TX Control Registers */
 #define TX_CNTRL0_TX_EN0x01
 #define TX_CNTRL0_HALFDUPLEX   0x02
@@ -171,6 +182,8 @@ struct port {
int id

[PATCH 5/5] ptp: Added a clock driver for the National Semiconductor PHYTER.

[Richard Cochran]

This patch adds support for the PTP clock found on the DP83640.
The basic clock operations and one external time stamp have
been implemented.

Signed-off-by: Richard Cochran richard.coch...@omicron.at
---
 drivers/net/phy/Kconfig   |   29 ++
 drivers/net/phy/Makefile  |1 +
 drivers/net/phy/dp83640.c |  904 +
 drivers/net/phy/dp83640_reg.h |  261 
 4 files changed, 1195 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/dp83640.c
 create mode 100644 drivers/net/phy/dp83640_reg.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index a527e37..a2d0753 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -77,6 +77,35 @@ config NATIONAL_PHY
---help---
  Currently supports the DP83865 PHY.
 
+config DP83640_PHY
+   tristate Driver for the National Semiconductor DP83640 PHYTER
+   depends on PTP_1588_CLOCK
+   depends on NETWORK_PHY_TIMESTAMPING
+   ---help---
+ Supports the DP83640 PHYTER with IEEE 1588 features.
+
+ This driver adds support for using the DP83640 as a PTP
+ clock. This clock is only useful if your PTP programs are
+ getting hardware time stamps on the PTP Ethernet packets
+ using the SO_TIMESTAMPING API.
+
+ In order for this to work, your MAC driver must also
+ implement the skb_tx_timetamp() function.
+
+config DP83640_PHY_STATUS_FRAMES
+   bool DP83640 Status Frames
+   default y
+   depends on DP83640_PHY
+   ---help---
+ This option allows the DP83640 PHYTER driver to obtain time
+ stamps from the PHY via special status frames, rather than
+ reading over the MDIO bus. Using status frames is therefore
+ more efficient. However, if enabled, this option will cause
+ the driver to add a mutlicast address to the MAC.
+
+ Say Y here, unless your MAC does not support multicast
+ destination addresses.
+
 config STE10XP
depends on PHYLIB
tristate Driver for STMicroelectronics STe10Xp PHYs
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 13bebab..2333215 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_FIXED_PHY)   += fixed.o
 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
 obj-$(CONFIG_MDIO_GPIO)+= mdio-gpio.o
 obj-$(CONFIG_NATIONAL_PHY) += national.o
+obj-$(CONFIG_DP83640_PHY)  += dp83640.o
 obj-$(CONFIG_STE10XP)  += ste10Xp.o
 obj-$(CONFIG_MICREL_PHY)   += micrel.o
 obj-$(CONFIG_MDIO_OCTEON)  += mdio-octeon.o
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
new file mode 100644
index 000..38a7202
--- /dev/null
+++ b/drivers/net/phy/dp83640.c
@@ -0,0 +1,904 @@
+/*
+ * Driver for the National Semiconductor DP83640 PHYTER
+ *
+ * Copyright (C) 2010 OMICRON electronics GmbH
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include linux/ethtool.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/mii.h
+#include linux/module.h
+#include linux/net_tstamp.h
+#include linux/netdevice.h
+#include linux/phy.h
+#include linux/ptp_classify.h
+#include linux/ptp_clock_kernel.h
+
+#include dp83640_reg.h
+
+#ifdef CONFIG_DP83640_PHY_STATUS_FRAMES
+#define USE_STATUS_FRAMES
+#endif
+
+#define DP83640_PHY_ID 0x20005ce1
+#define PAGESEL0x13
+#define LAYER4 0x02
+#define LAYER2 0x01
+#define MAX_RXTS   4
+#define MAX_TXTS   4
+#define N_EXT_TS   1
+#define PSF_PTPVER 2
+#define PSF_EVNT   0x4000
+#define PSF_RX 0x2000
+#define PSF_TX 0x1000
+#define EXT_EVENT  1
+#define EXT_GPIO   1
+
+#if defined(__BIG_ENDIAN)
+#define ENDIAN_FLAG0
+#elif defined(__LITTLE_ENDIAN)
+#define ENDIAN_FLAGPSF_ENDIAN
+#endif
+
+#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)-cb))
+
+struct phy_rxts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16 ns_hi;   /* overflow[1:0], ns[29:16] */
+   u16 sec_lo;  /* sec[15:0] */
+   u16 sec_hi;  /* sec[31:16] */
+   u16 seqid;   /* sequenceId[15:0] */
+   u16 msgtype; /* messageType[3:0], hash[11:0] */
+};
+
+struct phy_txts {
+   u16 ns_lo;   /* ns[15:0] */
+   u16