; But we do not really care, as we already now the
> CPU <-> NUMA associativity back in find_and_online_cpu_nid(),
> so let us make use of that and set the proper numa<->cpu mapping,
> so cpu_to_node() in cpu_up() returns the right node and
> try_online_node() can do its w
on
scenarios.
Note: The numbers are with Uncapped + no-noise case. In the Capped and/or
noise case, due to contention on the Cores, the numbers are expected to
further improve.
Srikar Dronamraju (4):
powerpc/smp: Cache CPU has Asymmetric SMP
powerpc/smp: Move shared_processor static key to smp.h
p
1067.5 1090.03 1073.89 1076.574 9.4189347 -2.68697
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 78 ++-
1 file changed, 28 insertions(+), 50 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 48b816
subsequently. This commit will help avoid a branch in powerpc_smt_flags
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index fbbb695bae3d
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
on each lpar would help
them to perform better.
To achieve this, enable SD_ASYM_PACKING flag at CACHE, MC and DIE level.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b
-by: Srikar Dronamraju
---
arch/powerpc/include/asm/paravirt.h | 12
arch/powerpc/include/asm/smp.h | 14 ++
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/asm/paravirt.h
b/arch/powerpc/include/asm/paravirt.h
index f5ba1a3c41f8
* Peter Zijlstra [2023-09-05 00:10:04]:
> On Wed, Aug 30, 2023 at 05:56:14PM +0530, Srikar Dronamraju wrote:
> > Currently there are four powerpc specific sched topologies. These are
> > all statically defined. However not all these topologies are used by
> >
There are some variables that are only updated at boot time.
So add __ro_after_init attribute to such variables
Signed-off-by: Srikar Dronamraju
---
Changelog:
v2 -> v3:
Use __ro_after_init instead of __read_mostly
Suggested by : Peter Zijlstra and Michael Ellerman
arch/powerpc/kernel/sm
tophe Leroy
Cc: linux-ker...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Mark Rutland
Cc: Michael Ellerman
Cc: "ndesaulni...@google.com"
Cc: Nicholas Piggin
Cc: "Paul E. McKenney"
Cc: "Peter Zijlstra (Intel)"
Cc: Rohan McLure
Cc: Srikar Dronamraju
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
in shared processor mode and has big cores.
Signed-off-by: Srikar Dronamraju
---
Changelog:
v1->v2: Using Jump label instead of a variable.
v2 -> v3:
- Handle comments on commit message (Michael Ellerman)
- Rework using existing cpu_has_features static key (Michael Ellerman)
- Added a c
dynamically then
the code is simpler and there are greater chances of avoiding
degenerations.
Note:
Even X86 builds its sched topologies dynamically and proposed changes
are very similar to the way X86 is building its topologies.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 78
groups of the same core.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 27770f7f1ae5..daede8c2abc1 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch
636.lelmjkyv-...@intel.com/
2. Resolved comments from Shrikanth
Tested-by: Aboorva Devarajan
Reviewed-by: Shrikanth Hegde
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/include/asm/paravirt.h | 42 ++---
1 file changed, 39 insertions(+), 3 deletions(-)
diff --git a/a
-by: Shrikanth Hegde
Signed-off-by: Srikar Dronamraju
---
Changelog:
v2
(http://lkml.kernel.org/r/20231018155838.2332822-1-sri...@linux.vnet.ibm.com)
-> v3:
Resolved comments from Michael Ellerman
v1 (http://lkml.kernel.org/r/20231009051740.17683-1-sri...@linux.vnet.ibm.com)
-> v2:
-by: Shrikanth Hegde
Signed-off-by: Srikar Dronamraju
---
Changelog:
v2
(http://lkml.kernel.org/r/20231018155838.2332822-1-sri...@linux.vnet.ibm.com)
-> v4:
Resolved comments from Michael Ellerman
v1 (http://lkml.kernel.org/r/20231009051740.17683-1-sri...@linux.vnet.ibm.com)
-> v2:
* Peter Zijlstra [2023-10-19 09:51:27]:
> On Wed, Oct 18, 2023 at 10:07:45PM +0530, Srikar Dronamraju wrote:
> > There are some variables that are only updated at boot time.
> > So add read_mostly attribute to such variables
>
> You don't have __ro_after_init ?
M
* Michael Ellerman [2023-10-19 15:41:40]:
> Srikar Dronamraju writes:
> > The ability to detect if the system is running in a shared processor
> > mode is helpful in few more generic cases not just in
> > paravirtualization.
> > For example: At boot time, different sc
* Peter Zijlstra [2023-10-19 09:48:28]:
> On Thu, Oct 19, 2023 at 03:38:40PM +1100, Michael Ellerman wrote:
> > Srikar Dronamraju writes:
> > > If there are shared processor LPARs, underlying Hypervisor can have more
> > > virtual cores to handle than actual physical
* Michael Ellerman [2023-10-19 15:48:48]:
> Srikar Dronamraju writes:
> > Like L2-cache info, coregroup information which is used to determine MC
> > sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
> > export coregroup information for shared processor
* Peter Zijlstra [2023-10-19 09:50:46]:
> On Thu, Oct 19, 2023 at 03:48:48PM +1100, Michael Ellerman wrote:
> > Srikar Dronamraju writes:
> > > Like L2-cache info, coregroup information which is used to determine MC
> > > sched domains is only present on dedicated
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
on each LPAR would help
them to perform better. This is because each of the LPAR will get
100% time to run applications and there will no switching required by
the Hypervisor.
To achieve this, enable SD_ASYM_PACKING flag at CACHE, MC and DIE level.
Signed-off-by: Srikar Dronamraju
---
Changelog
subsequently. This commit will help avoid a branch in powerpc_smt_flags
Signed-off-by: Srikar Dronamraju
---
Changelog:
v1->v2: Using static keys instead of a variable.
Using pr_info_once instead of printk
arch/powerpc/kernel/smp.c | 15 +--
1 file changed, 9 insertions(+), 6 deleti
There are some variables that are only updated at boot time.
So add read_mostly attribute to such variables
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc
he Leroy
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin
Cc: Peter Zijlstra (Intel)
Cc: Rohan McLure
Cc: Valentin Schneider
Srikar Dronamraju (6):
powerpc/smp: Cache CPU has Asymmetric SMP
powerpc/smp: Enable Asym packing for cores on shared processor
powerpc/smp: Move shared_proc
groups of the same core.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 16
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index b1eb11a66902..a710fb32a2a9 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc
-by: Srikar Dronamraju
---
arch/powerpc/include/asm/paravirt.h | 12
arch/powerpc/include/asm/smp.h | 14 ++
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/include/asm/paravirt.h
b/arch/powerpc/include/asm/paravirt.h
index 0372b0093f72
: Michael Ellerman
Cc: Nicholas Piggin
Cc: virtualizat...@lists.linux-foundation.org
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/include/asm/paravirt.h | 33 ++---
1 file changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/include/asm/paravirt.h
b
* Michael Ellerman [2023-10-19 15:33:16]:
> Srikar Dronamraju writes:
> > Currently cpu feature flag is checked whenever powerpc_smt_flags gets
> > called. This is an unnecessary overhead. CPU_FTR_ASYM_SMT is set based
> > on the processor and all processors will
* Shrikanth Hegde [2023-10-19 21:26:56]:
>
>
> On 10/18/23 10:07 PM, Srikar Dronamraju wrote:
> > If there are shared processor LPARs, underlying Hypervisor can have more
> > virtual cores to handle than actual physical cores.
> >
> > Starting with Power 9
* Michael Ellerman [2023-10-20 23:10:55]:
> Srikar Dronamraju writes:
> > Currently there are four powerpc specific sched topologies. These are
> > all statically defined. However not all these topologies are used by
> > all powerpc systems.
> >
> > T
* Shrikanth Hegde [2023-10-11 14:33:34]:
> On 10/9/23 10:47 AM, Srikar Dronamraju wrote:
>
> Hi Srikar. This is an interesting patch.
>
> > PowerVM Hypervisor dispatches on a whole core basis. In a shared LPAR, a
> s/whole/big
>
> Can we mention that a big core
ug_init() which
> can be called early from setup_arch(). The DLPAR related initialisation
> can still be done later, because it needs to do allocations.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju
> Signed-off-by: Michael Ellerman
--
Thanks and Regards
Srikar Dronamraju
f-by: Michael Ellerman
> [ldufour: pass current SMT level to cpu_smt_set_num_threads]
> [ldufour: remove topology_smt_supported]
> [ldufour: remove topology_smt_threads_supported]
> [ldufour: select CONFIG_SMT_NUM_THREADS_DYNAMIC]
> [ldufour: update kernel-parameters.txt]
> Signed-off-
* Laurent Dufour [2023-07-05 16:51:43]:
> From: Michael Ellerman
>
> Integrate with the generic SMT support, so that when a CPU is DLPAR
> onlined it is brought up with the correct SMT mode.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju
> Signed-off-by: Michael Eller
4, dir, _wakeup.latency_ns);
> + debugfs_create_u32("ipi_cpu_src", 0444, dir, _wakeup.src_cpu);
> +
> + temp = debugfs_create_file("timeout_expected_ns", 0644, dir, NULL,
> _ops);
> + if (!temp) {
> + pr_alert("latency_test: failed to create
> /sys/kernel/
cpu_online" in
> "tools/perf/util/header.c".
>
> Since "BIT(x)" definition will get included from header.h, remove
> that from bench/numa.c
>
> Tested-by: Disha Goel
> Signed-off-by: Athira Rajeev
> Reported-by: Disha Goel
Looks good to me.
Rev
ng all the futex benchmarks to use
> CPU_ALLOC to allocate cpumask, CPU_ALLOC_SIZE for size, and
> CPU_SET_S to set the mask.
>
> Tested-by: Disha Goel
> Signed-off-by: Athira Rajeev
> Reported-by: Disha Goel
Looks good to me
Reviewed-by: Srikar Dronamraju
> ---
> to
's in the system.
>
> Fixed all places where "bind_cpumask" which is part of "struct
> thread_data" is used such that bind_cpumask works in all configuration.
>
> Tested-by: Disha Goel
> Signed-off-by: Athira Rajeev
> Reported-by: Disha Goel
Looks good to me.
R
* Oscar Salvador [2022-04-06 18:19:00]:
> On Wed, Mar 30, 2022 at 07:21:23PM +0530, Srikar Dronamraju wrote:
> > arch/powerpc/mm/numa.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/nu
: Rohan McLure
Cc: Valentin Schneider
Cc: Vincent Guittot
Srikar Dronamraju (5):
powerpc/smp: Enable Asym packing for cores on shared processor
powerpc/smp: Disable MC domain for shared processor
powerpc/smp: Add __ro_after_init attribute
powerpc/smp: Avoid asym packing within thread_g
dynamically then
the code is simpler and there are greater chances of avoiding
degenerations.
Note:
Even X86 builds its sched topologies dynamically and proposed changes
are very similar to the way X86 is building its topologies.
Signed-off-by: Srikar Dronamraju
---
Changelog:
v3 -> v4:
- Confl
There are some variables that are only updated at boot time.
So add __ro_after_init attribute to such variables
Signed-off-by: Srikar Dronamraju
---
Changelog:
v2 -> v3:
Use __ro_after_init instead of __read_mostly
Suggested by : Peter Zijlstra and Michael Ellerman
arch/powerpc/kernel/sm
in shared processor mode and has big cores.
Signed-off-by: Srikar Dronamraju
---
Changelog:
v3 -> v4:
- Dont use splpar_asym_pack with SMT
- Conflict resolution due to rebase
(DIE changed to PKG)
v2 -> v3:
- Handle comments from Michael Ellerman.
- Rework using existing cpu_has_fe
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
groups of the same core.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 65a6f988374a..a84931c37246 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc
of_node_put(cpu);
>
> out_present:
> - if (nid < 0 || !node_possible(nid))
> + if (nid < 0 || !node_online(nid))
> nid = first_online_node;
>
> /*
> --
> 2.36.1
>
--
Thanks and Regards
Srikar Dronamraju
node is actually not a variable, it returns the lowest
online node. Right? If lets a early_cpu_to_node() for the same CPU across a
node online/offline may end up giving two different nids. Right?
> }
>
> int of_drconf_to_nid_single(struct drmem_lmb *lmb);
> --
> 2.36.1
>
--
Thanks and Regards
Srikar Dronamraju
/bpf/20191211160133.GB4580@calabresa/
Cc: "Naveen N. Rao"
Cc: Jiri Olsa
Cc: Thadeu Lima de Souza Cascardo
Cc: Josh Poimboeuf
Cc: Peter Zijlstra (Intel)
Cc: linuxppc-dev
Cc: LKML
Signed-off-by: Srikar Dronamraju
---
scripts/faddr2line | 7 ---
1 file changed, 4 insertions(+),
head for those users who are sure
they don't depend on these files. We still keep the creating of the files as
the default approach so that others who depend on it are not going to be
impacted.
>
> thanks,
>
> greg k-h
--
Thanks and Regards
Srikar Dronamraju
% /tmp
/dev/nvme0n1p241943040 1848684823400448 45%
/boot/grub2/powerpc-ieee1275
/dev/nvme0n1p3 739098844 19459884 719638960 3% /home
tmpfs 6502249856 64 6502249792 1% /run/user/1005
--
Thanks and Regards
Srikar Dronamraju
space applications like ppc64_cpu should
> >> update the sysfs when changing the SMT level to keep the system consistent.
> >>
> >> Suggested-by: Srikar Dronamraju
> >> Signed-off-by: Laurent Dufour
> >> ---
> >> arch/powerpc/platforms/pseries/pseries.h |
* Alexey Kardashevskiy [2023-04-13 22:09:22]:
> > > On 23.03.23 10:53, Srikar Dronamraju wrote:
> > > >
> > > > I am unable to boot upstream kernels from v5.16 to the latest upstream
> > > > kernel on a maxconfig system. (Machine config details
river is reporting timeout trying to ENABLE_HCA for an SR-IOV
> ethernet port, when DMA window is backed by 2MB TCEs.
>
> Fixes: 387273118714 ("powerps/pseries/dma: Add support for 2M IOMMU page
> size")
>
> Signed-off-by: Gaurav Batra
>
Works with this patch.
T
* Michael Ellerman [2023-05-22 17:41:22]:
> Srikar Dronamraju writes:
> > * Alexey Kardashevskiy [2023-04-13 22:09:22]:
> >
> >> > > On 23.03.23 10:53, Srikar Dronamraju wrote:
> >> > > >
> > Hi Alexey, Michael
> >
> > Sorr
ARAVIRT_TIME_ACCOUNTING")
> Signed-off-by: Shrikanth Hegde
Looks good to me.
Reviewed-by: Srikar Dronamraju
--
Thanks and Regards
Srikar Dronamraju
level
when the system is running in shared processor mode and has big cores.
Signed-off-by: Srikar Dronamraju
---
Changelog:
v4 -> v5:
- commit msg update
v3 -> v4:
- Dont use splpar_asym_pack with SMT
- Conflict resolution due to rebase
(DIE changed to PKG)
v2 -> v3:
- Handle comm
Like L2-cache info, coregroup information which is used to determine MC
sched domains is only present on dedicated LPARs. i.e PowerVM doesn't
export coregroup information for shared processor LPARs. Hence disable
creating MC domains on shared LPAR Systems.
Signed-off-by: Srikar Dronamraju
rman
Cc: Nicholas Piggin
Cc: "Paul E. McKenney"
Cc: Peter Zijlstra (Intel)
Cc: Rohan McLure
Cc: Valentin Schneider
Cc: Vincent Guittot
CC: Aneesh
Srikar Dronamraju (5):
powerpc/smp: Enable Asym packing for cores on shared processor
powerpc/smp: Disable MC domain for shared
dynamically then
the code is simpler and there are greater chances of avoiding
degenerations.
Note:
Even X86 builds its sched topologies dynamically and proposed changes
are very similar to the way X86 is building its topologies.
Signed-off-by: Srikar Dronamraju
---
Changelog:
v3 -> v4:
- Confl
groups of the same core.
Signed-off-by: Srikar Dronamraju
---
arch/powerpc/kernel/smp.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index aea149627209..9d8bb9a084bd 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc
There are some variables that are only updated at boot time.
So add __ro_after_init attribute to such variables
Signed-off-by: Srikar Dronamraju
---
Changelog:
v2 -> v3:
Use __ro_after_init instead of __read_mostly
Suggested by : Peter Zijlstra and Michael Ellerman
arch/powerpc/kernel/sm
* Srikar Dronamraju [2023-11-09 11:19:28]:
Hi Michael,
> PowerVM systems configured in shared processors mode have some unique
> challenges. Some device-tree properties will be missing on a shared
> processor. Hence some sched domains may not make sense for shared processor
* Aneesh Kumar K.V [2023-11-15 12:05:22]:
> Srikar Dronamraju writes:
>
> >
> > arch/powerpc/kernel/smp.c | 37 +
> > 1 file changed, 29 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/powerpc/kernel/smp.c b
if
If we are introducing vcpu_is_dispatched, we should remove
yield_count_of() and use vcpu_is_dispatched everwhere
No point in having yield_count_of() and vcpu_is_dispatched, since
yield_count_of() is only used to check if we are running in OS or not.
--
Thanks and Regards
Srikar Dronamraju
* Aneesh Kumar K V [2023-11-14 15:45:35]:
> On 11/14/23 3:16 PM, Srikar Dronamraju wrote:
> > * Aneesh Kumar K.V [2023-11-14 12:42:19]:
> >
> >> No functional change in this patch. A helper is added to find if
> >> vcpu is dispatched by hypervisor. Use that
* Aneesh Kumar K.V [2023-11-15 10:57:08]:
> Srikar Dronamraju writes:
>
> > If there are shared processor LPARs, underlying Hypervisor can have more
> > virtual cores to handle than actual physical cores.
> >
> > Starting with Power 9, a big core (aka SMT8 core
* Aneesh Kumar K.V [2023-11-15 11:24:59]:
> Srikar Dronamraju writes:
>
> > PowerVM systems configured in shared processors mode have some unique
> > challenges. Some device-tree properties will be missing on a shared
> > processor. Hence some sched domains may n
t; attached to PCI host bridge.
>
Looks good to me.
Reviewed-by: Srikar Dronamraju
--
Thanks and Regards
Srikar Dronamraju
Commit-ID: e5e96fafd9028b1478b165db78c52d981c14f471
Gitweb: https://git.kernel.org/tip/e5e96fafd9028b1478b165db78c52d981c14f471
Author: Srikar Dronamraju
AuthorDate: Fri, 10 Aug 2018 22:30:18 +0530
Committer: Ingo Molnar
CommitDate: Mon, 10 Sep 2018 10:13:45 +0200
sched/topology: Set
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