Re: [PATCH 14/14] powerpc/64s: idle runlatch switch is done with MSR[EE]=0

* Nicholas Piggin <npig...@gmail.com> [2017-06-12 09:58:35]: > 2*mfmsr and 2*mtmsr can be avoided in the idle sleep/wake code > because we know the MSR[EE] is clear. Good optimization for powernv. > Signed-off-by: Nicholas Piggin <npig...@gmail.com> Acked-by: Vaidyan

Re: [PATCH 13/14] powerpc/64: runlatch CTRL[RUN] set optimisation

* Nicholas Piggin <npig...@gmail.com> [2017-06-12 09:58:34]: > The CTRL register is read-only except bit 63 which is the run latch > control. This means it can be updated with a mtspr rather than > mfspr/mtspr. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com>

Re: [PATCH 11/14] powerpc/64s: cpuidle read mostly for common globals

> Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> > > --- > > drivers/cpuidle/cpuidle-powernv.c | 10 +- > > drivers/cpuidle/cpuidle-pseries.c | 8 > > 2 files cha

Re: [PATCH 12/14] powerpc/64s: cpuidle no memory barrier after break from idle

y: Nicholas Piggin <npig...@gmail.com> Reviewed-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> > --- > drivers/cpuidle/cpuidle-powernv.c | 11 +-- > drivers/cpuidle/cpuidle-pseries.c | 11 +-- > 2 files changed, 18 insertions(+), 4 deletions(-) >

Re: power server power consumption problem

* ?? <1363017...@qq.com> [2017-06-06 19:59:24]: > I use ipmitool measuring power server power consumption, getting the > following results without total power consumption as the following picture, > do I add all power values as total power consumption? I am eager to receive > someone's

Re: [PATCH] powerpc/powernv/idle: Round up latency and residency values

* Michael Ellerman <m...@ellerman.id.au> [2017-08-24 20:28:19]: > Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> writes: > > > On PowerNV platforms, firmware provides exit latency and > > target residency for each of the idle states in nano > > seconds.

[PATCH] powerpc/powernv/idle: Round up latency and residency values

org> Signed-off-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> --- drivers/cpuidle/cpuidle-powernv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c index 42896a67aeae..5f39223

Re: [PATCH V3] cpufreq: powernv: Fix the hardlockup by synchronus smp_call in timer interrupt

was using fast_swtich then > @@ -718,10 +728,8 @@ void gpstate_timer_handler(struct timer_list *t) > if (gpstate_idx != gpstates->last_lpstate_idx) > queue_gpstate_timer(gpstates); > > + set_pstate(_data); > spin_unlock(>gpstate_lock); > - > - /* Timer may get migrated to a different cpu on cpu hot unplug */ > - smp_call_function_any(policy->cpus, set_pstate, _data, 1); > } Fix looks good. Acked-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com>

Re: [PATCH 2/2] powerpc/64s: idle skip POWER9 DD1 and DD2.0 specific workarounds on DD2.1

ent as we remove unnecessary code and workarounds. > Cc: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> > Signed-off-by: Nicholas Piggin <npig...@gmail.com> Reviewed-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> > --- > arch/powerpc/kernel/idle_boo

Re: [PATCH 1/3] powerpc/64s/idle: POWER9 implement a separate idle stop function for hotplug

-off-by: Nicholas Piggin <npig...@gmail.com> Reviewed-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> > --- > arch/powerpc/include/asm/processor.h | 1 + > arch/powerpc/kernel/idle_book3s.S | 24 ++-- > arch/powerpc/platforms/powernv/

Re: [PATCH 2/3] powerpc/64s/idle: avoid sync for KVM state when waking from idle

* Nicholas Piggin [2017-11-18 00:08:06]: > When waking from a CPU idle instruction (e.g., nap or stop), the sync > for ordering the KVM secondary thread state can be avoided if there > wakeup is coming from a kernel context rather than KVM context. > > This improves

Re: [PATCH 3/3] powerpc/64s/idle: POWER9 ESL=0 stop avoid save/restore overhead

9_offline_stop just so it matches > power9_idle_stop. > > This improves performance for ping-pong benchmark with the stop0_lite > idle state by 2.54% for 2 threads in the same core, and 2.57% for > different cores. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> Rev

Re: [RESEND][PATCH] cpuidle/powernv : Restore different PSSCR for idle and hotplug

* Benjamin Herrenschmidt [2018-03-01 08:40:22]: > On Thu, 2018-03-01 at 01:03 +0530, Akshay Adiga wrote: > > commit 1e1601b38e6e ("powerpc/powernv/idle: Restore SPRs for deep idle > > states via stop API.") uses stop-api provided by the firmware to restore > > PSSCR. PSSCR

Re: [PATCH] pseries/energy: Use OF accessor functions to read ibm,drc-indexes

t; Fixes: commit e83636ac3334 ("pseries/drc-info: Search DRC properties for CPU > indexes") > Cc: #v4.16+ > Reported-by: Pavithra R. Prakash > Signed-off-by: Gautham R. Shenoy Reviewed-by: Vaidyanathan Srinivasan > --- > arch/powerpc/platforms/pseries/pseries_energy.

Re: [PATCH v2] powerpc/powernv: Add ultravisor message log interface

* Claudio Carvalho [2019-08-24 23:19:19]: > > On 8/23/19 9:48 AM, Michael Ellerman wrote: > > Hi Claudio, > > Hi Michael, > > > > > Claudio Carvalho writes: > >> Ultravisor (UV) provides an in-memory console which follows the OPAL > >> in-memory console structure. > >> > >> This patch

Re: [PATCH] powerpc/powernv/prd: Validate whether address to be mapped is part of system RAM

he PTE mapping. > CC: Aneesh Kumar K.V > CC: Jeremy Kerr > CC: Vaidyanathan Srinivasan > Signed-off-by: Vasant Hegde Signed-off-by: Vaidyanathan Srinivasan > --- > arch/powerpc/platforms/powernv/opal-prd.c | 16 +++- > 1 file changed, 15 insertions(+), 1 deletion(-) &

Re: [PATCH v3 1/2] powerpc/vcpu: Assume dedicated processors as non-preempt

68d21ddcc..ffb971f3a63c 100644 > --- a/arch/powerpc/mm/numa.c > +++ b/arch/powerpc/mm/numa.c > @@ -1568,9 +1568,13 @@ int prrn_is_enabled(void) > return prrn_enabled; > } > > +DEFINE_STATIC_KEY_FALSE(shared_processor); > +EXPORT_SYMBOL_GPL(shared_processor); > + > void __init shared_proc_topology_init(void) > { > if (lppaca_shared_proc(get_lppaca())) { > + static_branch_enable(_processor); > bitmap_fill(cpumask_bits(_associativity_changes_mask), > nr_cpumask_bits); > numa_update_cpu_topology(false); Reviewed-by: Vaidyanathan Srinivasan Thanks Srikar for the fix. --Vaidy

Re: [PATCH] powerpc/powernv/prd: Validate whether address to be mapped is part of system RAM

* Jeremy Kerr [2019-10-03 15:07:24]: > Hi Vasant, > > > > OK. How about we just don't do that? > > > > Yes. Hostboot will fix that. It will make sure that HBRT is loaded > > into regular memory. > > Super. > > > > It sounds like we're just trying to work around an invalid > > >

Re: [PATCH] powerpc/powernv/prd: Validate whether address to be mapped is part of system RAM

* Jeremy Kerr [2019-10-04 11:27:46]: > Hi Vaidy, > > > The current topic is who owns setting up the ATT bits for that piece > > of memory. It is the kernel today. Kernel decides to set this up as > > normal memory or I/O memory and sets the bits in page table entry. > > > > > Or, what if

Re: [Skiboot] [PATCH v8 3/3] Self save API integration

ing and usage. > > Signed-off-by: Pratik Rajesh Sampat Reviewed-by: Vaidyanathan Srinivasan > --- > doc/opal-api/opal-slw-self-save-reg-181.rst | 51 ++ > doc/opal-api/opal-slw-set-reg-100.rst | 5 + > doc/power-management.rs

Re: [PATCH v8 2/3] API to verify the STOP API and image compatibility

. BRAHMASAMUDRA > Reviewed-by: Gregory S Still > Reviewed-by: Jennifer A Stofer > Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77614 > Tested-by: Jenkins OP Build CI > Tested-by: Jenkins OP HW > Reviewed-by: Daniel M Crowell > Signed-off-by: Pratik Rajesh Samp

Re: [Skiboot] [PATCH v8 1/3] Self Save: Introducing Support for SPR Self Save

hristian R. Geddes > Signed-off-by: Prem Shanker Jha > Signed-off-by: Akshay Adiga > Signed-off-by: Pratik Rajesh Sampat Reviewed-by: Vaidyanathan Srinivasan > 2. The commit also incorporates changes that make STOP API project > agnostic changes include defining wrapper functions

Re: [PATCH v5 2/3] powerpc/powernv: Introduce Self save support

le respecting it's preferences. > > This implementation allows mixing of support for the SPRs, which > means that a SPR can be self restored while another SPR be self saved if > they support and prefer it to be so. > > Signed-off-by: Pratik Rajesh Sampat > Reviewed-by: Ram Pai

Re: [PATCH v5 1/3] powerpc/powernv: Interface to define support and preference for a SPR

using the above interface and retains the > legacy functionality of self restore. > > Signed-off-by: Pratik Rajesh Sampat > Reviewed-by: Ram Pai Reviewed-by: Vaidyanathan Srinivasan > --- > arch/powerpc/platforms/powernv/idle.c | 316 +- > 1 file cha

Re: [PATCH v5 3/3] powerpc/powernv: Parse device tree, population of SPR support

* Pratik Rajesh Sampat [2020-03-17 19:40:18]: > Parse the device tree for nodes self-save, self-restore and populate > support for the preferred SPRs based what was advertised by the device > tree. > > Signed-off-by: Pratik Rajesh Sampat > Reviewed-by: Ram Pai Reviewe

Re: [PATCH v2] cpuidle-pseries: Fix CEDE latency conversion from tb to us

s a warning in case we discover an extended-cede state with > wakeup latency to be 0. In such a case, ensure that CEDE(0) has a > non-zero wakeup latency. > > Fixes: commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for > CEDE(0)") > > Signed-off-by: Gautham

Re: [PATCH] Revert "powerpc/powernv/idle: Replace CPU feature check with PVR check"

dle states are enabled and tested on the P10 platform > with this fix. > > This reverts commit 8747bf36f312356f8a295a0c39ff092d65ce75ae. > > Fixes: 8747bf36f312 ("powerpc/powernv/idle: Replace CPU feature check with > PVR check") > Signed-off-by: Pratik Rajes

Re: [PATCH] powerpc/powernv/idle: add a basic stop 0-3 driver for POWER10

10 deep sleep code > (e.g., the BHRB restore) has been taken out, but it can be re-added > when stop > 3 support is added. > > Cc: Ryan P Grimm > Cc: Michael Neuling > Cc: Gautham R. Shenoy > Cc: Pratik Rajesh Sampat > Signed-off-by: Nicholas Piggin Tested-by: Vaidyanat

Re: [PATCH] powerpc: Fix P10 PVR revision in /proc/cpuinfo for SMT4 cores

evision: 17.0 (pvr 0080 1100) > > Signed-off-by: Michael Neuling Reviewed-by: Vaidyanathan Srinivasan > --- > arch/powerpc/kernel/setup-common.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/powerpc/kernel/setup-common.c > b/arch/pow

Re: [PATCH 2/5] cpuidle-pseries: Add function to parse extended CEDE records

= 10 > [5.913183] xcede : Record 0 : hint = 1, latency =0x400 tb-ticks, > Wake-on-irq = 1 > [5.913188] xcede : Record 1 : hint = 2, latency =0x3e8000 tb-ticks, > Wake-on-irq = 0 > [5.913193] cpuidle : Skipping the 2 Extended CEDE idle states > > Signed-off-by: Gaut

Re: [PATCH 5/5] cpuidle-pseries: Block Extended CEDE(1) which adds no additional value.

and Extended CEDE(1) map to > the same hardware idle state. Since we already get SMT folding from > the normal CEDE, the Extended CEDE(1) doesn't provide any additional > value. This patch blocks Extended CEDE(1). > > Signed-off-by: Gautham R. Shenoy Reviewed-by: Vaidyanathan Srini

Re: [PATCH 0/5] cpuidle-pseries: Parse extended CEDE information for idle.

* Gautham R Shenoy [2020-07-07 16:41:34]: > From: "Gautham R. Shenoy" > > Hi, > > On pseries Dedicated Linux LPARs, apart from the polling snooze idle > state, we currently have the CEDE idle state which cedes the CPU to > the hypervisor with latency-hint = 0. > > However, the PowerVM

Re: [PATCH 1/5] cpuidle-pseries: Set the latency-hint before entering CEDE

cede states through the > cpuidle framework, where each of them will have a different > cede-latency hint. > > Signed-off-by: Gautham R. Shenoy Reviewed-by: Vaidyanathan Srinivasan > --- > drivers/cpuidle/cpuidle-pseries.c | 10 +- > 1 file changed, 9 insertion

Re: [PATCH 3/5] cpuidle-pseries : Fixup exit latency for CEDE(0)

: 13104 > 99.5th: 14672 > 99.9th: 15824 > min=0, max=17993 > > With-patch: > Latency percentiles (usec) > 50.0th: 29 > 75.0th: 40 > 90.0th: 50 > 95.0th: 61 > *99.0th: 13648 > 99.5th: 14768 > 99.9th: 1

Re: [PATCH 4/5] cpuidle-pseries : Include extended CEDE states in cpuidle framework

.0th: 13648 > 99.5th: 14768 > 99.9th: 15664 > min=0, max=29812 > > With Patch: > Latency percentiles (usec) > 50.0th: 30 > 75.0th: 40 > 90.0th: 51 > 95.0th: 59 > *99.0th: 13616 > 99.5th: 14512 > 99.9th: 15696 &

Re: [PATCH] cpuidle/pseries: Fixup CEDE0 latency only for POWER10 onwards

* Michal Such?nek [2021-04-23 09:35:51]: > On Thu, Apr 22, 2021 at 08:37:29PM +0530, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" > > > > Commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for > > CEDE(0)") sets the exit latency of CEDE(0) based on the latency values > > of

Re: [PATCH] cpuidle/pseries: Fixup CEDE0 latency only for POWER10 onwards

* Michal Such?nek [2021-04-23 19:45:05]: > On Fri, Apr 23, 2021 at 09:29:39PM +0530, Vaidyanathan Srinivasan wrote: > > * Michal Such?nek [2021-04-23 09:35:51]: > > > > > On Thu, Apr 22, 2021 at 08:37:29PM +0530, Gautham R. Shenoy wrote: > >

Re: [PATCH] cpuidle/pseries: Fixup CEDE0 latency only for POWER10 onwards

* Michal Such?nek [2021-04-23 20:42:16]: > On Fri, Apr 23, 2021 at 11:59:30PM +0530, Vaidyanathan Srinivasan wrote: > > * Michal Such?nek [2021-04-23 19:45:05]: > > > > > On Fri, Apr 23, 2021 at 09:29:39PM +0530, Vaidyanathan Srinivasan wrote: > > > > * M

Re: [PATCH] cpuidle/pseries: Fixup CEDE0 latency only for POWER10 onwards

dcoded value of exit > latency, which is 10us. Though this is higher than the measured > values, we would be erring on the side of caution. > > Reported-by: Enrico Joedecke > Fixes: commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for > CEDE(0)") > Sig

Re: [PATCH v2] powerpc/cpuidle: Set CPUIDLE_FLAG_POLLING for snooze state

this > > is the correct version which is tested on powernv, pseries (shared and > > dedicated partitions) > > > > drivers/cpuidle/cpuidle-powernv.c | 5 - > > drivers/cpuidle/cpuidle-pseries.c | 8 ++-- > > 2 files changed, 10 insertions(+), 3 deletions(-) Hi Aboorva, Thanks for the patch. This fixes the unpredictable idle state selection issue under differ idle interval patterns. Reviewed-by: Vaidyanathan Srinivasan --Vaidy

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