On Fri, Jun 20, 2014 at 05:35:22PM +0800, Vincent Yang wrote:
This patch defines a quirk for platforms unable
to enable 3.0V support.
It is a preparation and will be used by Fujitsu
SDHCI controller f_sdh30 driver.
Signed-off-by: Vincent Yang vincent.y...@tw.fujitsu.com
I don't think you
...@freescale.com
Acked-by: Anton Vorontsov an...@enomsg.org
Thanks a lot!
Anton
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On Mon, Aug 12, 2013 at 09:39:05AM +0800, Haijun Zhang wrote:
Using function mmc_of_parse_voltage() to get voltage-ranges.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
Acked-by: Anton Vorontsov an...@enomsg.org
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capacity register.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
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...@freescale.com
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);
+ if (ocr_mask = 0)
' 0' check for an unsigned type? :) I'd write just !ocr_mask...
But other than that the patch looks good to me...
Reviewed-by: Anton Vorontsov an...@enomsg.org
Thanks!
goto err_ocr;
- }
-
- for (i = 0; i num_ranges; i++) {
- const int j = i * 2
On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
Add function to support get voltage from device-tree.
If there are voltage-range specified in device-tree node, this function
will parse it and return the avail voltage mask.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
On Mon, Jul 22, 2013 at 09:41:34PM -0500, Scott Wood wrote:
[...]
+static void esdhc_get_voltage(struct sdhci_host *host,
+struct platform_device *pdev)
+{
+}
Don't duplicate this code. Move it somewhere common and share it.
[Haijun Wrote:] So, move
from capacity or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
Development process nitpick...
The code originated from me, but I did not sign off this patch...
Per Documentation/SubmittingPatches:
The Signed
, otherwise read capabilities
from the register.
Anton
Thanks.
Regards
Haijun.
-Original Message-
From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
ow...@vger.kernel.org] On Behalf Of Anton Vorontsov
Sent: Saturday, July 13, 2013 2:35 AM
To: Wood Scott-B07421
Cc
On Mon, Jul 08, 2013 at 12:18:39PM -0500, Scott Wood wrote:
On 07/08/2013 02:16:04 AM, Haijun Zhang wrote:
On T4240QDS board controllers has an unusable ADMA engine, so use
SDMA instead.
Also 3.0v is support on T4240QDS board even if the capacity
detailed only 1.8v
support. Without this
Hi!
On Tue, May 14, 2013 at 08:59:13AM +, Wang Dongsheng-B40534 wrote:
I send to a wrong email address Anton Vorontsov avoront...@ru.mvista.com
Add Anton Vorontsov anton.voront...@linaro.org to this email.
I don't have any means to test it, but the patch itself looks good
Hello Huang,
On Fri, Oct 26, 2012 at 02:42:36AM +, Huang Changming-R66093 wrote:
For the current polling mode, driver will send CMD13 to poll the card status
periodically , which will cause too many interrupts.
Once I sent patches to detect the card when using polling mode last year:
, the
best fix would be to also make the card polling cheap.
Anyways, using (d) clause of the Reviewer's statement of oversight, I
can easily give this:
Reviewed-by: Anton Vorontsov cbouatmai...@gmail.com
:)
Thanks!
[...]
IIRC, the card detection is broken SOC-revision-wise, not board-wise
, change the default card detect to interrupt mode,
if the board can't support this mode, we still use the poll mode.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
CC: Anton Vorontsov cbouatmai...@gmail.com
CC: Chris Ball c...@laptop.org
---
IIRC, the card detection is broken SOC
On Tue, Sep 11, 2012 at 12:54:29AM -0700, Anton Vorontsov wrote:
On Tue, Sep 11, 2012 at 03:12:44PM +0800, chang-ming.hu...@freescale.com
wrote:
From: Jerry Huang chang-ming.hu...@freescale.com
Below SOCs don't support the cmd23 command for MMC card,
therefore, disable it in device
On Wed, Sep 12, 2012 at 03:19:18AM +, Huang Changming-R66093 wrote:
[...]
I don't think it is the best way to do it. For the VVN2.2 or older,
some silicon support this feature (mpc8536 and p2020), but other
silicones don't support it (e.g. p4080, p102x). Though, the current
p5/p4/p3 has
();
+}
It is good that this code exists under CONFIG_HOTPLUG_CPU. Did you
check that everything works correctly with CONFIG_HOTPLUG_CPU=n?
Yeah, only the code under CONFIG_HOTPLUG_CPU calls the function, so
it should be all fine.
Thanks!
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Email: cbouatmai...@gmail.com
...@chello.nl
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
On Tue, May 01, 2012 at 12:45:33PM +0200, Peter Zijlstra wrote:
On Thu, 2012-04-26 at 16:59 -0700, Andrew Morton wrote:
+void clear_tasks_mm_cpumask(int cpu)
The operation of this function was presumably obvious to you
for the whole tasklist_lock.
Suggested by Peter Zijlstra.
In v2:
- introduced a small helper in cpu.c: most arches duplicate the
same [buggy] code snippet, so it's better to fix it and move the
logic into a common function.
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is called after the cpu is taken down and marked
offline, so no new tasks will get this cpu set in their mm mask.
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
include/linux/cpu.h |1 +
kernel/cpu.c| 26 ++
2 files changed, 27 insertions(+)
diff
).
clear_tasks_mm_cpumask() has this issue fixed, so let's use it.
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/arm/kernel/smp.c |8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/kernel/smp.c b/arch
walk up all threads and returns an appropriate task (with task
lock held).
clear_tasks_mm_cpumask() has all the issues fixed, so let's use it.
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/powerpc/mm/mmu_context_nohash.c | 11
).
clear_tasks_mm_cpumask() has the issue fixed, so let's use it.
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/sh/kernel/smp.c |7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/sh/kernel/smp.c b/arch/sh
an appropriate task (with task lock held).
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/blackfin/kernel/trace.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/blackfin/kernel/trace.c b
of the
tasklist lock, read_ one is enough.
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/blackfin/kernel/trace.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/blackfin/kernel/trace.c b/arch/blackfin
Traversing the tasks requires holding tasklist_lock, otherwise it
is unsafe.
p.s. However, I'm not sure that calling os_kill_ptraced_process()
in the atomic context is correct. It seem to work, but please
take a closer look.
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/um
find_lock_task_mm() to check all process'
threads for a valid mm, but for uml we'll do it in a separate patch.
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/um/kernel/reboot.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/um/kernel/reboot.c b/arch/um
an appropriate task (with task lock held).
Suggested-by: Oleg Nesterov o...@redhat.com
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
arch/um/kernel/reboot.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/um/kernel/reboot.c b/arch/um/kernel
On Mon, Apr 23, 2012 at 04:57:54PM +0200, Richard Weinberger wrote:
On 23.04.2012 09:09, Anton Vorontsov wrote:
Traversing the tasks requires holding tasklist_lock, otherwise it
is unsafe.
p.s. However, I'm not sure that calling os_kill_ptraced_process()
in the atomic context is correct
find_lock_task_mm(),
which walks up all threads and returns an appropriate task
(with task lock held).
Signed-off-by: Anton Vorontsov anton.voront...@linaro.org
---
include/linux/cpu.h |1 +
kernel/cpu.c| 18 ++
2 files changed, 19 insertions(+)
diff --git
tie-fei.z...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
The patch looks OK.
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
[...]
+static u8 esdhc_readb(struct sdhci_host *host, int reg)
+{
+ int base = reg ~0x3;
+ int shift = (reg 0x3) * 8;
+ u8
On Tue, Aug 23, 2011 at 02:38:41PM +0200, Joakim Tjernlund wrote:
MPC832x does not have enough MURAM to do fixed MURAM allocation.
Change to dynamic allocation.
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Thanks!
p.s. You
discussed, the original code use 8 bit byte
operation,
while in fact, on some powerpc platform, 32 bit operation is needed.
should it be possible fixed by adding some wrapper in IO accessors or
introduce additional sdhci op?
I would do it in the IO accessors.
Thanks,
--
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Email
start
putting chip-specific quirks into sdhci.c. Please don't.
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|= SDHCI_QUIRK_QORIQ_HOSTCAPBLT_ONLY_VS33;
Should really use voltage-ranges, not quirks.
http://www.spinics.net/lists/linux-mmc/msg02785.html
Thanks,
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,mpc8540-pci)) {
+ struct resource r[2];
How about '= {};' initializer instead of the '= NULL's down below?
+
+ r[0].parent = NULL;
+ r[1].parent = NULL;
Thanks,
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ifdefs in the board files:
#ifdef CONFIG_PCI
fsl_add_pci_err();
#endif
Also, why not add this call to the fsl_add_bridge(), so you
won't need to touch board files at all.
Thanks,
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On Wed, Jun 01, 2011 at 06:55:35PM +0400, Dmitry Eremin-Solenikov wrote:
On 6/1/11, Anton Vorontsov avoront...@mvista.com wrote:
On Wed, Jun 01, 2011 at 04:28:11PM +0400, Dmitry Eremin-Solenikov wrote:
[...]
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@lists.ozlabs.org/msg22041.html
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg21273.html
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for renaming sdhci-of-esdhc to sdhci-esdhc-mpc. :-)
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On Thu, May 05, 2011 at 09:22:54PM +0800, Shawn Guo wrote:
[...]
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
[...]
-#ifdef
...@secretlab.ca
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
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will be multiplatform soon, we don't
want to have every mach-* stuff in the single sdhci-pltfm.
So... OK. If that compiles, I'm fine with it. :-D
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Thanks!
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;
+ }
+ /* otherwise, fall through */
+ default:
+ lstatus |= BD_LFLAG(TXBD_TOE);
+ gfar_tx_checksum(skb, fcb);
+ }
}
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happened with this patch?
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approach. :-)
It's an additional information, so won't do any harm anyway...
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;
reg = 0x52;
+ pagesize = 32;
I think you'd better drop the pagesize property altogether, and
instead make the compatible string more specific (if needed at
all. are there any 'catalyst,24c32' chips with pagesize != 32?)
Thanks,
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brings ucc_geth in line with
gianfar:
Don't bring the interface down and up, just reinit controller HW
and PHY.
Signed-off-by: Joakim Tjernlund joakim.tjernl...@transmode.se
Looks sane, thanks!
Reviewed-by: Anton Vorontsov cbouatmai...@gmail.com
It's unclear where exactly adjust_link() hangs, but the patch
looks as the right thing overall.
Thanks!
Reviewed-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/net/ucc_geth.c | 10 +++---
1 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ucc_geth.c b
(of, mpc85xx_l2_err_of_match);
--
1.7.0.5
Can you post a new patch as it doesn't look like this got merged by Andrew so
we need to clean up after ourselves.
It's already in Linus' tree.
Thanks,
- - - -
commit cd1542c8197fc3c2eb3a8301505d5d9738fab1e4
Author: Anton Vorontsov avoront...@mvista.com
Date
that removes
p4080 entry.
Thanks,
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;
+ int len;
I'd place the #ifdef CONFIG_SPI_ESPI, for documentation purposes.
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-controller_state;
- __be32 __iomem *mode = mspi-base-mode;
+ struct fsl_spi_reg *reg_base = (struct fsl_spi_reg *)mspi-reg_base;
No need for these type casts (the same is for the whole patch).
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this fix your problem?
https://patchwork.kernel.org/patch/184752/
It shouldn't. AFAIK, eSPI is PIO-only controller, and the overrun
fix is for the DMA mode.
Thanks,
p.s. Btw, in patch 3/7, is_dma_mapped argument of fsl_espi_bufs()
is unneeded.
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...@kernel.crashing.org
Cc: Grant Likely grant.lik...@secretlab.ca
---
This is not bisectable. You have to merge 1/3 and 2/3.
Thanks,
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reason why that worked is that sysdev/cpm_common.c
maps muram(0)..muram(max).
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]);
[...]
+ fsl_lbc_ctrl_dev-nand = NULL;
+ kfree(elbc_fcm_ctrl);
Will cause NULL dereference and/or use-after-free for other
elbc nand instances. To avoid that, reference counting for
elbc_fcm_ctrl is required.
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;
+}
+
+static const struct of_device_id fsl_lbc_match[] = {
#include linux/mod_devicetable.h is needed for this.
Plus, I think the patch is not runtime bisectable (i.e. you
now do request_irq() here, but not removing it from the nand
driver, so nand will fail to probe).
Thanks,
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--
that's what makes it possible to seamlessly transit from
of_platform_driver to platform_driver.)
The same applies for the second patch as well.
Thanks,
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/asm/fsl_lbc.h
@@ -246,6 +246,7 @@ struct fsl_upm {
int width;
};
+extern unsigned int fsl_lbc_addr(phys_addr_t addr_base);
u32 here.
Other than that, the patch looks good.
Reviewed-by: Anton Vorontsov cbouatmai...@gmail.com
Thanks!
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legitimate.
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= 'a';
}
int main(void)
{
probe();
probe();
return 0;
}
oksana:~$ gcc a.c ./a.out
Segmentation fault
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. Ugh.
It is used, search nand_base.c for controller-lock.
OK, now I see, the driver implements its own chip-controller
(which is exactly what ctrl-controller is). Then we're fine.
Thanks,
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platform_device here?
In the new kernels, of_platform_driver is almost a synonym of
platform_driver, and 'of_platform_driver' stuff is soon to be
deleted. You can use platform_driver just like
of_platform_driver nowadays.
Thanks,
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context, and then reenable it when finished.
The irq is level-low active.
Will do it via disable/re-enable then.
FYI, In newer kernels you don't have to do it manually, there's
request_threaded_irq() for this.
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patches from Anton until it's without regressions here.
Thanks Chris.
I also think that it's better to drop these series now,
and meanwhile I'll try to prepare another patchset.
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= fsl_elbc_nand_remove,
};
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);
}
EXPORT_SYMBOL(fsl_lbc_addr);
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= fsl_lbc_match,
+ },
+ .probe = fsl_lbc_ctrl_probe,
+};
+
+static int __init fsl_lbc_init(void)
+{
+ return of_register_platform_driver(fsl_lbc_ctrl_driver);
+}
+
No need for this empty line.
+module_init(fsl_lbc_init);
Thanks,
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of the processing to
the real IRQ context, keeping the handler lockless (if
possible) or introducing a very fine grained locking.
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On Wed, Sep 08, 2010 at 11:05:48PM +0100, Chris Ball wrote:
Hi Anton,
On Thu, Sep 09, 2010 at 01:57:50AM +0400, Anton Vorontsov wrote:
Thanks!
Would be also great if you could point out which patch causes
most of the performance drop (if any)?
Albert, if you could find time, can
controllers would
be visible for the Linux.
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not needed, so why keep it there?
habit.
;-)
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you don't need _exit().
+MODULE_LICENSE(GPL);
+MODULE_AUTHOR(Freescale Semiconductor);
+MODULE_DESCRIPTION(Freescale Enhanced Local Bus Controller driver);
ditto, no need for this.
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(lbc-bank[bank].or) BR_BA)
- == res.start)
+ == convert_lbc_address(res.start))
break;
if (bank = MAX_BANKS) {
--
1.5.6.5
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these patches? Cc'ed.
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{
};
};
};
Is the (possibly) required driver (of_sc18is60x_spi ?) supposed to be an
I2C slave or an SPI host driver ?
It should be an I2C driver that registers an SPI master (i.e.
calls spi_alloc_master() and spi_register_master()).
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[3] drivers/leds/ledtrig-timer.c
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, and even raw NAND chips.
I.e., by choosing the right methodology you save much more
efforts in the long run.
Thanks,
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On Tue, Aug 31, 2010 at 02:03:44AM -0600, Grant Likely wrote:
On Tue, Aug 24, 2010 at 01:26:23PM +0400, Anton Vorontsov wrote:
With CONFIG_GPIOLIB=n, the 'struct gpio_chip' is not declared,
so the following pops up on PowerPC:
cc1: warnings being treated as errors
In file included
On Tue, Aug 31, 2010 at 10:44:14AM -0600, Grant Likely wrote:
On Tue, Aug 31, 2010 at 2:37 AM, Anton Vorontsov cbouatmai...@gmail.com
wrote:
On Tue, Aug 31, 2010 at 02:03:44AM -0600, Grant Likely wrote:
On Tue, Aug 24, 2010 at 01:26:23PM +0400, Anton Vorontsov wrote:
With CONFIG_GPIOLIB
= bindings into
Documentation/powerpc/dts-bindings/mmc-spi-slot.txt.
And on the next resend, be sure to add Andrew Morton
a...@linux-foundation.org, David Brownell
dbrown...@users.sourceforge.net, and linux-...@vger.kernel.org
the Cc list.
Thanks!
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email: cbouatmai...@gmail.com
inside parameter list
make[2]: *** [arch/powerpc/platforms/52xx/mpc52xx_common.o] Error 1
This patch fixes the issue by providing the proper forward declaration.
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
On Tue, Aug 24, 2010 at 04:26:08PM +1000, Benjamin
On Wed, Aug 18, 2010 at 02:31:42PM -0500, Timur Tabi wrote:
On Tue, Jun 8, 2010 at 2:55 PM, Anton Vorontsov avoront...@mvista.com wrote:
The mpc85xx_mds_setup_arch() function is incomprehensible
and unmaintainable. Factor out all QE specific stuff into
mpc85xx_mds_qe_init
kernel.
Thanks,
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,
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Marvell and GPIO bindings live in their own files, so the TOC should not
mention them.
Also fix chapters numbering.
Signed-off-by: Anton Vorontsov avoront...@mvista.com
---
Documentation/powerpc/booting-without-of.txt | 31 +
1 files changed, 2 insertions(+), 29
for P4080 ESDHC controller.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Btw, where is implementation for the voltage-ranges handling?
---
arch/powerpc/boot/dts/p4080ds.dts |1 +
1 files changed, 1 insertions(+), 0 deletions
:
reports inverted write-protect state;
- sdhci,1-bit-only : (optional) specifies that a controller can
only handle 1-bit data transfers.
+ - sdhci,auto-cmd12: (optional) specifies that a controller can
+only handle auto CMD12.
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Example
(np, sdhci,auto-cmd12, NULL))
+ host-quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
+
+
^^ No need for the two empty lines.
if (of_get_property(np, sdhci,1-bit-only, NULL))
Though, technically the patch looks OK, feel free to add my
Acked-by: Anton Vorontsov
together.
You mean mpc8xxx_add_controller()? Putting 65-line function
on a second indentation level, inside the for loop... sounds
like a bad idea.
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This is needed for proper PCI-E support on P1021 SoCs.
Signed-off-by: Anton Vorontsov avoront...@mvista.com
---
arch/powerpc/sysdev/fsl_pci.c |2 ++
include/linux/pci_ids.h |2 ++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch
commit 2ffe8c5f323c3b9749bf7bc2375d909d20bdbb15 (of: refactor
of_modalias_node() and remove explicit match table), introduced
an unterminated of_match_table, which may cause kernel to oops.
This patch fixes the issue by adding an empty device ID.
Signed-off-by: Anton Vorontsov avoront
will be 3300.
Thanks,
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email: cbouatmai...@gmail.com
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schematics:
http://www.freescale.com/files/32bit/hardware_tools/schematics/MPC8349EMITXESCH.pdf
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belong in this table, at least not its L2.
L3 on p4080 is similar to L2 on these other chips, though, and it
wouldn't take much to get this driver working on it -- but the match
table entry should wait until the differences are accommodated.
Signed-off-by: Anton Vorontsov avoront...@mvista.com
: error: expected expression
before ')' token
arch/powerpc/sysdev/micropatch.c:630: warning: unused variable 'smp'
make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1
Obviously there is no spi_t declaration in 2.6.33.5. So where is this
spi_t declared?
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email: cbouatmai
SDHCI_QUIRK_QORIQ_NO_VDD_180)
The point of making NO_VDD stuff is to make these quirks
chip-agnostic. Ideally, sdhci.c should never know about
particular chips.
So, you shouldn't name quirks with QORIQ.
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(127)
Thanks,
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email: cbouatmai...@gmail.com
irc://irc.freenode.net/bd2
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