RE: [PATCH] soc: fsl: dpio: fix cpu range check

2019-01-14 Thread Bharat Bhushan
> -Original Message- > From: Li Yang > Sent: Tuesday, January 15, 2019 12:47 AM > To: Bharat Bhushan > Cc: Roy Pledge ; linux-ker...@vger.kernel.org; > linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; > bharatb.ya...@gmail.com > Subject: Re

[PATCH] soc: fsl: dpio: fix cpu range check

2019-01-13 Thread Bharat Bhushan
cpu_possible(cpu) will always return true when cpu parameter is from cpumask_next(). Check for nr_cpu_ids rather than !cpu_possible(cpu). Signed-off-by: Bharat Bhushan --- drivers/soc/fsl/dpio/dpio-driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/fsl/dpio

RE: [RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020

2018-08-09 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Thursday, August 9, 2018 11:42 AM > To: Bharat Bhushan ; > b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rutl...@arm.com; > kstew...@lin

RE: [RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020

2018-08-08 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, August 8, 2018 11:27 PM > To: Bharat Bhushan ; > b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rutl...@arm.com; > kstew...@lin

RE: [RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020

2018-08-08 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, August 8, 2018 11:26 AM > To: Bharat Bhushan ; > b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rutl...@arm.com; > kstew...@lin

RE: [RFC 3/5] powerpc/mpic: Add support for non-contiguous irq ranges

2018-08-07 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, August 8, 2018 11:21 AM > To: Bharat Bhushan ; Rob Herring > > Cc: b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rut

RE: [RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020

2018-08-07 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, August 8, 2018 2:44 AM > To: Bharat Bhushan ; > b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rutl...@arm.com; > kstew...@lin

RE: [RFC 3/5] powerpc/mpic: Add support for non-contiguous irq ranges

2018-08-07 Thread Bharat Bhushan
> -Original Message- > From: Scott Wood [mailto:o...@buserror.net] > Sent: Wednesday, August 8, 2018 2:34 AM > To: Rob Herring ; Bharat Bhushan > > Cc: b...@kernel.crashing.org; pau...@samba.org; m...@ellerman.id.au; > ga...@kernel.crashing.org; mark.rut

[RFC 5/5] powerpc/fsl: Add supported-irq-ranges for P2020

2018-07-27 Thread Bharat Bhushan
e as platform is given precedence over device-tree, while I think device-tree should have precedence. Signed-off-by: Bharat Bhushan --- arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 3 +++ arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 5 + 2 files changed, 8 insertions(+) diff --git a/arc

[RFC 4/5] powerpc/mpic: Boot print supported interrupt ranges

2018-07-27 Thread Bharat Bhushan
As mpic can have non-contiguous source of interrupt range, print same during boot. Signed-off-by: Bharat Bhushan --- arch/powerpc/sysdev/mpic.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index

[RFC 3/5] powerpc/mpic: Add support for non-contiguous irq ranges

2018-07-27 Thread Bharat Bhushan
rted-irq-ranges" property in device tree to provide the range of supported source of interrupts. If a reserved interrupt used then it will not be programming h/w, which it does currently, and through warning. Signed-off-by: Bharat Bhushan --- .../devicetree/bindings/powerpc/fsl/mpic.txt |

[RFC 2/5] powerpc/mpic: Rework last source irq calculation logic

2018-07-27 Thread Bharat Bhushan
r are same as before. Signed-off-by: Bharat Bhushan --- arch/powerpc/sysdev/mpic.c | 31 +++ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index b6803bc..d503887 100644 --- a/arch/powerpc/sysdev/mpic.c

[RFC 1/5] powerpc/mpic: move last irq logic to function

2018-07-27 Thread Bharat Bhushan
This function just moves the last-irq calculation logic to a function, while no change in logic. Signed-off-by: Bharat Bhushan --- arch/powerpc/sysdev/mpic.c | 52 +- 1 file changed, 33 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/sysdev

[RFC 0/5] powerpc/mpic: Add non-contiguous interrupt sources

2018-07-27 Thread Bharat Bhushan
ch enables this for P2020RDB-PC for now. Bharat Bhushan (5): powerpc/mpic: move last irq logic to function powerpc/mpic: Rework last source irq calculation logic powerpc/mpic: Add support for non-contiguous irq ranges powerpc/mpic: Boot print supported interrupt ranges powerpc/fsl: Add supported-

[PATCH] powerpc/e200: Skip tlb1 entries used for kernel mapping

2018-07-24 Thread Bharat Bhushan
E200 have TLB1 only and it does not have TLB0. So TLB1 are used for mapping kernel and user-space both. TLB miss handler for E200 does not consider skipping TLBs used for kernel mapping. This patch ensures that we skip tlb1 entries used for kernel mapping (tlbcam_index). Signed-off-by: Bharat

RE: [PATCH] powerpc/mpic: Cleanup irq vector accounting

2018-07-05 Thread Bharat Bhushan
> -Original Message- > From: Michael Ellerman [mailto:m...@ellerman.id.au] > Sent: Wednesday, July 4, 2018 6:57 PM > To: Bharat Bhushan ; > b...@kernel.crashing.org; pau...@samba.org; r...@kernel.org; > ge...@infradead.org; tyr...@linux.vnet.ibm.com; linuxppc- >

[PATCH] powerpc/mpic: Cleanup irq vector accounting

2018-06-29 Thread Bharat Bhushan
Available vector space accounts ipis and timer interrupts while spurious vector was not accounted. Also later mpic_setup_error_int() escape one more vector, seemingly it assumes one spurious vector. Signed-off-by: Bharat Bhushan --- arch/powerpc/sysdev/fsl_mpic_err.c | 2 +- arch/powerpc/sysdev

RE: [PATCH v2 3/3] powerpc/fsl: Implement cpu_show_spectre_v1/v2 for NXP PowerPC Book3E

2018-06-11 Thread Bharat Bhushan
Hi Diana, > -Original Message- > From: Diana Craciun [mailto:diana.crac...@nxp.com] > Sent: Monday, June 11, 2018 6:23 PM > To: linuxppc-dev@lists.ozlabs.org > Cc: m...@ellerman.id.au; o...@buserror.net; Leo Li ; > Bharat Bhushan ; Diana Madalina Craciun > >

RE: [PATCH 2/6 v2] iommu: of: make of_pci_map_rid() available for other devices too

2018-04-18 Thread Bharat Bhushan
xppc- > d...@lists.ozlabs.org; linux-...@vger.kernel.org; Bharat Bhushan > <bharat.bhus...@nxp.com>; stuyo...@gmail.com; Laurentiu Tudor > <laurentiu.tu...@nxp.com>; Leo Li <leoyang...@nxp.com> > Subject: Re: [PATCH 2/6 v2] iommu: of: make of_pci_map_rid() available for > other

[PATCH 3/4 RFC] fsl/msi: Add MSI bank allocation for kernel owned devices

2015-03-02 Thread Bharat Bhushan
then there is no need to have any MSI bank reserved for kernel context. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/sysdev/fsl_msi.c | 88 ++- arch/powerpc/sysdev/fsl_msi.h | 4 ++ 2 files changed, 83 insertions(+), 9 deletions

[PATCH 4/4 RFC] fsl/msi: Add interface to reserve/free msi bank

2015-03-02 Thread Bharat Bhushan
to a Guest. Patches for same will follow this patch. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/include/asm/device.h | 2 + arch/powerpc/include/asm/fsl_msi.h | 26 ++ arch/powerpc/sysdev/fsl_msi.c | 169 +++-- arch

[PATCH 2/4 RFC] fsl/msi: Move fsl, msi mode specific MSI device search out of main loop

2015-03-02 Thread Bharat Bhushan
Moving out the specific MSI device search out of main loop. And now the specific msi device search is placed with other fsl.msi specific code in same function. This is in preparation to MSI bank partitioning. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/sysdev

[PATCH 1/4 RFC] fsl/msi: have msiir register address absolute rather than offset

2015-03-02 Thread Bharat Bhushan
Having absolute address simplifies the code and also removes the confusion around feature-msiir_offset and msi_data-msiir_offset. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/sysdev/fsl_msi.c | 9 +++-- arch/powerpc/sysdev/fsl_msi.h | 2 +- 2 files changed, 4

[PATCH 0/4 RFC] fsl/msi: Add support for MSI bank partitioning

2015-03-02 Thread Bharat Bhushan
and direct assigned devices using VFIO to guest. Bharat Bhushan (4): fsl/msi: have msiir register address absolute rather than offset fsl/msi: Move fsl,msi mode specific MSI device search out of main loop fsl/msi: Add MSI bank allocation for kernel owned devices fsl/msi: Add interface

[PATCH] booke/powerpc: define wimge shift mask to fix compilation error

2014-05-13 Thread Bharat Bhushan
PTE_WIMGE_SHIFT) MAS2_WIMGE_MASK; | ^ | arch/powerpc/kvm/e500_mmu_host.c:631:20: note: each undeclared identifier is reported only once for each function it appears in | make[1]: *** [arch/powerpc/kvm/e500_mmu_host.o] Error 1 Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com

[PATCH] rtc: ds3232 make it possible to share an irq

2014-01-24 Thread Bharat Bhushan
It's possible to have RTC irq shared with other device (e.g. t4240qds board shares ds3232irq with phy one). Handle this in driver. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- drivers/rtc/rtc-ds3232.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git

RE: Error in frreing hugepages with preemption enabled

2013-12-05 Thread Bharat Bhushan
Subject: Re: Error in frreing hugepages with preemption enabled Hi everyone, On Fri, Nov 29, 2013 at 12:13:03PM +0100, Alexander Graf wrote: On 29.11.2013, at 05:38, Bharat Bhushan bharat.bhus...@freescale.com wrote: Hi Alex, I am running KVM guest with host kernel having

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-12-05 Thread Bharat Bhushan
; linux-ker...@vger.kernel.org Subject: Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU) On Thu, 2013-11-28 at 03:19 -0600, Bharat Bhushan wrote: -Original Message- From: Bhushan Bharat-R65777 Sent: Wednesday, November 27, 2013 9:39 PM To: 'Alex Williamson

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-12-05 Thread Bharat Bhushan
; linux-ker...@vger.kernel.org Subject: Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU) On Sun, 2013-11-24 at 23:33 -0600, Bharat Bhushan wrote: -Original Message- From: Alex Williamson [mailto:alex.william...@redhat.com] Sent: Friday, November 22, 2013 2:31

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-11-28 Thread Bharat Bhushan
:33 +, Bharat Bhushan wrote: -Original Message- From: Alex Williamson [mailto:alex.william...@redhat.com] Sent: Friday, November 22, 2013 2:31 AM To: Wood Scott-B07421 Cc: Bhushan Bharat-R65777; linux-...@vger.kernel.org; ag...@suse.de; Yoder Stuart-B08248

RE: [PATCH 1/9 v2] pci:msi: add weak function for returning msi region info

2013-11-28 Thread Bharat Bhushan
, Bharat Bhushan wrote: In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know the MSI region to map its window in h/w. This patch just defines the required weak functions only and will be used by followup patches. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com

Error in frreing hugepages with preemption enabled

2013-11-28 Thread Bharat Bhushan
Hi Alex, I am running KVM guest with host kernel having CONFIG_PREEMPT enabled. With allocated pages things seems to work fine but I uses hugepages for guest I see below prints when quit from qemu. (qemu) QEMU waiting for connection on: telnet:0.0.0.0:,server qemu-system-ppc64:

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-11-27 Thread Bharat Bhushan
...@google.com; linuxppc- d...@lists.ozlabs.org; linux-ker...@vger.kernel.org Subject: Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU) On Mon, 2013-11-25 at 05:33 +, Bharat Bhushan wrote: -Original Message- From: Alex Williamson [mailto:alex.william...@redhat.com

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-11-24 Thread Bharat Bhushan
, Bharat Bhushan wrote: -Original Message- From: Alex Williamson [mailto:alex.william...@redhat.com] Sent: Thursday, November 21, 2013 12:17 AM To: Bhushan Bharat-R65777 Cc: j...@8bytes.org; bhelg...@google.com; ag...@suse.de; Wood Scott-B07421; Yoder Stuart

RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-11-21 Thread Bharat Bhushan
- p...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux- ker...@vger.kernel.org; Bhushan Bharat-R65777 Subject: Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU) On Tue, 2013-11-19 at 10:47 +0530, Bharat Bhushan wrote: From: Bharat Bhushan bharat.bhus...@freescale.com

[PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-11-18 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com PAMU (FSL IOMMU) has a concept of primary window and subwindows. Primary window corresponds to the complete guest iova address space (including MSI space), with respect to IOMMU_API this is termed as geometry. IOVA Base of subwindow is determined

[PATCH 2/9 v2] pci: msi: expose msi region information functions

2013-11-18 Thread Bharat Bhushan
So by now we have defined all the interfaces for getting the msi region, this patch expose the interface to linux subsystem. These will be used by vfio subsystem for setting up iommu for MSI interrupt of direct assignment devices. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1

[PATCH 1/9 v2] pci:msi: add weak function for returning msi region info

2013-11-18 Thread Bharat Bhushan
In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know the MSI region to map its window in h/w. This patch just defines the required weak functions only and will be used by followup patches. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - Added

[PATCH 3/9 v2] powerpc: pci: Add arch specific msi region interface

2013-11-18 Thread Bharat Bhushan
This patch adds the interface to get the msi region information from arch specific code. The machine spicific code is not yet defined. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - None arch/powerpc/include/asm/machdep.h |8 arch/powerpc/kernel/msi.c

[PATCH 4/9 v2] powerpc: msi: Extend the msi region interface to get info from fsl_msi

2013-11-18 Thread Bharat Bhushan
(Freescale PAMU) mapping for devices which are directly assigned using VFIO. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - Atomic increment of bank index for parallel probe of msi node arch/powerpc/sysdev/fsl_msi.c | 42 +++- arch

[PATCH 5/9 v2] pci/msi: interface to set an iova for a msi region

2013-11-18 Thread Bharat Bhushan
This patch defines an interface by which a msi page can be mapped to a specific iova page. This is a requirement in aperture type of IOMMUs (like Freescale PAMU), where we map msi iova page just after guest memory iova address. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2

[PATCH 6/9 v2] powerpc: pci: Extend msi iova page setup to arch specific

2013-11-18 Thread Bharat Bhushan
This patch extend the interface to arch specific code for setting msi iova address for a msi page. Machine specific code is not yet implemented. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2 - new patch arch/powerpc/include/asm/machdep.h |2 ++ arch/powerpc/kernel/msi.c

[PATCH 7/9 v2] pci: msi: Extend msi iova setting interface to powerpc arch

2013-11-18 Thread Bharat Bhushan
Now we Keep track of devices which have msi page mapping to specific iova page for all msi bank. When composing MSI address and data then this list will be traversed. If device found in the list then use configured iova page otherwise iova page will be taken as before. Signed-off-by: Bharat

[PATCH 8/9 v2] vfio: moving some functions in common file

2013-11-18 Thread Bharat Bhushan
. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - removed un-necessary header file inclusion - mark static function which are internal to *common.c drivers/vfio/Makefile|4 +- drivers/vfio/vfio_iommu_common.c | 227

[PATCH 9/9 v2] vfio pci: Add vfio iommu implementation for FSL_PAMU

2013-11-18 Thread Bharat Bhushan
). Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - Use lock around msi-dma list - check for overlap between dma and msi-dma pages - Some code cleanup as per various comments drivers/vfio/Kconfig |6 + drivers/vfio/Makefile |1 + drivers

RE: [PATCH v9] PPC: POWERNV: move iommu_add_device earlier

2013-11-13 Thread Bharat Bhushan
from Freescale driver. iommu_add_device() and iommu_del_device() are public now. Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru Tested-by: Bharat Bhushan bharat.bhus...@freescale.com --- Changes: v9: * removed KVM from the subject as it is not really a KVM patch so PPC mainainter

RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle

2013-11-10 Thread Bharat Bhushan
Those codes just for discuss with Bharat. He want to make one flow at show_pw20_wait_time/ show_altivec_idle_wait_time function. If we do that, we need to initialize pw20_wt/altivec_idle_wt. I will keep this stuff at show_pw20_wait_time/show_altivec_idle_wait_time and add a comment

RE: [PATCH v4 1/4] dma: imx-sdma: Add sdma firmware version 2 support

2013-11-09 Thread Bharat Bhushan
-Original Message- From: Linuxppc-dev [mailto:linuxppc-dev- bounces+bharat.bhushan=freescale@lists.ozlabs.org] On Behalf Of Nicolin Chen Sent: Friday, November 08, 2013 4:20 PM To: vinod.k...@intel.com; dan.j.willi...@intel.com; s.ha...@pengutronix.de; ti...@tabi.org;

RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle

2013-11-05 Thread Bharat Bhushan
-Original Message- From: Wang Dongsheng-B40534 Sent: Tuesday, November 05, 2013 8:40 AM To: Wood Scott-B07421 Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec idle -Original

[PATCH 1/5 RFC] pci:msi: add weak function for returning msi region info

2013-10-29 Thread Bharat Bhushan
In Aperture type of IOMMU (like FSL PAMU), VFIO-iommu system need to know the MSI region to map its window in h/w. This patch just defines the required weak functions only and will be used by followup patches. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- drivers/pci/msi.c

[PATCH 4/5 RFC] pci: msi: expose msi region information functions

2013-10-29 Thread Bharat Bhushan
So by now we have defined all the interfaces for getting the msi region, this patch expose the interface to linux subsystem. These will be used by vfio subsystem for setting up iommu for MSI interrupt of direct assignment devices. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com

[PATCH 2/5 RFC] powerpc: pci: Add arch specific msi region interface

2013-10-29 Thread Bharat Bhushan
This patch adds the interface to get the msi region information from arch specific code. The machine spicific code is not yet defined. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/include/asm/machdep.h |8 arch/powerpc/kernel/msi.c | 18

[PATCH 3/5 RFC] powerpc: msi: Extend the msi region interface to get info from fsl_msi

2013-10-29 Thread Bharat Bhushan
(Freescale PAMU) mapping for devices which are directly assigned using VFIO. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/sysdev/fsl_msi.c | 42 +++- arch/powerpc/sysdev/fsl_msi.h | 11 - 2 files changed, 45 insertions

[PATCH 5/5 RFC] vfio: setup iova-base for msi interrupts for vfio assigned device

2013-10-29 Thread Bharat Bhushan
on design. I will divide this in multiple logical patches once this design is accepted. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/include/asm/machdep.h |2 + arch/powerpc/kernel/msi.c | 10 ++ arch/powerpc/sysdev/fsl_msi.c | 64

[PATCH 0/5 RFC] vfio/pci: add interface to for MSI support with FSL PAMU

2013-10-29 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com PAMU (FSL IOMMU) has a concept of primary window and subwindows. Primary window corresponds to the complete guest iova address space (including MSI space), with respect to IOMMU_API this is termed as geometry. IOVA Base of subwindow is determined

[PATCH 1/4] powerpc: Added __cmpdi2 for signed 64bit comparision

2013-10-08 Thread Bharat Bhushan
This was missing on powerpc and I am getting compilation error drivers/vfio/pci/vfio_pci_rdwr.c:193: undefined reference to `__cmpdi2' drivers/vfio/pci/vfio_pci_rdwr.c:193: undefined reference to `__cmpdi2' Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kernel

[PATCH] powerpc: Added __cmpdi2 for signed 64bit comparision

2013-10-08 Thread Bharat Bhushan
This was missing on powerpc and I am getting compilation error drivers/vfio/pci/vfio_pci_rdwr.c:193: undefined reference to `__cmpdi2' drivers/vfio/pci/vfio_pci_rdwr.c:193: undefined reference to `__cmpdi2' Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kernel

[PATCH 5/6 v7] kvm: booke: clear host tlb reference flag on guest tlb invalidation

2013-09-22 Thread Bharat Bhushan
same entry later Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v6-7 - Comment re-phrased v5-v6 - Reordered the flag clearing steps as per comment on v5 v4-v5 - New change arch/powerpc/kvm/e500_mmu_host.c | 16 1 files changed, 8 insertions(+), 8 deletions

[PATCH 0/6 v5] kvm: powerpc: use cache attributes from linux pte

2013-09-19 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com First patch is a typo fix where book3e define _PAGE_LENDIAN while it should be defined as _PAGE_ENDIAN. This seems to show that this is never exercised :-) Second and third patch is to allow guest controlling G-Guarded and E-Endian TLB

[PATCH 1/6 v5] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN

2013-09-19 Thread Bharat Bhushan
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined is _PAGE_LENDIAN which is wrong and that should be _PAGE_ENDIAN. There are no compilation errors as arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0 as it is not defined anywhere. Signed-off-by: Bharat Bhushan

[PATCH 3/6 v5] kvm: powerpc: allow guest control G attribute in mas2

2013-09-19 Thread Bharat Bhushan
G bit in MAS2 indicates whether the page is Guarded. There is no reason to stop guest setting G, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v5 - no change arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch

[PATCH 2/6 v5] kvm: powerpc: allow guest control E attribute in mas2

2013-09-19 Thread Bharat Bhushan
E bit in MAS2 bit indicates whether the page is accessed in Little-Endian or Big-Endian byte order. There is no reason to stop guest setting E, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v5 - no change arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1

[PATCH 5/6 v5] kvm: booke: clear host tlb reference flag on guest tlb invalidation

2013-09-19 Thread Bharat Bhushan
same entry later Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v3- v5 - New patch (found this issue when doing vfio-pci development) arch/powerpc/kvm/e500_mmu_host.c | 12 +++- 1 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kvm

[PATCH 4/6 v5] kvm: powerpc: keep only pte search logic in lookup_linux_pte

2013-09-19 Thread Bharat Bhushan
-by: Bharat Bhushan bharat.bhus...@freescale.com --- v4-v5 - No change arch/powerpc/include/asm/pgtable.h | 24 +++ arch/powerpc/kvm/book3s_hv_rm_mmu.c | 36 +++--- 2 files changed, 36 insertions(+), 24 deletions(-) diff --git a/arch/powerpc

[PATCH 6/6 v5] kvm: powerpc: use caching attributes as per linux pte

2013-09-19 Thread Bharat Bhushan
KVM uses same WIM tlb attributes as the corresponding qemu pte. For this we now search the linux pte for the requested page and get these cache caching/coherency attributes from pte. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v4-v5 - No change arch/powerpc/include/asm

[PATCH 1/7] powerpc: Add interface to get msi region information

2013-09-19 Thread Bharat Bhushan
to create IOMMU (Freescale PAMU) mapping for devices which are directly assigned using VFIO. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/include/asm/machdep.h |8 +++ arch/powerpc/include/asm/pci.h |2 + arch/powerpc/kernel/msi.c | 18

[PATCH 3/7] fsl iommu: add get_dev_iommu_domain

2013-09-19 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com returns the iommu_domain of the requested device for fsl pamu. Use PCI controller dev struct for pci devices as current LIODN schema assign LIODN to PCI controller not PCI device. This will be corrected with proper LIODN schema. Signed-off

[PATCH 2/7] iommu: add api to get iommu_domain of a device

2013-09-19 Thread Bharat Bhushan
This api return the iommu domain to which the device is attached. The iommu_domain is required for making API calls related to iommu. Follow up patches which use this API to know iommu maping. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- drivers/iommu/iommu.c | 10

[PATCH 0/7] vfio-pci: add support for Freescale IOMMU (PAMU)

2013-09-19 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com This patchset adds support for vfio-pci with Freescale IOMMU (PAMU- Peripheral Access Management Unit) The Freescale PAMU is an aperture-based IOMMU with the following characteristics. Each device has an entry in a table in memory describing

[PATCH 5/7] iommu: supress loff_t compilation error on powerpc

2013-09-19 Thread Bharat Bhushan
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- drivers/vfio/pci/vfio_pci_rdwr.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index 210db24..8a8156a 100644 --- a/drivers/vfio/pci

[PATCH 4/7] powerpc: translate msi addr to iova if iommu is in use

2013-09-19 Thread Bharat Bhushan
If the device is attached with iommu domain then set MSI address to the iova configured in PAMU. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/sysdev/fsl_msi.c | 56 +++- 1 files changed, 54 insertions(+), 2 deletions(-) diff

[PATCH 6/7] vfio: moving some functions in common file

2013-09-19 Thread Bharat Bhushan
Some function defined in vfio_iommu_type1.c were common and we want to use these for FSL IOMMU (PAMU) and iommu-none driver. So some of them are moved to vfio_iommu_common.c I think we can do more of that but we will take this step by step. Signed-off-by: Bharat Bhushan bharat.bhus

[PATCH 7/7] vfio pci: Add vfio iommu implementation for FSL_PAMU

2013-09-19 Thread Bharat Bhushan
-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- drivers/vfio/Kconfig |6 + drivers/vfio/Makefile |1 + drivers/vfio/vfio_iommu_fsl_pamu.c | 952 include/uapi/linux/vfio.h | 100 4 files changed, 1059

[PATCH 5/6 v6] kvm: booke: clear host tlb reference flag on guest tlb invalidation

2013-09-19 Thread Bharat Bhushan
same entry later Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v5-v6 - Fix flag clearing comment arch/powerpc/kvm/e500_mmu_host.c | 16 1 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm

[PATCH 6/6 v4] kvm: powerpc: use caching attributes as per linux pte

2013-08-15 Thread Bharat Bhushan
KVM uses same WIM tlb attributes as the corresponding qemu pte. For this we now search the linux pte for the requested page and get these cache caching/coherency attributes from pte. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v3-v4 - s/printk/printk_ratelimited till we return

[PATCH 2/6 v3] kvm: powerpc: allow guest control E attribute in mas2

2013-08-06 Thread Bharat Bhushan
E bit in MAS2 bit indicates whether the page is accessed in Little-Endian or Big-Endian byte order. There is no reason to stop guest setting E, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2-v3 - no change v1-v2 - no change arch/powerpc/kvm/e500.h |2 +- 1

[PATCH 1/6 v3] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN

2013-08-06 Thread Bharat Bhushan
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined is _PAGE_LENDIAN which is wrong and should be _PAGE_ENDIAN. There are no compilation errors as arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0 as it is not defined anywhere. Signed-off-by: Bharat Bhushan bharat.bhus

[PATCH 0/6 v3] kvm: powerpc: use cache attributes from linux pte

2013-08-06 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com First patch is a typo fix where book3e define _PAGE_LENDIAN while it should be defined as _PAGE_ENDIAN. This seems to show that this is never exercised :-) Second and third patch is to allow guest controlling G-Guarded and E-Endian TLB attributes

[PATCH 3/6 v3] kvm: powerpc: allow guest control G attribute in mas2

2013-08-06 Thread Bharat Bhushan
G bit in MAS2 indicates whether the page is Guarded. There is no reason to stop guest setting G, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2-v3 - no change v1-v2 - no change arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1 insertions(+), 1 deletions

[PATCH 4/6 v3] powerpc: move linux pte/hugepte search to more generic file

2013-08-06 Thread Bharat Bhushan
Linux pte search functions find_linux_pte_or_hugepte() and find_linux_pte() have nothing specific to 64bit anymore. So they are move from pgtable-ppc64.h to asm/pgtable.h Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2-v3 - no change v1-v2 - This is a new change

[PATCH 6/6 v3] kvm: powerpc: use caching attributes as per linux pte

2013-08-06 Thread Bharat Bhushan
KVM uses same WIM tlb attributes as the corresponding qemu pte. For this we now search the linux pte for the requested page and get these cache caching/coherency attributes from pte. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2-v3 - setting pgdir before

[PATCH 5/6 v3] kvm: powerpc: keep only pte search logic in lookup_linux_pte

2013-08-06 Thread Bharat Bhushan
-by: Bharat Bhushan bharat.bhus...@freescale.com --- v2-v3 - New change arch/powerpc/include/asm/pgtable.h | 23 + arch/powerpc/kvm/book3s_hv_rm_mmu.c | 38 +++--- 2 files changed, 35 insertions(+), 26 deletions(-) diff --git a/arch/powerpc

[PATCH 0/6 v2] kvm: powerpc: use cache attributes from linux pte

2013-08-01 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com First patch is a typo fix where book3e define _PAGE_LENDIAN while it should be defined as _PAGE_ENDIAN. This seems to show that this is never exercised :-) Second and third patch is to allow guest controlling G-Guarded and E-Endiany TLB

[PATCH 1/6 v2] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN

2013-08-01 Thread Bharat Bhushan
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined is _PAGE_LENDIAN which is wrong and should be _PAGE_ENDIAN. There are no compilation errors as arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0 as it is not defined anywhere. Signed-off-by: Bharat Bhushan bharat.bhus

[PATCH 2/6 v2] kvm: powerpc: allow guest control E attribute in mas2

2013-08-01 Thread Bharat Bhushan
E bit in MAS2 bit indicates whether the page is accessed in Little-Endian or Big-Endian byte order. There is no reason to stop guest setting E, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - no change arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1

[PATCH 3/6 v2] kvm: powerpc: allow guest control G attribute in mas2

2013-08-01 Thread Bharat Bhushan
G bit in MAS2 indicates whether the page is Guarded. There is no reason to stop guest setting E, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - no change arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git

[PATCH 4/6 v2] powerpc: move linux pte/hugepte search to more generic file

2013-08-01 Thread Bharat Bhushan
Linux pte search functions find_linux_pte_or_hugepte() and find_linux_pte() have nothing specific to 64bit anymore. So they are move from pgtable-ppc64.h to asm/pgtable.h Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - This is a new change in this version arch/powerpc

[PATCH 5/6 v2] kvm: powerpc: booke: Add linux pte lookup like booke3s

2013-08-01 Thread Bharat Bhushan
KVM need to lookup linux pte for getting TLB attributes (WIMGE). This is similar to how book3s does. This will be used in follow-up patches. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - This is a new change in this version arch/powerpc/include/asm/kvm_booke.h | 73

[PATCH 6/6 v2] kvm: powerpc: use caching attributes as per linux pte

2013-08-01 Thread Bharat Bhushan
KVM uses same WIM tlb attributes as the corresponding qemu pte. For this we now search the linux pte for the requested page and get these cache caching/coherency attributes from pte. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v1-v2 - Use Linux pte for wimge rather than RAM

[PATCH 1/4] powerpc: book3e: _PAGE_LENDIAN must be _PAGE_ENDIAN

2013-07-25 Thread Bharat Bhushan
For booke3e _PAGE_ENDIAN is not defined. Infact what is defined is _PAGE_LENDIAN which is wrong and that should be _PAGE_ENDIAN. There are no compilation errors as arch/powerpc/include/asm/pte-common.h defines _PAGE_ENDIAN to 0 as it is not defined anywhere. Signed-off-by: Bharat Bhushan

[PATCH 3/4] kvm: powerpc: allow guest control G attribute in mas2

2013-07-25 Thread Bharat Bhushan
G bit in MAS2 indicates whether the page is Guarded. There is no reason to stop guest setting G, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kvm/e500.h

[PATCH 2/4] kvm: powerpc: allow guest control E attribute in mas2

2013-07-25 Thread Bharat Bhushan
E bit in MAS2 bit indicates whether the page is accessed in Little-Endian or Big-Endian byte order. There is no reason to stop guest setting E, so allow him. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kvm/e500.h |2 +- 1 files changed, 1 insertions(+), 1

[PATCH 4/4] kvm: powerpc: set cache coherency only for RAM pages

2013-07-25 Thread Bharat Bhushan
is not yet supported. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kvm/e500_mmu_host.c | 24 +++- 1 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c index 1c6a9d7

[PATCH 0/2] powerpc: allow kvm to use kerel debug framework

2013-07-04 Thread Bharat Bhushan
From: Bharat Bhushan bharat.bhus...@freescale.com This patchset moves the debug registers in a structure, which allows kvm to use same structure for debug emulation. Note: Earilier a patchset https://lists.ozlabs.org/pipermail/linuxppc-dev/2013-June/108132.html; was sent which is a bunch of six

[PATCH 1/2] powerpc: remove unnecessary line continuations

2013-07-04 Thread Bharat Bhushan
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kernel/process.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index c517dbe..19b8733 100644 --- a/arch/powerpc/kernel/process.c

[PATCH 2/2] powerpc: move debug registers in a structure

2013-07-04 Thread Bharat Bhushan
This way we can use same data type struct with KVM and also help in using other debug related function. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/include/asm/processor.h | 38 + arch/powerpc/include/asm/reg_booke.h |8 +- arch/powerpc/kernel/asm

[PATCH 2/4 v6] KVM: PPC: exit to user space on ehpriv 1 instruction

2013-07-04 Thread Bharat Bhushan
ehpriv 1 instruction is used for setting software breakpoints by user space. This patch adds support to exit to user space with run-debug have relevant information. As this is the first point we are using run-debug, also defined the run-debug structure. Signed-off-by: Bharat Bhushan bharat.bhus

[PATCH 1/4 v6] powerpc: export debug registers save function for KVM

2013-07-04 Thread Bharat Bhushan
KVM need this function when switching from vcpu to user-space thread. My subsequent patch will use this function. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v5-v6 - switch_booke_debug_regs() not guarded by the compiler switch arch/powerpc/include/asm/switch_to.h |1

[PATCH 3/4 v6] KVM: PPC: Using struct debug_reg

2013-07-04 Thread Bharat Bhushan
For KVM also use the struct debug_reg defined in asm/processor.h Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- v5-v6 - no changes arch/powerpc/include/asm/kvm_host.h | 13 + arch/powerpc/kvm/booke.c| 34 -- 2 files

[PATCH 4/4 v6] KVM: PPC: Add userspace debug stub support

2013-07-04 Thread Bharat Bhushan
or not. If this is unexpected exception (breakpoint/watchpoint event not set by userspace) then let us leave the action on user space. This is similar to what it was before, only thing is that now we have proper exit state available to user space. Signed-off-by: Bharat Bhushan bharat.bhus

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