[PATCH v2] cpuidle-pseries: Fix CEDE latency conversion from tb to us

2020-09-03 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for CEDE(0)") sets the exit latency of CEDE(0) based on the latency values of the Extended CEDE states advertised by the platform. The values advertised by the platform are in timebase ticks.

Re: [PATCH] cpuidle-pseries: Fix CEDE latency conversion from tb to us

2020-09-02 Thread Gautham R Shenoy
Hello Joel, On Wed, Sep 02, 2020 at 01:08:35AM +, Joel Stanley wrote: > On Tue, 1 Sep 2020 at 14:09, Gautham R. Shenoy > wrote: > > > > From: "Gautham R. Shenoy" > > > > commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for > &g

[PATCH] cpuidle-pseries: Fix CEDE latency conversion from tb to us

2020-09-01 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" commit d947fb4c965c ("cpuidle: pseries: Fixup exit latency for CEDE(0)") sets the exit latency of CEDE(0) based on the latency values of the Extended CEDE states advertised by the platform. The values advertised by the platform are in timebase ticks.

Re: [PATCH] powerpc/powernv/idle: add a basic stop 0-3 driver for POWER10

2020-08-19 Thread Gautham R Shenoy
code. The POWER10 deep sleep code > (e.g., the BHRB restore) has been taken out, but it can be re-added > when stop > 3 support is added. MMCRA[BHRB] save/restore was in the shallow stop-state path. But we can add it back later. > > Cc: Ryan P Grimm > Cc: Michael Neuling &

Re: [PATCH v5 06/10] powerpc/smp: Optimize start_secondary

2020-08-11 Thread Gautham R Shenoy
here, localize the sibling_mask variable to within the if > condition. > > Cc: linuxppc-dev > Cc: LKML > Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Sheno

Re: [RFC PATCH 2/2] powerpc/powernv/cpufreq: Don't assume chip id is same as Linux node id

2020-08-04 Thread Gautham R Shenoy
signed int nid; > + > chips[i].id = chip[i]; > - cpumask_copy([i].mask, cpumask_of_node(chip[i])); > + /* > + * On powervn platforms firmware group id is same as chipd id. But doesn't hurt to be safe :-) Reviewed-by: Gautham R. Shenoy >

Re: [PATCH v2] powerpc: Warn about use of smt_snooze_delay

2020-08-04 Thread Gautham R Shenoy
y cleanup.") > Cc: sta...@vger.kernel.org # v3.14 > Signed-off-by: Joel Stanley Sorry I missed this v2. The patch looks good to me. Acked-by: Gautham R. Shenoy > -- > v2: > Use pr_warn instead of WARN > Reword and print proccess name with pid in message > Leave CPU

Re: [PATCH v4 09/10] Powerpc/smp: Create coregroup domain

2020-07-31 Thread Gautham R Shenoy
Hi Srikar, Valentin, On Wed, Jul 29, 2020 at 11:43:55AM +0530, Srikar Dronamraju wrote: > * Valentin Schneider [2020-07-28 16:03:11]: > [..snip..] > At this time the current topology would be good enough i.e BIGCORE would > always be equal to a MC. However in future we could have chips that

Re: [PATCH v4 06/10] powerpc/smp: Generalize 2nd sched domain

2020-07-29 Thread Gautham R Shenoy
Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Jordan Niethe > Signed-off-by: Srikar Dronamraju Reviewed-by: Gautham R. Shenoy &g

[PATCH v3 3/3] cpuidle-pseries : Fixup exit latency for CEDE(0)

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" We are currently assuming that CEDE(0) has exit latency 10us, since there is no way for us to query from the platform. However, if the wakeup latency of an Extended CEDE state is smaller than 10us, then we can be sure that the exit latency of CEDE(0) cann

[PATCH v3 2/3] cpuidle-pseries: Add function to parse extended CEDE records

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently we use CEDE with latency-hint 0 as the only other idle state on a dedicated LPAR apart from the polling "snooze" state. The platform might support additional extended CEDE idle states, which can be discovered through the "ibm,get-sy

[PATCH v3 0/3] cpuidle-pseries: Parse extended CEDE information for idle.

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" This is a v3 of the patch series to parse the extended CEDE information in the pseries-cpuidle driver. The previous two versions of the patches can be found here: v2: https://lore.kernel.org/lkml/1596005254-25753-1-git-send-email-...@linux.vnet.ibm.com/

[PATCH v3 1/3] cpuidle-pseries: Set the latency-hint before entering CEDE

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" As per the PAPR, each H_CEDE call is associated with a latency-hint to be passed in the VPA field "cede_latency_hint". The CEDE states that we were implicitly entering so far is CEDE with latency-hint = 0. This patch explicitly sets the latenc

[PATCH v2 3/3] cpuidle-pseries : Fixup exit latency for CEDE(0)

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" We are currently assuming that CEDE(0) has exit latency 10us, since there is no way for us to query from the platform. However, if the wakeup latency of an Extended CEDE state is smaller than 10us, then we can be sure that the exit latency of CEDE(0) cann

[PATCH v2 0/3] cpuidle-pseries: Parse extended CEDE information for idle.

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Hi, This is a v2 of the patch series to parse the extended CEDE information in the pseries-cpuidle driver. The v1 of this patchset can be found here : https://lore.kernel.org/linuxppc-dev/1594120299-31389-1-git-send-email-...@linux.vnet.ibm.com/ The chan

[PATCH v2 1/3] cpuidle-pseries: Set the latency-hint before entering CEDE

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" As per the PAPR, each H_CEDE call is associated with a latency-hint to be passed in the VPA field "cede_latency_hint". The CEDE states that we were implicitly entering so far is CEDE with latency-hint = 0. This patch explicitly sets the latenc

[PATCH v2 2/3] cpuidle-pseries: Add function to parse extended CEDE records

2020-07-29 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently we use CEDE with latency-hint 0 as the only other idle state on a dedicated LPAR apart from the polling "snooze" state. The platform might support additional extended CEDE idle states, which can be discovered through the "ibm,get-sy

Re: [PATCH 0/5] cpuidle-pseries: Parse extended CEDE information for idle.

2020-07-27 Thread Gautham R Shenoy
Hello Rafael, On Mon, Jul 27, 2020 at 04:14:12PM +0200, Rafael J. Wysocki wrote: > On Tue, Jul 7, 2020 at 1:32 PM Gautham R Shenoy > wrote: > > > > Hi, > > > > On Tue, Jul 07, 2020 at 04:41:34PM +0530, Gautham R. Shenoy wrote: > > > Fr

Re: [PATCH v4 09/10] Powerpc/smp: Create coregroup domain

2020-07-27 Thread Gautham R Shenoy
gt; Cc: LKML > Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Jordan Niethe > Sign

Re: [PATCH v3 09/10] powerpc/smp: Create coregroup domain

2020-07-26 Thread Gautham R Shenoy
Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Jordan Niethe > Signed

Re: [PATCH v3 05/10] powerpc/smp: Dont assume l2-cache to be superset of sibling

2020-07-24 Thread Gautham R Shenoy
ask if and only if shared_caches is set. > > Cc: linuxppc-dev > Cc: LKML > Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijl

Re: [PATCH v2 05/10] powerpc/smp: Dont assume l2-cache to be superset of sibling

2020-07-24 Thread Gautham R Shenoy
On Wed, Jul 22, 2020 at 12:27:47PM +0530, Srikar Dronamraju wrote: > * Gautham R Shenoy [2020-07-22 11:51:14]: > > > Hi Srikar, > > > > > diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c > > > index 72f16dc0cb26..57468877499a 100644 &

Re: [PATCH v3 04/10] powerpc/smp: Move topology fixups into a new function

2020-07-24 Thread Gautham R Shenoy
> Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Jordan Niethe > Signed-off-by: Srikar Dronamraju Reviewed-by: Gautham R.

Re: [PATCH v3 02/10] powerpc/smp: Merge Power9 topology with Power topology

2020-07-24 Thread Gautham R Shenoy
> domain. > > Cc: linuxppc-dev > Cc: LKML > Cc: Michael Ellerman > Cc: Nicholas Piggin > Cc: Anton Blanchard > Cc: Oliver O'Halloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Gautham R Shenoy > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Va

Re: [PATCH v2 10/10] powerpc/smp: Implement cpu_to_coregroup_id

2020-07-22 Thread Gautham R Shenoy
Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Cc: Jordan Niethe > Signed-off-by: Srikar Dronamraju Looks good to me. Reviewed-by : Gautham R. Shenoy > --- > Changelog v1 -> v2: > pow

Re: [PATCH v2 09/10] Powerpc/smp: Create coregroup domain

2020-07-22 Thread Gautham R Shenoy
gt; Cc: LKML > Cc: Michael Ellerman > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan >

Re: [PATCH v2 06/10] powerpc/smp: Generalize 2nd sched domain

2020-07-22 Thread Gautham R Shenoy
nar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Cc: Jordan Niethe > Signed-off-by: Srikar Dronamraj

Re: [PATCH v2 05/10] powerpc/smp: Dont assume l2-cache to be superset of sibling

2020-07-22 Thread Gautham R Shenoy
ask if and only if shared_caches is set. > > Cc: linuxppc-dev > Cc: LKML > Cc: Michael Ellerman > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Bl

Re: [PATCH v2 04/10] powerpc/smp: Enable small core scheduling sooner

2020-07-21 Thread Gautham R Shenoy
t; Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Cc: Jordan Niethe > Signed-off-by: Srikar Dronamraju >

Re: [PATCH v2 02/10] powerpc/smp: Merge Power9 topology with Power topology

2020-07-21 Thread Gautham R Shenoy
> domain. > > Cc: linuxppc-dev > Cc: LKML > Cc: Michael Ellerman > Cc: Ingo Molnar > Cc: Peter Zijlstra > Cc: Valentin Schneider > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R

Re: [PATCH v4 2/3] powerpc/powernv/idle: Rename pnv_first_spr_loss_level variable

2020-07-21 Thread Gautham R Shenoy
E_FULL_CONTEXT set, in other places the kernel uses the > "deep" states as terminology. Hence renaming the variable to be coherent > to its semantics. > > Signed-off-by: Pratik Rajesh Sampat Acked-by: Gautham R. Shenoy > --- > arch/powerpc/platforms/powernv/idle.c | 18 +++

Re: [PATCH v3 2/3] powerpc/powernv/idle: Rename pnv_first_spr_loss_level variable

2020-07-21 Thread Gautham R Shenoy
Hi, On Wed, Jul 22, 2020 at 12:37:41AM +1000, Nicholas Piggin wrote: > Excerpts from Pratik Sampat's message of July 21, 2020 8:29 pm: > > > > > > On 20/07/20 5:27 am, Nicholas Piggin wrote: > >> Excerpts from Pratik Rajesh Sampat's message of July 18, 2020 4:53 am: > >>> Replace the variable

Re: [v3 11/15] powerpc/perf: BHRB control to disable BHRB logic when not used

2020-07-20 Thread Gautham R Shenoy
ie, on explicit need from user. Also save/restore MMCRA in the > restore path of state-loss idle state to make sure we keep BHRB disabled > if it was not enabled on request at runtime. > > Signed-off-by: Athira Rajeev For arch/powerpc/platforms/powernv/idle.c Reviewed-by: Gauth

Re: [PATCH 10/11] powerpc/smp: Implement cpu_to_coregroup_id

2020-07-20 Thread Gautham R Shenoy
Hi Srikar, On Mon, Jul 20, 2020 at 11:18:16AM +0530, Srikar Dronamraju wrote: > * Gautham R Shenoy [2020-07-17 13:56:53]: > > > On Tue, Jul 14, 2020 at 10:06:23AM +0530, Srikar Dronamraju wrote: > > > Lookup the coregroup id from the associativity array. > > &

Re: [PATCH 06/11] powerpc/smp: Generalize 2nd sched domain

2020-07-20 Thread Gautham R Shenoy
On Mon, Jul 20, 2020 at 11:49:11AM +0530, Srikar Dronamraju wrote: > * Gautham R Shenoy [2020-07-17 12:07:55]: > > > On Tue, Jul 14, 2020 at 10:06:19AM +0530, Srikar Dronamraju wrote: > > > Currently "CACHE" domain happens to be the 2nd sched domain as per >

Re: [PATCH 05/11] powerpc/smp: Dont assume l2-cache to be superset of sibling

2020-07-20 Thread Gautham R Shenoy
Hi Srikar, On Mon, Jul 20, 2020 at 12:15:04PM +0530, Srikar Dronamraju wrote: > * Gautham R Shenoy [2020-07-17 11:30:11]: > > > Hi Srikar, > > > > On Tue, Jul 14, 2020 at 10:06:18AM +0530, Srikar Dronamraju wrote: > > > Current code assumes that cpumas

Re: [PATCH v2 2/2] selftest/cpuidle: Add support for cpuidle latency measurement

2020-07-19 Thread Gautham R Shenoy
Hi Pratik, On Fri, Jul 17, 2020 at 02:48:01PM +0530, Pratik Rajesh Sampat wrote: > This patch adds support to trace IPI based and timer based wakeup > latency from idle states > > Latches onto the test-cpuidle_latency kernel module using the debugfs > interface to send IPIs or schedule a timer

Re: [PATCH v2 1/2] cpuidle: Trace IPI based and timer based wakeup latency from idle states

2020-07-19 Thread Gautham R Shenoy
ncrease the resolution of IPI wakeup] > > Signed-off-by: Pratik Rajesh Sampat The debugfs module looks good to me. Reviewed-by: Gautham R. Shenoy > --- > drivers/cpuidle/Makefile | 1 + > drivers/cpuidle/test-cpuidle_latency.c | 150 + >

Re: [PATCH 11/11] powerpc/smp: Provide an ability to disable coregroup

2020-07-17 Thread Gautham R Shenoy
loran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju We need this documented in the Documentation/admin-guide/kernel-parameters.txt Other than that, the patch

Re: [PATCH 10/11] powerpc/smp: Implement cpu_to_coregroup_id

2020-07-17 Thread Gautham R Shenoy
smallest coregroup, which currently > corresponds to the penultimate domain in the device-tree. > > Cc: linuxppc-dev > Cc: Michael Ellerman > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautha

Re: [PATCH 09/11] Powerpc/smp: Create coregroup domain

2020-07-17 Thread Gautham R Shenoy
On Fri, Jul 17, 2020 at 01:49:26PM +0530, Gautham R Shenoy wrote: > > +int cpu_to_coregroup_id(int cpu) > > +{ > > + return cpu_to_core_id(cpu); > > +} > > > So, if has_coregroup_support() returns true, then since the core_group > identification i

Re: [PATCH 09/11] Powerpc/smp: Create coregroup domain

2020-07-17 Thread Gautham R Shenoy
lerman > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju > --- > arch/powerpc/include/asm/topology.h | 10

Re: [PATCH 08/11] powerpc/smp: Allocate cpumask only after searching thread group

2020-07-17 Thread Gautham R Shenoy
Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju Good fix. Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/kernel/smp.c |

Re: [PATCH 07/11] Powerpc/numa: Detect support for coregroup

2020-07-17 Thread Gautham R Shenoy
c: linuxppc-dev > Cc: Michael Ellerman > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju This looks good to me from the discove

Re: [PATCH 06/11] powerpc/smp: Generalize 2nd sched domain

2020-07-17 Thread Gautham R Shenoy
; Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju > --- > arch/powerpc/kernel/smp.c | 48 +++ > 1 file changed, 34 inserti

Re: [PATCH 05/11] powerpc/smp: Dont assume l2-cache to be superset of sibling

2020-07-17 Thread Gautham R Shenoy
t; Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju > --- > arch/powerpc/kernel/smp.c | 28 +++

Re: [PATCH 04/11] powerpc/smp: Enable small core scheduling sooner

2020-07-16 Thread Gautham R Shenoy
Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju I don't see a problem with this. However, since we are now going to be maintaining a single

Re: [PATCH 03/11] powerpc/smp: Move powerpc_topology above

2020-07-16 Thread Gautham R Shenoy
t; Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronamraju Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/kernel/smp.c | 1

Re: [PATCH 02/11] powerpc/smp: Merge Power9 topology with Power topology

2020-07-16 Thread Gautham R Shenoy
new sched > domain. > > Cc: linuxppc-dev > Cc: Michael Ellerman > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy > Cc: Vaidyanathan Srinivasan > Signed-off-by: Srikar Dronam

Re: [PATCH 01/11] powerpc/smp: Cache node for reuse

2020-07-16 Thread Gautham R Shenoy
onfig. > "error: _numa_cpu_lookup_table_ undeclared" > > No functional change > > Cc: linuxppc-dev > Cc: Michael Ellerman > Cc: Nick Piggin > Cc: Oliver OHalloran > Cc: Nathan Lynch > Cc: Michael Neuling > Cc: Anton Blanchard > Cc: Gautham R Shenoy >

Re: [PATCH v2 0/3] Power10 basic energy management

2020-07-13 Thread Gautham R Shenoy
On Mon, Jul 13, 2020 at 03:23:21PM +1000, Nicholas Piggin wrote: > Excerpts from Pratik Rajesh Sampat's message of July 10, 2020 3:22 pm: > > Changelog v1 --> v2: > > 1. Save-restore DAWR and DAWRX unconditionally as they are lost in > > shallow idle states too > > 2. Rename

Re: [PATCH 2/2] powerpc/powernv/idle: save-restore DAWR0,DAWRX0 for P10

2020-07-09 Thread Gautham R Shenoy
On Fri, Jul 03, 2020 at 06:16:40PM +0530, Pratik Rajesh Sampat wrote: > Additional registers DAWR0, DAWRX0 may be lost on Power 10 for > stop levels < 4. Adding Ravi Bangoria to the cc. > Therefore save the values of these SPRs before entering a "stop" > state and restore their values on

Re: [PATCH 1/2] powerpc/powernv/idle: Exclude mfspr on HID1,4,5 on P9 and above

2020-07-09 Thread Gautham R Shenoy
the > check for machines lower than Power9 > > Signed-off-by: Pratik Rajesh Sampat Nice catch. Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/platforms/powernv/idle.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/powerpc/platfo

Re: [PATCH v2 07/10] powerpc/perf: support BHRB disable bit and new filtering modes

2020-07-08 Thread Gautham R Shenoy
On Tue, Jul 07, 2020 at 05:17:55PM +1000, Michael Neuling wrote: > On Wed, 2020-07-01 at 05:20 -0400, Athira Rajeev wrote: > > PowerISA v3.1 has few updates for the Branch History Rolling Buffer(BHRB). > > First is the addition of BHRB disable bit and second new filtering > > modes for BHRB. > >

Re: [PATCH 0/5] cpuidle-pseries: Parse extended CEDE information for idle.

2020-07-07 Thread Gautham R Shenoy
Hi, On Tue, Jul 07, 2020 at 04:41:34PM +0530, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > Hi, > > > > > Gautham R. Shenoy (5): > cpuidle-pseries: Set the latency-hint before entering CEDE > cpuidle-pseries: Add function to parse e

[PATCH 5/5] cpuidle-pseries: Block Extended CEDE(1) which adds no additional value.

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" The Extended CEDE state with latency-hint = 1 is only different from normal CEDE (with latency-hint = 0) in that a CPU in Extended CEDE(1) does not wakeup on timer events. Both CEDE and Extended CEDE(1) map to the same hardware idle state. Since we alrea

[PATCH 2/5] cpuidle-pseries: Add function to parse extended CEDE records

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently we use CEDE with latency-hint 0 as the only other idle state on a dedicated LPAR apart from the polling "snooze" state. The platform might support additional extended CEDE idle states, which can be discovered through the "ibm,get-sy

[PATCH 3/5] cpuidle-pseries : Fixup exit latency for CEDE(0)

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" We are currently assuming that CEDE(0) has exit latency 10us, since there is no way for us to query from the platform. However, if the wakeup latency of an Extended CEDE state is smaller than 10us, then we can be sure that the exit latency of CEDE(0) cann

[PATCH 0/5] cpuidle-pseries: Parse extended CEDE information for idle.

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Hi, On pseries Dedicated Linux LPARs, apart from the polling snooze idle state, we currently have the CEDE idle state which cedes the CPU to the hypervisor with latency-hint = 0. However, the PowerVM hypervisor supports additional extended CEDE states,

[PATCH 1/5] cpuidle-pseries: Set the latency-hint before entering CEDE

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" As per the PAPR, each H_CEDE call is associated with a latency-hint to be passed in the VPA field "cede_latency_hint". The CEDE states that we were implicitly entering so far is CEDE with latency-hint = 0. This patch explicitly sets the latenc

[PATCH 4/5] cpuidle-pseries : Include extended CEDE states in cpuidle framework

2020-07-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" This patch exposes those extended CEDE states to the cpuidle framework which are responsive to external interrupts and do not need an H_PROD. Since as per the PAPR, all the extended CEDE states are non-responsive to timers, we indicate this to the cpuidle sub

Re: [PATCH v3 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-07-02 Thread Gautham R Shenoy
x7/cpumask > 0 > > Signed-off-by: Kajol Jain This patch looks good to me. Reviewed-by: Gautham R. Shenoy > --- > .../sysfs-bus-event_source-devices-hv_24x7| 7 > arch/powerpc/perf/hv-24x7.c | 36 +-- > 2 files changed, 41 inse

Re: [PATCH] powerpc: Warn about use of smt_snooze_delay

2020-06-29 Thread Gautham R Shenoy
uot; is the "ppc64_cpu" which uses the presence of this file to assume that the system is SMT capable. Since we have "/sys/devices/system/cpu/smt/" these days, perhaps the userspace utility can use that and we can get rid of the file altogether ? FWIW, Acked-by: Gautham R. Shenoy

Re: [PATCH v2 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-06-26 Thread Gautham R Shenoy
On Wed, Jun 24, 2020 at 05:58:31PM +0530, Madhavan Srinivasan wrote: > > > On 6/24/20 4:26 PM, Gautham R Shenoy wrote: > >Hi Kajol, > > > >On Wed, Jun 24, 2020 at 03:47:54PM +0530, Kajol Jain wrote: > >>Patch here adds a cpumask attr to hv_24x7 pmu along with

Re: [PATCH v2 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-06-24 Thread Gautham R Shenoy
Hi Kajol, On Wed, Jun 24, 2020 at 03:47:54PM +0530, Kajol Jain wrote: > Patch here adds a cpumask attr to hv_24x7 pmu along with ABI documentation. > > command:# cat /sys/devices/hv_24x7/cpumask > 0 Since this sysfs interface is read-only, and the user cannot change the CPU which will be making

Re: [PATCH v2 1/2] powerpc/perf/hv-24x7: Add cpu hotplug support

2020-06-24 Thread Gautham R Shenoy
designate > count data. > > The offline function test and clear corresponding cpu in a cpumask > and update cpumask to any other active cpu. > > Signed-off-by: Kajol Jain Otherwise, looks good to me. Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/perf/hv-24x7.

Re: [PATCH v5 2/3] powerpc/numa: Prefer node id queried from vphn

2020-06-24 Thread Gautham R Shenoy
: Michael Ellerman > Cc: Andrew Morton > Cc: Linus Torvalds > Cc: Gautham R Shenoy > Cc: Satheesh Rajendran > Cc: David Hildenbrand > Signed-off-by: Srikar Dronamraju This patch looks good to me. Reviewed-by: Gautham R. Shenoy -- Thanks and Regards gautham.

Re: [PATCH v5 1/3] powerpc/numa: Set numa_node for all possible cpus

2020-06-24 Thread Gautham R Shenoy
node. > > Cc: linuxppc-dev@lists.ozlabs.org > Cc: linux...@kvack.org > Cc: linux-ker...@vger.kernel.org > Cc: Michal Hocko > Cc: Mel Gorman > Cc: Vlastimil Babka > Cc: "Kirill A. Shutemov" > Cc: Christopher Lameter > Cc: Michael Ellerman > Cc: Andrew Morton

Re: [PATCH 2/2] powerpc/hv-24x7: Add sysfs files inside hv-24x7 device to show cpumask

2020-06-18 Thread Gautham R Shenoy
On Thu, Jun 18, 2020 at 05:57:13PM +0530, Kajol Jain wrote: > Patch here adds a cpumask attr to hv_24x7 pmu along with ABI documentation. > > command:# cat /sys/devices/hv_24x7/cpumask > 0 > > Signed-off-by: Kajol Jain > --- > .../sysfs-bus-event_source-devices-hv_24x7| 6 >

Re: [PATCH 1/2] powerpc/perf/hv-24x7: Add cpu hotplug support

2020-06-18 Thread Gautham R Shenoy
Hello Kajol, On Thu, Jun 18, 2020 at 05:57:12PM +0530, Kajol Jain wrote: > Patch here adds cpu hotplug functions to hv_24x7 pmu. > A new cpuhp_state "CPUHP_AP_PERF_POWERPC_HV_24x7_ONLINE" enum > is added. > > The online function update the cpumask only if its NULL. > As the primary intention for

Re: [PATCH 1/2] powerpc/pseries: remove cede offline state for CPUs

2020-06-03 Thread Gautham R Shenoy
> > Fixes: 3aa565f53c39 ("powerpc/pseries: Add hooks to put the CPU into an > appropriate offline state") > > Signed-off-by: Nathan Lynch The patch looks good to me. Reviewed-by: Gautham R. Shenoy > --- > Documentation/core-api/cpu_hotplug.rst|

Re: [PATCH] powerpc: Fix misleading small cores print

2020-06-02 Thread Gautham R Shenoy
o say we've detect big cores but are > using small cores for scheduling. Thanks for making the print more meaningful. > > Signed-off-by: Michael Neuling FWIW, Acked-by: Gautham R. Shenoy > --- > arch/powerpc/kernel/smp.c | 2 +- > 1 file changed, 1 insertion(+), 1 deleti

Re: [PATCH v4 2/3] powerpc/numa: Prefer node id queried from vphn

2020-05-12 Thread Gautham R Shenoy
man > Cc: Andrew Morton > Cc: Linus Torvalds > Cc: Gautham R Shenoy > Cc: Satheesh Rajendran > Cc: David Hildenbrand > Signed-off-by: Srikar Dronamraju Looks good to me. Reviewed-by: Gautham R. Shenoy > --- > Changelog v2:->v3: > - Resolved comments from Gaut

Re: [RFC PATCH 06/10] powerpc/powernv: opal use new opal call entry point if it exists

2020-05-06 Thread Gautham R Shenoy
Hello Nicholas, On Sat, May 02, 2020 at 09:19:10PM +1000, Nicholas Piggin wrote: > OPAL may advertise new endian-specific entry point which has different > calling conventions including using the caller's stack, but otherwise > provides the standard OPAL call API without any changes required to >

Re: [PATCH] powerpc/powernv: Fix a warning message

2020-05-03 Thread Gautham R Shenoy
ab2fe ("powernv/cpuidle: Parse dt idle properties into global > structure") > Signed-off-by: Christophe JAILLET Thanks for catching this. Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/platforms/powernv/idle.c | 2 +- > 1 file changed, 1 insertion(+), 1 de

Re: [PATCH v5 0/5] Track and expose idle PURR and SPURR ticks

2020-04-30 Thread Gautham R Shenoy
On Thu, Apr 30, 2020 at 09:46:13AM +0530, Gautham R Shenoy wrote: > Hello Michael, > > > > > > Michael, could you please consider this for 5.8 ? > > > > Yes. Has it been tested on KVM at all? > > No. I haven't tested this on KVM. Will do that toda

Re: [PATCH v5 0/5] Track and expose idle PURR and SPURR ticks

2020-04-29 Thread Gautham R Shenoy
Hello Michael, On Thu, Apr 30, 2020 at 12:34:52PM +1000, Michael Ellerman wrote: > Gautham R Shenoy writes: > > On Mon, Apr 20, 2020 at 03:46:35PM -0700, Tyrel Datwyler wrote: > >> On 4/7/20 1:47 AM, Gautham R. Shenoy wrote: > >> > From: "Ga

Re: [PATCH v2 2/3] powerpc/numa: Prefer node id queried from vphn

2020-04-29 Thread Gautham R Shenoy
Hello Srikar, On Tue, Apr 28, 2020 at 03:08:35PM +0530, Srikar Dronamraju wrote: > Node id queried from the static device tree may not > be correct. For example: it may always show 0 on a shared processor. > Hence prefer the node id queried from vphn and fallback on the device tree > based node

Re: [RFC 3/3] powernv/cpuidle : Introduce capability for firmware-enabled-stop

2020-04-27 Thread Gautham R Shenoy
On Sun, Apr 26, 2020 at 09:10:27PM -0500, Abhishek Goel wrote: > This patch introduces the capability for firmware to handle the stop > states instead. A bit is set based on the discovery of the feature > and correspondingly also the responsibility to handle the stop states. > > If Kernel does

Re: [RFC 2/3] powernv/cpuidle : Interface for an idle-stop dependency structure

2020-04-27 Thread Gautham R Shenoy
On Sun, Apr 26, 2020 at 09:10:26PM -0500, Abhishek Goel wrote: > This patch introduces the idea of having a dependency structure for > idle-stop. The structure encapsulates the following: > 1. Bitmask for version of idle-stop > 2. Bitmask for propterties like ENABLE/DISABLE > 3. Function pointer

Re: [RFC 1/3] powernv/cpuidle : Support for pre-entry and post exit of stop state in firmware

2020-04-27 Thread Gautham R Shenoy
Hi Abhishek, On Sun, Apr 26, 2020 at 09:10:25PM -0500, Abhishek Goel wrote: > This patch provides kernel framework fro opal support of save restore > of sprs in idle stop loop. Opal support for stop states is needed to > selectively enable stop states or to introduce a quirk quickly in case > a

Re: [PATCH v8 1/1] powerpc/powernv: Introduce support and parsing for self-save API

2020-04-23 Thread Gautham R Shenoy
you move the PTCR changes to a different patch. Otherwise, the patchset looks good to me Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/include/asm/opal-api.h| 3 +- > arch/powerpc/include/asm/opal.h| 1 + > arch/powerpc/platforms/powernv/idle.c | 73 ++

Re: [PATCH v8 3/3] Self save API integration

2020-04-23 Thread Gautham R Shenoy
calls along with their working and usage. > > Signed-off-by: Pratik Rajesh Sampat LGTM. Reviewed-by: Gautham R. Shenoy > --- > doc/opal-api/opal-slw-self-save-reg-181.rst | 51 ++ > doc/opal-api/opal-slw-set-reg-100.rst | 5 + > doc/power-management.rs

Re: [PATCH v5 0/5] Track and expose idle PURR and SPURR ticks

2020-04-23 Thread Gautham R Shenoy
On Mon, Apr 20, 2020 at 03:46:35PM -0700, Tyrel Datwyler wrote: > On 4/7/20 1:47 AM, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" > > > > Hi, > > > > This is the fifth version of the patches to track and expose idle PURR > > and

Re: [PATCH v6 4/4] Advertise the self-save and self-restore attributes in the device tree

2020-04-14 Thread Gautham R Shenoy
quot;, self_save_mask, > + SPR_BITMAP_LENGTH / 8); > + dt_add_property_string(self_save, "compatible", "ibm,opal-self-save"); > + free(self_save_mask); > +} > + > /* Add device tree properties to describe idle states */ > void add_cpu_idle_state_properties(void) > { > @@ -1563,4 +1677,6 @@ void slw_init(void) > } > } > add_cpu_idle_state_properties(); > + if (has_deep_states) > + add_cpu_self_save_restore_properties(); > } > diff --git a/include/skiboot.h b/include/skiboot.h > index 9ced240e..d3631dea 100644 > --- a/include/skiboot.h > +++ b/include/skiboot.h > @@ -209,6 +209,7 @@ extern void early_uart_init(void); > extern void homer_init(void); > extern void slw_init(void); > extern void add_cpu_idle_state_properties(void); > +extern void add_cpu_self_save_restore_properties(void); > extern void lpc_rtc_init(void); Apart from these minor quibbles, Reviewed-by: Gautham R. Shenoy > > /* flash support */ > -- > 2.24.1 >

Re: [PATCH v6 2/3] powerpc/powernv: Introduce support and parsing for self-save API

2020-04-14 Thread Gautham R Shenoy
On Thu, Mar 26, 2020 at 12:40:33PM +0530, Pratik Rajesh Sampat wrote: > This commit introduces and leverages the Self save API. The difference > between self-save and self-restore is that the value to be saved for the > SPR does not need to be passed to the call. > > Add the new Self Save OPAL

Re: [PATCH v6 1/3] powerpc/powernv: Introduce interface for self-restore support

2020-04-14 Thread Gautham R Shenoy
at This patch looks good to me. Reviewed-by: Gautham R. Shenoy > --- > arch/powerpc/platforms/powernv/idle.c | 200 +++--- > 1 file changed, 152 insertions(+), 48 deletions(-) > > diff --git a/arch/powerpc/platforms/powernv/idle.c > b/arch/powerpc

Re: [PATCH v6 0/3] powerpc/powernv: Introduce interface for self-restore support

2020-04-14 Thread Gautham R Shenoy
Hello Pratik, On Thu, Mar 26, 2020 at 12:40:31PM +0530, Pratik Rajesh Sampat wrote: > v5: https://lkml.org/lkml/2020/3/17/944 > Changelog > v5-->v6 > 1. Updated background, motivation and illuminated potential design > choices > 2. Re-organization of patch-set > a. Split introducing preference

Re: [PATCH v6 2/4] Self save API integration

2020-04-14 Thread Gautham R Shenoy
in the bit vector.Refer > + * to definition of SprBitPositionList_t to determine bit > position > + * associated with a particular SPR. > + */ > +StopReturnCode_t > +p9_stop_save_cpureg_control( void* i_pImage, const uint64_t i_pir, > + const uint32_t i_saveRegVector ); > #ifdef __cplusplus > } // extern "C" > }; // namespace stopImageSection ends > diff --git a/include/skiboot.h b/include/skiboot.h > index 30ff500c..9ced240e 100644 > --- a/include/skiboot.h > +++ b/include/skiboot.h > @@ -306,6 +306,9 @@ extern void nx_p9_rng_late_init(void); > /* SLW reinit function for switching core settings */ > extern int64_t slw_reinit(uint64_t flags); > > +/* Self save SPR before entering the stop state */ > +extern int64_t opal_slw_self_save_reg(uint64_t cpu_pir, uint64_t sprn); > + > /* Patch SPR in SLW image */ > extern int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t > val); > The patch looks good otherwise. Reviewed-by: Gautham R. Shenoy > -- > 2.24.1 >

Re: [PATCH v6 0/4] Support for Self Save API in OPAL

2020-04-14 Thread Gautham R Shenoy
Hello Pratik, On Thu, Mar 26, 2020 at 12:39:13PM +0530, Pratik Rajesh Sampat wrote: > v5:https://lists.ozlabs.org/pipermail/skiboot/2020-March/016538.html > Changelog > v5 --> v6 > Updated background, motivation and illuminated potential design choices > > Background > == > > The power

Re: [RFC/PATCH 2/3] pseries/kvm: Clear PSSCR[ESL|EC] bits before guest entry

2020-04-13 Thread Gautham R Shenoy
Hello David, On Wed, Apr 08, 2020 at 12:29:57PM +1000, David Gibson wrote: > On Tue, Apr 07, 2020 at 06:55:26PM +0530, Gautham R Shenoy wrote: > > Hello David, > > > > On Mon, Apr 06, 2020 at 07:58:19PM +1000, David Gibson wrote: > > > On Fri, Apr 03, 2020 at 03:0

Re: [RFC] cpuidle/powernv : Support for pre-entry and post exit of stop state in firmware

2020-04-08 Thread Gautham R Shenoy
Hi Abhishek, On Fri, Apr 03, 2020 at 04:27:01AM -0500, Abhishek Goel wrote: > This patch provides kernel framework fro opal support of save restore > of sprs in idle stop loop. Opal support for stop states is needed to > selectively enable stop states or to introduce a quirk quickly in case > a

Re: [RFC 3/3] Introduce capability for firmware-enabled-stop

2020-04-08 Thread Gautham R Shenoy
Hi Pratik, On Wed, Mar 04, 2020 at 09:31:23PM +0530, Pratik Rajesh Sampat wrote: > Design patch that introduces the capability for firmware to handle the > stop states instead. A bit is set based on the discovery of the feature > and correspondingly also the responsibility to handle the stop

Re: [RFC 1/3] Interface for an idle-stop dependency structure

2020-04-08 Thread Gautham R Shenoy
Hi Pratik, On Wed, Mar 04, 2020 at 09:31:21PM +0530, Pratik Rajesh Sampat wrote: > Design patch to introduce the idea of having a dependency structure for > idle-stop. The structure encapsulates the following: > 1. Bitmask for version of idle-stop > 2. Bitmask for propterties like ENABLE/DISABLE

Re: [RFC] Support stop state version quirk and firmware enabled stop

2020-04-08 Thread Gautham R Shenoy
Hi Pratik, On Wed, Mar 04, 2020 at 09:26:48PM +0530, Pratik Rajesh Sampat wrote: > A concept patch in Skiboot to illustrate the case wherein handling of > stop states for different DD versions of a CPU can be achieved by a > simple modification in the list of cpu_features. > As an example

Re: [RFC/PATCH 2/3] pseries/kvm: Clear PSSCR[ESL|EC] bits before guest entry

2020-04-07 Thread Gautham R Shenoy
Hello David, On Mon, Apr 06, 2020 at 07:58:19PM +1000, David Gibson wrote: > On Fri, Apr 03, 2020 at 03:01:03PM +0530, Gautham R Shenoy wrote: > > On Fri, Apr 03, 2020 at 12:20:26PM +1000, Nicholas Piggin wrote: > > > Gautham R. Shenoy's on March 31, 2020 10:10 pm: > &

Re: [RFC/PATCH 2/3] pseries/kvm: Clear PSSCR[ESL|EC] bits before guest entry

2020-04-07 Thread Gautham R Shenoy
Hello Nicholas, On Fri, Apr 03, 2020 at 03:01:03PM +0530, Gautham R Shenoy wrote: > On Fri, Apr 03, 2020 at 12:20:26PM +1000, Nicholas Piggin wrote: [..snip..] > > > > > > Signed-off-by: Gautham R. Shenoy > > > --- > > > arch/powerpc/kvm/book3s_hv.c

[PATCH v5 5/5] Documentation: Document sysfs interfaces purr, spurr, idle_purr, idle_spurr

2020-04-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Add documentation for the following sysfs interfaces: /sys/devices/system/cpu/cpuX/purr /sys/devices/system/cpu/cpuX/spurr /sys/devices/system/cpu/cpuX/idle_purr /sys/devices/system/cpu/cpuX/idle_spurr Signed-off-by: Gautham R. Shenoy --- Documentation/A

[PATCH v5 4/5] powerpc/sysfs: Show idle_purr and idle_spurr for every CPU

2020-04-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" On Pseries LPARs, to calculate utilization, we need to know the [S]PURR ticks when the CPUs were busy or idle. The total PURR and SPURR ticks are already exposed via the per-cpu sysfs files "purr" and "spurr". This patch adds supp

[PATCH v5 2/5] powerpc/idle: Store PURR snapshot in a per-cpu global variable

2020-04-07 Thread Gautham R. Shenoy
From: "Gautham R. Shenoy" Currently when CPU goes idle, we take a snapshot of PURR via pseries_idle_prolog() which is used at the CPU idle exit to compute the idle PURR cycles via the function pseries_idle_epilog(). Thus, the value of idle PURR cycle thus read before pseries_i

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