from:"Hongtao Jia"

RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support

2016-08-05 Thread Hongtao Jia

Hi Eduardo,

If you have any comments please let me know.

Thanks.
-Hongtao. 


> -Original Message-
> From: Linuxppc-dev [mailto:linuxppc-dev-
> bounces+b38951=freescale@lists.ozlabs.org] On Behalf Of Hongtao Jia
> Sent: Tuesday, July 19, 2016 2:54 PM
> To: edubez...@gmail.com; rui.zh...@intel.com; Scott Wood
> <scott.w...@nxp.com>
> Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
> p...@vger.kernel.org
> Subject: RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support
> 
> Hi Eduardo,
> 
> Any comments on this patch?
> 
> Thanks.
> -Hongtao.
> 
> > -Original Message-
> > From: Jia Hongtao [mailto:hongtao@nxp.com]
> > Sent: Thursday, June 30, 2016 11:09 AM
> > To: edubez...@gmail.com; rui.zh...@intel.com; robh...@kernel.org;
> > ga...@codeaurora.org; Scott Wood <scott.w...@nxp.com>;
> > shawn...@kernel.org
> > Cc: linux...@vger.kernel.org; devicet...@vger.kernel.org; linux-
> > ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-arm-
> > ker...@lists.infradead.org; Hongtao Jia <hongtao@nxp.com>
> > Subject: [PATCH V2 7/7] thermal: qoriq: Add thermal management support
> >
> > This driver add thermal management support by enabling TMU (Thermal
> > Monitoring Unit) on QorIQ platform.
> >
> > It's based on thermal of framework:
> > - Trip points defined in device tree.
> > - Cpufreq as cooling device registered in qoriq cpufreq driver.
> >
> > Signed-off-by: Jia Hongtao <hongtao@nxp.com>
> > ---
> > Changes of V2:
> > * Add HAS_IOMEM dependency to fix build error on UM
> >
> >  drivers/thermal/Kconfig |  10 ++
> >  drivers/thermal/Makefile|   1 +
> >  drivers/thermal/qoriq_thermal.c | 328
> > 
> >  3 files changed, 339 insertions(+)
> >  create mode 100644 drivers/thermal/qoriq_thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index
> > 2d702ca..56ef30d 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -195,6 +195,16 @@ config IMX_THERMAL
> >   cpufreq is used as the cooling device to throttle CPUs when the
> >   passive trip is crossed.
> >
> > +config QORIQ_THERMAL
> > +   tristate "QorIQ Thermal Monitoring Unit"
> > +   depends on THERMAL_OF
> > +   depends on HAS_IOMEM
> > +   help
> > + Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
> > + It supports one critical trip point and one passive trip point. The
> > + cpufreq is used as the cooling device to throttle CPUs when the
> > + passive trip is crossed.
> > +
> >  config SPEAR_THERMAL
> > tristate "SPEAr thermal sensor driver"
> > depends on PLAT_SPEAR || COMPILE_TEST diff --git
> > a/drivers/thermal/Makefile b/drivers/thermal/Makefile index
> > 10b07c1..6662232 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL)  +=
> db8500_thermal.o
> >  obj-$(CONFIG_ARMADA_THERMAL)   += armada_thermal.o
> >  obj-$(CONFIG_TANGO_THERMAL)+= tango_thermal.o
> >  obj-$(CONFIG_IMX_THERMAL)  += imx_thermal.o
> > +obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
> >  obj-$(CONFIG_DB8500_CPUFREQ_COOLING)   += db8500_cpufreq_cooling.o
> >  obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
> >  obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
> > diff --git a/drivers/thermal/qoriq_thermal.c
> > b/drivers/thermal/qoriq_thermal.c new file mode 100644 index
> > 000..644ba52
> > --- /dev/null
> > +++ b/drivers/thermal/qoriq_thermal.c
> > @@ -0,0 +1,328 @@
> > +/*
> > + * Copyright 2016 Freescale Semiconductor, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > +modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but
> > +WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> > +or
> > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> > +License for
> > + * more details.
> > + *
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
&g

RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support

2016-07-19 Thread Hongtao Jia

Hi Eduardo,

Any comments on this patch?

Thanks.
-Hongtao.

> -Original Message-
> From: Jia Hongtao [mailto:hongtao@nxp.com]
> Sent: Thursday, June 30, 2016 11:09 AM
> To: edubez...@gmail.com; rui.zh...@intel.com; robh...@kernel.org;
> ga...@codeaurora.org; Scott Wood <scott.w...@nxp.com>;
> shawn...@kernel.org
> Cc: linux...@vger.kernel.org; devicet...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org; Hongtao Jia <hongtao@nxp.com>
> Subject: [PATCH V2 7/7] thermal: qoriq: Add thermal management support
> 
> This driver add thermal management support by enabling TMU (Thermal
> Monitoring Unit) on QorIQ platform.
> 
> It's based on thermal of framework:
> - Trip points defined in device tree.
> - Cpufreq as cooling device registered in qoriq cpufreq driver.
> 
> Signed-off-by: Jia Hongtao <hongtao@nxp.com>
> ---
> Changes of V2:
> * Add HAS_IOMEM dependency to fix build error on UM
> 
>  drivers/thermal/Kconfig |  10 ++
>  drivers/thermal/Makefile|   1 +
>  drivers/thermal/qoriq_thermal.c | 328
> 
>  3 files changed, 339 insertions(+)
>  create mode 100644 drivers/thermal/qoriq_thermal.c
> 
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index
> 2d702ca..56ef30d 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -195,6 +195,16 @@ config IMX_THERMAL
> cpufreq is used as the cooling device to throttle CPUs when the
> passive trip is crossed.
> 
> +config QORIQ_THERMAL
> + tristate "QorIQ Thermal Monitoring Unit"
> + depends on THERMAL_OF
> + depends on HAS_IOMEM
> + help
> +   Support for Thermal Monitoring Unit (TMU) found on QorIQ platforms.
> +   It supports one critical trip point and one passive trip point. The
> +   cpufreq is used as the cooling device to throttle CPUs when the
> +   passive trip is crossed.
> +
>  config SPEAR_THERMAL
>   tristate "SPEAr thermal sensor driver"
>   depends on PLAT_SPEAR || COMPILE_TEST
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index
> 10b07c1..6662232 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -37,6 +37,7 @@ obj-$(CONFIG_DB8500_THERMAL)+= db8500_thermal.o
>  obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
>  obj-$(CONFIG_TANGO_THERMAL)  += tango_thermal.o
>  obj-$(CONFIG_IMX_THERMAL)+= imx_thermal.o
> +obj-$(CONFIG_QORIQ_THERMAL)  += qoriq_thermal.o
>  obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
>  obj-$(CONFIG_INTEL_POWERCLAMP)   += intel_powerclamp.o
>  obj-$(CONFIG_X86_PKG_TEMP_THERMAL)   += x86_pkg_temp_thermal.o
> diff --git a/drivers/thermal/qoriq_thermal.c 
> b/drivers/thermal/qoriq_thermal.c new
> file mode 100644 index 000..644ba52
> --- /dev/null
> +++ b/drivers/thermal/qoriq_thermal.c
> @@ -0,0 +1,328 @@
> +/*
> + * Copyright 2016 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> +it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but
> +WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> +or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> +License for
> + * more details.
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "thermal_core.h"
> +
> +#define SITES_MAX16
> +
> +/*
> + * QorIQ TMU Registers
> + */
> +struct qoriq_tmu_site_regs {
> + u32 tritsr; /* Immediate Temperature Site Register */
> + u32 tratsr; /* Average Temperature Site Register */
> + u8 res0[0x8];
> +};
> +
> +struct qoriq_tmu_regs {
> + u32 tmr;/* Mode Register */
> +#define TMR_DISABLE  0x0
> +#define TMR_ME   0x8000
> +#define TMR_ALPF 0x0c00
> + u32 tsr;/* Status Register */
> + u32 tmtmir; /* Temperature measurement interval Register */
> +#define TMTMIR_DEFAULT   0x000f
> + u8 res0[0x14];
> + u32 tier;   /* Interrupt Enable Register */
> +#define TIER_DISABLE 0x0
> + u32 tidr;   /* Interrupt Detect Register */
> + u32 tiscr;  /* Interrupt Site Capture Register */
> + u32 ticscr; /* Interrupt Critica

Re: [PATCH 7/7] thermal: qoriq: Add thermal management support

2016-06-12 Thread Hongtao Jia

Hi all,

I received this auto build error notice. I have something to clarify and ask:
- [cannot apply to robh/for-next soc-thermal/next]
   It could apply to robh/for-next.
   It could not apply to soc-thermal/next because this branch is not updated to 
the latest kernel.

- [auto build test ERROR on v4.7-rc1] [also build test ERROR on next-20160603]
   It passed all build test under ARCH=arm/powerpc/x86.
   The error log under ARCH=um "implicit declaration of function 'iounmap'" 
looks odd for me because
   I believe it's included in . Any suggestions for me to fix this 
issue?

Thanks.
- Hongtao


> -邮件原件-
> 发件人: kbuild test robot [mailto:l...@intel.com]
> 发送时间: Monday, June 06, 2016 1:52 AM
> 收件人: Hongtao Jia <hongtao@nxp.com>
> 抄送: kbuild-...@01.org; edubez...@gmail.com; rui.zh...@intel.com;
> robh...@kernel.org; ga...@codeaurora.org; Scott Wood
> <scott.w...@nxp.com>; shawn...@kernel.org; linux...@vger.kernel.org;
> devicet...@vger.kernel.org; linux-ker...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; Hongtao Jia
> <hongtao@nxp.com>
> 主题: Re: [PATCH 7/7] thermal: qoriq: Add thermal management support
> 
> Hi,
> 
> [auto build test ERROR on v4.7-rc1]
> [also build test ERROR on next-20160603]
> [cannot apply to robh/for-next soc-thermal/next]
> [if your patch is applied to the wrong git tree, please drop us a note to help
> improve the system]
> 
> url:https://github.com/0day-ci/linux/commits/Jia-Hongtao/dt-bindings-
> Update-QorIQ-TMU-thermal-bindings/20160603-154428
> config: um-allmodconfig (attached as .config)
> compiler: gcc-6 (Debian 6.1.1-1) 6.1.1 20160430
> reproduce:
> # save the attached .config to linux build tree
> make ARCH=um
> 
> All errors (new ones prefixed by >>):
> 
>drivers/thermal/qoriq_thermal.c: In function 'qoriq_tmu_probe':
> >> drivers/thermal/qoriq_thermal.c:255:2: error: implicit declaration of
> function 'iounmap' [-Werror=implicit-function-declaration]
>  iounmap(data->regs);
>  ^~~
>cc1: some warnings being treated as errors
> 
> vim +/iounmap +255 drivers/thermal/qoriq_thermal.c
> 
>249site |= 0x1 << (15 - data->sensor_id);
>250tmu_write(data, site | TMR_ME | TMR_ALPF, >regs-
> >tmr);
>251
>252return 0;
>253
>254err_tmu:
>  > 255iounmap(data->regs);
>256
>257err_iomap:
>258platform_set_drvdata(pdev, NULL);
> 
> ---
> 0-DAY kernel test infrastructureOpen Source Technology Center
> https://lists.01.org/pipermail/kbuild-all   Intel Corporation
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答复: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings

2016-06-06 Thread Hongtao Jia


> -邮件原件-
> 发件人: Rob Herring [mailto:r...@kernel.org]
> 发送时间: Monday, June 06, 2016 9:47 PM
> 收件人: Hongtao Jia <hongtao@nxp.com>
> 抄送: edubez...@gmail.com; rui.zh...@intel.com; ga...@codeaurora.org;
> Scott Wood <scott.w...@nxp.com>; shawn...@kernel.org;
> devicet...@vger.kernel.org; linux...@vger.kernel.org; linux-
> ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org
> 主题: Re: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings
> 
> On Fri, Jun 03, 2016 at 02:57:33PM +0800, Jia Hongtao wrote:
> > For different types of SoC the sensor id and endianness may vary.
> > "#thermal-sensor-cells" is used to provide sensor id information.
> > "little-endian" property is to tell the endianness of TMU.
> >
> > Signed-off-by: Jia Hongtao <hongtao@nxp.com>
> > ---
> >  .../devicetree/bindings/thermal/qoriq-thermal.txt | 19 +---
> ---
> >  1 file changed, 13 insertions(+), 6 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > index 66223d5..8eeef80 100644
> > --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
> > @@ -1,22 +1,28 @@
> >  * Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
> >
> >  Required properties:
> > -- compatible : Must include "fsl,qoriq-tmu". The version of the device is
> > +- compatible: Must include "fsl,qoriq-tmu". The version of the device is
> 
> Please split functional changes from formatting changes. This one seems
> pretty pointless.

I will remove formatting changes in the next version.
Thanks.

> 
> > determined by the TMU IP Block Revision Register (IPBRR0) at
> > offset 0x0BF8.
> > -   Table of correspondences between IPBRR0 values and example  chips:
> > +   Table of correspondences between IPBRR0 values and example chips:
> > Value   Device
> > --  -
> > 0x01900102  T1040
> > -- reg : Address range of TMU registers.
> > -- interrupts : Contains the interrupt for TMU.
> > -- fsl,tmu-range : The values to be programmed into TTRnCR, as specified by
> > +- reg: Address range of TMU registers.
> > +- interrupts: Contains the interrupt for TMU.
> > +- fsl,tmu-range: The values to be programmed into TTRnCR, as specified by
> > the SoC reference manual. The first cell is TTR0CR, the second is
> > TTR1CR, etc.
> > -- fsl,tmu-calibration : A list of cell pairs containing temperature
> > +- fsl,tmu-calibration: A list of cell pairs containing temperature
> > calibration data, as specified by the SoC reference manual.
> > The first cell of each pair is the value to be written to TTCFGR,
> > and the second is the value to be written to TSCFGR.
> > +- #thermal-sensor-cells: Must be 1. The sensor specifier is the monitoring
> > +   site ID, and represents the "n" in TRITSRn and TRATSRn.
> > +
> > +Optional property:
> > +- little-endian: If present, the TMU registers are little endian.  If 
> > absent,
> > +   the default is big endian.
> >
> >  Example:
> >
> > @@ -60,4 +66,5 @@ tmu@f {
> >
> >0x0003 0x0012
> >0x00030001 0x001d>;
> > +   #thermal-sensor-cells = <1>;
> >  };
> > --
> > 2.1.0.27.g96db324
> >
> >
> > ___
> > linux-arm-kernel mailing list
> > linux-arm-ker...@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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答复: [PATCH 1/2] cpufreq: qoriq: Fix cooling device registration issue during suspend

2016-04-19 Thread Hongtao Jia



> -邮件原件-
> 发件人: Viresh Kumar [mailto:viresh.ku...@linaro.org]
> 发送时间: Monday, April 18, 2016 6:33 PM
> 收件人: Hongtao Jia <hongtao@nxp.com>
> 抄送: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Scott Wood
> <scott.w...@nxp.com>; Yuantian Tang <yuantian.t...@nxp.com>
> 主题: Re: [PATCH 1/2] cpufreq: qoriq: Fix cooling device registration issue
> during suspend
> 
> On 18-04-16, 15:59, Jia Hongtao wrote:
> > Cooling device is registered by ready callback. It's also invoked
> > while system resuming from sleep (Enabling non-boot cpus). Thus
> > cooling device may be multiple registered. Stop_cpu callback is
> > invoked during suspend (Disabling non-boot cpus). So matchable
> > unregistration is added to fix this issue.
> >
> > Signed-off-by: Jia Hongtao <hongtao@nxp.com>
> > ---
> >  drivers/cpufreq/qoriq-cpufreq.c | 8 
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/cpufreq/qoriq-cpufreq.c
> > b/drivers/cpufreq/qoriq-cpufreq.c index b23e525..1c2fdc1 100644
> > --- a/drivers/cpufreq/qoriq-cpufreq.c
> > +++ b/drivers/cpufreq/qoriq-cpufreq.c
> > @@ -305,6 +305,7 @@ static int __exit qoriq_cpufreq_cpu_exit(struct
> > cpufreq_policy *policy)  {
> > struct cpu_data *data = policy->driver_data;
> >
> > +   cpufreq_cooling_unregister(data->cdev);
> > kfree(data->pclk);
> > kfree(data->table);
> > kfree(data);
> > @@ -323,6 +324,12 @@ static int qoriq_cpufreq_target(struct cpufreq_policy
> *policy,
> > return clk_set_parent(policy->clk, parent);  }
> >
> > +static void qoriq_cpufreq_stop_cpu(struct cpufreq_policy *policy) {
> > +   struct cpu_data *cpud = policy->driver_data;
> > +
> > +   cpufreq_cooling_unregister(cpud->cdev);
> > +}
> >
> >  static void qoriq_cpufreq_ready(struct cpufreq_policy *policy)  { @@
> > -352,6 +359,7 @@ static struct cpufreq_driver qoriq_cpufreq_driver = {
> > .verify = cpufreq_generic_frequency_table_verify,
> > .target_index   = qoriq_cpufreq_target,
> > .get= cpufreq_generic_get,
> > +   .stop_cpu   = qoriq_cpufreq_stop_cpu,
> > .ready  = qoriq_cpufreq_ready,
> > .attr   = cpufreq_generic_attr,
> >  };
> 
> You don't need to do it from stop_cpu(), please use
> qoriq_cpufreq_cpu_exit() for this.

Thanks. The new patch will be submitted soon.

-Hongtao.

> 
> --
> viresh
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答复: [PATCH V3] cpufreq: qoriq: Register cooling device based on device tree

2016-01-11 Thread Hongtao Jia

Sorry for the late response. I got a knee surgery to do.
See comments at the end.

> -邮件原件-
> 发件人: Arnd Bergmann [mailto:a...@arndb.de]
> 发送时间: Saturday, December 19, 2015 6:33 AM
> 收件人: Rafael J. Wysocki 
> 抄送: Jia Hongtao ; edubez...@gmail.com;
> viresh.ku...@linaro.org; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; devicet...@vger.kernel.org; Scott Wood
> 
> 主题: Re: [PATCH V3] cpufreq: qoriq: Register cooling device based on device
> tree
> 
> On Tuesday 15 December 2015 00:58:26 Rafael J. Wysocki wrote:
> > On Thursday, November 26, 2015 05:21:11 PM Jia Hongtao wrote:
> > > Register the qoriq cpufreq driver as a cooling device, based on the
> > > thermal device tree framework. When temperature crosses the passive
> > > trip point cpufreq is used to throttle CPUs.
> > >
> > > Signed-off-by: Jia Hongtao 
> > > Reviewed-by: Viresh Kumar 
> >
> > Applied, thanks!
> >
> 
> I got a randconfig build error today:
> 
> drivers/built-in.o: In function `qoriq_cpufreq_ready':
> debugfs.c:(.text+0x1f4688): undefined reference to
> `of_cpufreq_cooling_register'
> 
> CONFIG_OF=y
> CONFIG_QORIQ_CPUFREQ=y
> CONFIG_THERMAL=m
> CONFIG_THERMAL_OF=y
> 
> I think you need a 'depends on THERMAL' to prevent the driver from being
> built-in when THERMAL=m.
> 
>   Arnd

Correct. I need to add following lines to the Kconfig file:
depends on !CPU_THERMAL || THERMAL=y

Hi Rafael,
Should I send a new patch include this fix or send a fix patch?

Thanks.
-Hongtao.
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RE: [PATCH V2] cpufreq: qoriq: Register cooling device based on device tree

2015-11-26 Thread Hongtao Jia



> -Original Message-
> From: Denis Kirjanov [mailto:k...@linux-powerpc.org]
> Sent: Thursday, November 26, 2015 4:32 PM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; viresh.ku...@linaro.org; Wood Scott-B07421;
> devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-
> p...@vger.kernel.org
> Subject: Re: [PATCH V2] cpufreq: qoriq: Register cooling device based on
> device tree
> 
> On 11/26/15, Jia Hongtao  wrote:
> > Register the qoriq cpufreq driver as a cooling device, based on the
> > thermal device tree framework. When temperature crosses the passive
> > trip point cpufreq is used to throttle CPUs.
> >
> > Signed-off-by: Jia Hongtao 
> > ---
> > Changes for V2:
> > * Using ->ready callback for cpu cooling device registering.
> >
> >  drivers/cpufreq/qoriq-cpufreq.c | 27 +++
> >  1 file changed, 27 insertions(+)
> >
> > diff --git a/drivers/cpufreq/qoriq-cpufreq.c
> > b/drivers/cpufreq/qoriq-cpufreq.c index 4f53fa2..a39f868 100644
> > --- a/drivers/cpufreq/qoriq-cpufreq.c
> > +++ b/drivers/cpufreq/qoriq-cpufreq.c
> > @@ -12,6 +12,7 @@
> >
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >  #include 
> > @@ -33,6 +34,7 @@
> >  struct cpu_data {
> > struct clk **pclk;
> > struct cpufreq_frequency_table *table;
> > +   struct thermal_cooling_device *cdev;
> >  };
> >
> >  /*
> > @@ -260,6 +262,30 @@ static int qoriq_cpufreq_target(struct
> > cpufreq_policy *policy,
> > return clk_set_parent(policy->clk, parent);  }
> >
> > +
> > +static void qoriq_cpufreq_ready(struct cpufreq_policy *policy) {
> > +   struct cpu_data *cpud = policy->driver_data;
> > +   struct device_node *np = of_get_cpu_node(policy->cpu, NULL);
> > +
> > +   if (WARN_ON(!np))
> > +   return;
> I doubt that WARN_ON is necessary here. Do you know the exact case where
> the np is NULL?

This seems not necessary as you said.
If no one else has the opposite opinion I will remove it.

Thanks.

> > +
> > +   if (of_find_property(np, "#cooling-cells", NULL)) {
> > +   cpud->cdev = of_cpufreq_cooling_register(np,
> > +policy->related_cpus);
> > +
> > +   if (IS_ERR(cpud->cdev)) {
> > +   pr_err("Failed to register cooling device cpu%d: %ld\n",
> > +   policy->cpu, PTR_ERR(cpud->cdev));
> > +
> > +   cpud->cdev = NULL;
> > +   }
> > +   }
> > +
> > +   of_node_put(np);
> > +}
> > +
> >  static struct cpufreq_driver qoriq_cpufreq_driver = {
> > .name   = "qoriq_cpufreq",
> > .flags  = CPUFREQ_CONST_LOOPS,
> > @@ -268,6 +294,7 @@ static struct cpufreq_driver qoriq_cpufreq_driver =
> {
> > .verify = cpufreq_generic_frequency_table_verify,
> > .target_index   = qoriq_cpufreq_target,
> > .get= cpufreq_generic_get,
> > +   .ready  = qoriq_cpufreq_ready,
> > .attr   = cpufreq_generic_attr,
> >  };
> >
> > --
> > 2.1.0.27.g96db324
> >
> > ___
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
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RE: [PATCH V2] cpufreq: qoriq: Register cooling device based on device tree

2015-11-26 Thread Hongtao Jia

Thanks.
I just sent the new patch.

> -Original Message-
> From: Viresh Kumar [mailto:viresh.ku...@linaro.org]
> Sent: Thursday, November 26, 2015 5:08 PM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; devicet...@vger.kernel.org; Wood Scott-B07421
> Subject: Re: [PATCH V2] cpufreq: qoriq: Register cooling device based on
> device tree
> 
> On 26-11-15, 14:27, Jia Hongtao wrote:
> > +static void qoriq_cpufreq_ready(struct cpufreq_policy *policy) {
> > +   struct cpu_data *cpud = policy->driver_data;
> > +   struct device_node *np = of_get_cpu_node(policy->cpu, NULL);
> > +
> > +   if (WARN_ON(!np))
> > +   return;
> 
> Drop this and add my:
> 
> Reviewed-by: Viresh Kumar 
> 
> --
> viresh
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RE: [PATCH] cpufreq: qoriq: Register cooling device based on device tree

2015-11-25 Thread Hongtao Jia



> -Original Message-
> From: Viresh Kumar [mailto:viresh.ku...@linaro.org]
> Sent: Tuesday, November 24, 2015 3:11 PM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; devicet...@vger.kernel.org; Wood Scott-B07421
> Subject: Re: [PATCH] cpufreq: qoriq: Register cooling device based on
> device tree
> 
> On 24-11-15, 14:55, Jia Hongtao wrote:
> > +   /* Register CPU cooling device for QorIQ platform */
> > +   for_each_node_with_property(cpu_np, "#cooling-cells") {
> > +   of_property_read_u32(cpu_np, "reg", _id);
> > +   cpufreq_get_policy(_policy, cpu_id);
> 
> That's not the right way to do it. You already have DT node for the CPU,
> look at how it is done from ->ready() callback for cpufreq-dt.
> 
> --
> viresh

Thanks.

I made a new patch to use ->ready callback for cpu cooling registration.
I will send V2 after test.

-Hongtao.
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RE: [PATCH V3] thermal: qoriq: Add thermal management support

2015-11-04 Thread Hongtao Jia



> -Original Message-
> From: Eduardo Valentin [mailto:edubez...@gmail.com]
> Sent: Thursday, November 05, 2015 3:25 AM
> To: Jia Hongtao-B38951
> Cc: Wood Scott-B07421; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH V3] thermal: qoriq: Add thermal management support
> 
> On Fri, Sep 25, 2015 at 03:09:42AM +, Hongtao Jia wrote:
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Friday, September 25, 2015 6:10 AM
> > > To: Jia Hongtao-B38951
> > > Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> > > d...@lists.ozlabs.org
> > > Subject: Re: [PATCH V3] thermal: qoriq: Add thermal management
> > > support
> > >
> > > On Wed, 2015-09-23 at 16:28 +0800, Jia Hongtao wrote:
> > > > This driver add thermal management support by enabling TMU
> > > > (Thermal Monitoring Unit) on QorIQ platform.
> > > >
> > > > It's based on thermal of framework:
> > > > - Trip points defined in device tree.
> > > > - Cpufreq as cooling device registered in qoriq cpufreq driver.
> > >
> > > I don't see any cooling device registered in the qoriq cpufreq driver.
> > > Is this dependent on some other patch?
> >
> > It's not depend on any patch. But I saw your patch below:
> > [PATCH v3 5/5] cpufreq: qoriq: Don't look at clock implementation
> > details So I hold my patch waiting for your patch merged or there will
> be conflict.
> >
> > I could send it out too if you are fine with it.
> 
> Would you guys benefit of cpufreq-cpu0?
> 
> 
> 
> 
> >
> > >
> > > >
> > > > Signed-off-by: Jia Hongtao <hongtao@freescale.com>
> > > > ---
> > > > V3: Using thermal of framework.
> > > >
> > > >  drivers/thermal/Kconfig |  11 ++
> > > >  drivers/thermal/Makefile|   1 +
> > > >  drivers/thermal/qoriq_thermal.c | 267
> 
> Please include a binding description in your next version. Also, remember
> to include an example of your binding.
> 
> 
> 
> > > > 
> > > >  3 files changed, 279 insertions(+)  create mode 100644
> > > > drivers/thermal/qoriq_thermal.c
> > > >
> > > > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > > > index 0390044..c91041b 100644
> > > > --- a/drivers/thermal/Kconfig
> > > > +++ b/drivers/thermal/Kconfig
> > > > @@ -180,6 +180,17 @@ config IMX_THERMAL
> > > > cpufreq is used as the cooling device to throttle CPUs when
> the
> > > > passive trip is crossed.
> > > >
> > > > +config QORIQ_THERMAL
> 
> 
> It would be really great if you could consolidate this driver with
> IMX_THERMAL. Do you think it is doable?

The TMU IP on I.MX and QorIQ platform are completely different and they
use the different cpufreq driver.

I don't think they could share the same thermal driver elegantly.

-Hongtao. 

> 
> > > > + tristate "Freescale QorIQ Thermal Monitoring Unit"
> > > > + depends on CPU_THERMAL
> > > > + depends on THERMAL_OF
> > > > + default n
> > > > + help
> > > > +   Enable thermal management based on Freescale QorIQ Thermal
> > > Monitoring
> > > > +   Unit (TMU). It supports one critical trip point and one
> > > > + passive
> > > trip
> > > > +   point. The cpufreq is used as the cooling device to
> > > > + throttle
> > > CPUs when
> > > > +   the passive trip is crossed.
> > >
> > > "default n" is unnecessary -- n is already the default.
> >
> > Right.
> >
> > >
> > > Where is the interaction between this driver and cpufreq?
> >
> > It's all in cpufreq patch I mentioned above.
> >
> > >
> > > > config SPEAR_THERMAL
> > > >   bool "SPEAr thermal sensor driver"
> > > >   depends on PLAT_SPEAR
> > > > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > > > index
> > > > 26f1608..e55d703 100644
> > > > --- a/drivers/thermal/Makefile
> > > > +++ b/drivers/thermal/Makefile
> > > > @@ -33,6 +33,7 @@ obj-$(CONFIG_DOVE_THERMAL)  +=
> dove_thermal.o
> > > >  obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
> > &

RE: [PATCH V3] thermal: qoriq: Add thermal management support

2015-09-25 Thread Hongtao Jia


> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, September 25, 2015 1:12 PM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH V3] thermal: qoriq: Add thermal management support
> 
> On Thu, 2015-09-24 at 22:09 -0500, Jia Hongtao-B38951 wrote:
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Friday, September 25, 2015 6:10 AM
> > > To: Jia Hongtao-B38951
> > > Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> > > d...@lists.ozlabs.org
> > > Subject: Re: [PATCH V3] thermal: qoriq: Add thermal management
> support
> > >
> > > On Wed, 2015-09-23 at 16:28 +0800, Jia Hongtao wrote:
> > > > This driver add thermal management support by enabling TMU (Thermal
> > > > Monitoring Unit) on QorIQ platform.
> > > >
> > > > It's based on thermal of framework:
> > > > - Trip points defined in device tree.
> > > > - Cpufreq as cooling device registered in qoriq cpufreq driver.
> > >
> > > I don't see any cooling device registered in the qoriq cpufreq driver.
> > > Is this dependent on some other patch?
> >
> > It's not depend on any patch. But I saw your patch below:
> > [PATCH v3 5/5] cpufreq: qoriq: Don't look at clock implementation
> details
> > So I hold my patch waiting for your patch merged or there will be
> conflict.
> >
> > I could send it out too if you are fine with it.
> 
> Yes, rebase it on that patch and send it.  Mention below the --- that
> you're
> depending on that patch, and provide a patchwork/archive link.

Ok. But I need rebase again if you have further changes on that patch.
Anyway, this is not a big problem for me.

> 
> > > > +static int tmu_get_temp(void *p, int *temp) {
> > > > + u8 val;
> > > > + struct qoriq_tmu_data *data = p;
> > > > +
> > > > + val = ioread32be(>regs->site[0].tritsr);
> > > > + *temp = (int)val * 1000;
> > >
> > > Why don't you declare val as int in the first place?
> >
> > It's a 32bit register.
> > Only the least significant 8 bits represent the temperature.
> > The most significant bit shows the validness of the value.
> > I use u8 type to remove the rest 24bits influence.
> 
> That's even worse.  Use an explicit & operation to extract the field
> you're
> interested in.

Will change for next version.

> 
> > > > + ret = qoriq_tmu_calibration(pdev);  /* TMU calibration */
> > > > + if (ret < 0) {
> > > > + dev_err(>dev, "TMU calibration failed.\n");
> > > > + ret = -ENODEV;
> > > > + goto err_iomap;
> > > > + }
> > >
> > > That function returns negative when device tree properties are
> missing,
> > > not when a calibration procedure fails.
> >
> > What's your suggestion here to return then?
> 
> Remove this message and add a message in qoriq_tmu_calibration for each
> error
> condition.  Also have qoriq_tmu_calibration pass back a proper error code,
> not -1.

Yes, this is more reasonable.

> 
> > > > +static const struct of_device_id qoriq_tmu_match[] = {
> > > > + { .compatible = "fsl,qoriq-tmu", },
> > > > + {},
> > > > +};
> > >
> > > Binding?
> >
> > Not send out yet.
> 
> The binding needs to come before the driver that uses it.

Right. I will send out the whole patchset.

> 
> -Scott
> 

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RE: [PATCH V3] thermal: qoriq: Add thermal management support

2015-09-24 Thread Hongtao Jia


> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, September 25, 2015 6:10 AM
> To: Jia Hongtao-B38951
> Cc: edubez...@gmail.com; linux...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH V3] thermal: qoriq: Add thermal management support
> 
> On Wed, 2015-09-23 at 16:28 +0800, Jia Hongtao wrote:
> > This driver add thermal management support by enabling TMU (Thermal
> > Monitoring Unit) on QorIQ platform.
> >
> > It's based on thermal of framework:
> > - Trip points defined in device tree.
> > - Cpufreq as cooling device registered in qoriq cpufreq driver.
> 
> I don't see any cooling device registered in the qoriq cpufreq driver.
> Is this dependent on some other patch?

It's not depend on any patch. But I saw your patch below:
[PATCH v3 5/5] cpufreq: qoriq: Don't look at clock implementation details
So I hold my patch waiting for your patch merged or there will be conflict.

I could send it out too if you are fine with it.

> 
> >
> > Signed-off-by: Jia Hongtao 
> > ---
> > V3: Using thermal of framework.
> >
> >  drivers/thermal/Kconfig |  11 ++
> >  drivers/thermal/Makefile|   1 +
> >  drivers/thermal/qoriq_thermal.c | 267
> > 
> >  3 files changed, 279 insertions(+)
> >  create mode 100644 drivers/thermal/qoriq_thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index
> > 0390044..c91041b 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -180,6 +180,17 @@ config IMX_THERMAL
> > cpufreq is used as the cooling device to throttle CPUs when the
> > passive trip is crossed.
> >
> > +config QORIQ_THERMAL
> > + tristate "Freescale QorIQ Thermal Monitoring Unit"
> > + depends on CPU_THERMAL
> > + depends on THERMAL_OF
> > + default n
> > + help
> > +   Enable thermal management based on Freescale QorIQ Thermal
> Monitoring
> > +   Unit (TMU). It supports one critical trip point and one passive
> trip
> > +   point. The cpufreq is used as the cooling device to throttle
> CPUs when
> > +   the passive trip is crossed.
> 
> "default n" is unnecessary -- n is already the default.

Right.

> 
> Where is the interaction between this driver and cpufreq?

It's all in cpufreq patch I mentioned above.

> 
> > config SPEAR_THERMAL
> >   bool "SPEAr thermal sensor driver"
> >   depends on PLAT_SPEAR
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index
> > 26f1608..e55d703 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -33,6 +33,7 @@ obj-$(CONFIG_DOVE_THERMAL)  += dove_thermal.o
> >  obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
> >  obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
> >  obj-$(CONFIG_IMX_THERMAL)+= imx_thermal.o
> > +obj-$(CONFIG_QORIQ_THERMAL)  += qoriq_thermal.o
> >  obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
> >  obj-$(CONFIG_INTEL_POWERCLAMP)   += intel_powerclamp.o
> >  obj-$(CONFIG_X86_PKG_TEMP_THERMAL)   += x86_pkg_temp_thermal.o
> > diff --git a/drivers/thermal/qoriq_thermal.c
> > b/drivers/thermal/qoriq_thermal.c new file mode 100644 index
> > 000..7c2a3261
> > --- /dev/null
> > +++ b/drivers/thermal/qoriq_thermal.c
> > @@ -0,0 +1,267 @@
> > +/*
> > + * Copyright 2015 Freescale Semiconductor, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > +modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but
> > +WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
> > +or
> > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
> > +License
> > for
> > + * more details.
> > + *
> > + */
> > +
> > +/*
> > + * Based on Freescale QorIQ Thermal Monitoring Unit (TMU)  */
> 
> What does this comment mean?  This *is* the "Freescale QorIQ Thermal
> Monitoring Unit" driver.

I mean thermal management based on the monitor TMU.
I could remove this comment though.

> 
> > +#include 
> 
> What do you use from this header?

Sorry, forget to remove it from last version in which cooling devices are
registered in thermal driver instead of cpufreq driver.

> 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include "thermal_core.h"
> > +
> > +#define SITES_MAX16
> > +
> > +/*
> > + * QorIQ TMU Registers
> > + */
> > +struct qoriq_tmu_site_regs {
> > + __be32 tritsr;  /* Immediate Temperature Site Register */
> > + __be32 tratsr;  /* Average Temperature Site Register */
> > + u8 res0[0x8];
> > +} __packed;
> > +
> > +struct qoriq_tmu_regs {
> > + __be32 tmr; /* Mode Register */
> > +#define TMR_DISABLE  0x0
> >

RE: [PATCH] PowerPC: Move Freescale device tree files into fsl folder

2015-09-17 Thread Hongtao Jia

Typo in message.
This patch was superseded.

Please refer to the new one I just sent.

Thanks.

---
Best Regards,
Hongtao


> -Original Message-
> From: Jia Hongtao [mailto:hongtao@freescale.com]
> Sent: Friday, September 18, 2015 11:52 AM
> To: Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org;
> robh...@kernel.org; Jia Hongtao-B38951
> Subject: [PATCH] PowerPC: Move Freescale device tree files into fsl
> folder
> 
> It makes no sense that some Freescale device tree files are in fsl
> directory while some others not. This patch move Freescale device tree
> files into fsl folder. To do that the following two steps are made:
> - Move Freescale device tree files into fsl folder.
> - Update the include path in these files from "fsl/*.dtsi" to "*.dtsi".
> 
> Plese add "fsl/" prefix when you make dtb using Makefile.
> 
> Signed-off-by: Jia Hongtao 
> ---
>  arch/powerpc/boot/dts/{ => fsl}/b4420qds.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/b4860qds.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/b4qds.dtsi | 2 +-
>  arch/powerpc/boot/dts/{ => fsl}/bsc9131rdb.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/bsc9131rdb.dtsi| 0
>  arch/powerpc/boot/dts/{ => fsl}/bsc9132qds.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/bsc9132qds.dtsi| 0
>  arch/powerpc/boot/dts/{ => fsl}/c293pcie.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/ge_imp3a.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/kmcoge4.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8536ds.dts  | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8536ds.dtsi | 0
>  arch/powerpc/boot/dts/{ => fsl}/mpc8536ds_36b.dts  | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8540ads.dts | 2 +-
>  arch/powerpc/boot/dts/{ => fsl}/mpc8541cds.dts | 2 +-
>  arch/powerpc/boot/dts/{ => fsl}/mpc8544ds.dts  | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8544ds.dtsi | 0
>  arch/powerpc/boot/dts/{ => fsl}/mpc8548cds.dtsi| 0
>  arch/powerpc/boot/dts/{ => fsl}/mpc8548cds_32b.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8548cds_36b.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8555cds.dts | 2 +-
>  arch/powerpc/boot/dts/{ => fsl}/mpc8560ads.dts | 2 +-
>  arch/powerpc/boot/dts/{ => fsl}/mpc8568mds.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8569mds.dts | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8572ds.dts  | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8572ds.dtsi | 0
>  arch/powerpc/boot/dts/{ => fsl}/mpc8572ds_36b.dts  | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/mpc8572ds_camp_core0.dts   | 0
>  arch/powerpc/boot/dts/{ => fsl}/mpc8572ds_camp_core1.dts   | 0
>  arch/powerpc/boot/dts/{ => fsl}/mvme2500.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/oca4080.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb-pa.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb-pa.dtsi   | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb-pa_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb-pb.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb-pb_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb.dtsi  | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb_32b.dtsi  | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1010rdb_36b.dtsi  | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020mbg-pc.dtsi   | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020mbg-pc_32b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020mbg-pc_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pc.dtsi   | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pc_32b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pc_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pc_camp_core0.dts | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pc_camp_core1.dts | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb-pd.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb.dtsi  | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020rdb_36b.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020utm-pc.dtsi   | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1020utm-pc_32b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1020utm-pc_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1021mds.dts   | 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1021rdb-pc.dtsi   | 0
>  arch/powerpc/boot/dts/{ => fsl}/p1021rdb-pc_32b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1021rdb-pc_36b.dts| 4 ++--
>  arch/powerpc/boot/dts/{ => fsl}/p1022ds.dtsi

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

2015-08-14 Thread Hongtao Jia

 -Original Message-
 From: Eduardo Valentin [mailto:edubez...@gmail.com]
 Sent: Friday, August 14, 2015 12:29 PM
 To: Jia Hongtao-B38951
 Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
 p...@vger.kernel.org
 Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support based
 on TMU

 Hello Hongtao,

 On Fri, Aug 14, 2015 at 03:15:22AM +, Hongtao Jia wrote:
  Hi Eduardo,

  In previous mail I asked questions about including header files in
 device tree.
  Don't bother, I have already figured out the solution.

  Another questions is about cpu cooling:
  I found out that there is no explicit calling for registering cpu
  cooling device in the of-thermal style drivers.

 Your understanding is correct.

  And Samsung did it in cpufreq driver: drivers/cpufreq/exynos-cpufreq.c

 Yes.

  Should all the of-thermal driver use the same way?

 of-thermal won't handle the cooling device registering. It is typically
 registered by the cpufreq driver. Have a look in
   drivers/cpufreq/cpufreq-dt.c

  Or is there any recommendation for registering cpu cooling device?
  (I enabled the CONFIG_CPUFREQ_DT and still got no cooling device
  registered)

 If your system supports using cpufreq-dt, then it will handle registering
 the cpucooling for you, if you configures the cooling dt properties in
 your DT files.

 How does your DT entry look like?

Here is the related code snippet:

cpus {
#address-cells = 1;
#size-cells = 0;

cpu0: PowerPC,e5500@0 {
device_type = cpu;
reg = 0;
clocks = mux0;
next-level-cache = L2_1;
/*cooling-min-level = 0;*/
/*cooling-max-level = 1;*/
#cooling-cells = 2;
L2_1: l2-cache {
next-level-cache = cpc;
};
};
cpu1: PowerPC,e5500@1 {
device_type = cpu;
reg = 1;
clocks = mux1;
next-level-cache = L2_2;
/*cooling-min-level = 0;*/
/*cooling-max-level = 1;*/
#cooling-cells = 2;
L2_2: l2-cache {
next-level-cache = cpc;
};
};
cpu2: PowerPC,e5500@2 {
device_type = cpu;
reg = 2;
clocks = mux2;
next-level-cache = L2_3;
/*cooling-min-level = 0;*/
/*cooling-max-level = 1;*/
#cooling-cells = 2;
L2_3: l2-cache {
next-level-cache = cpc;
};
};
cpu3: PowerPC,e5500@3 {
device_type = cpu;
reg = 3;
clocks = mux3;
next-level-cache = L2_4;
/*cooling-min-level = 0;*/
/*cooling-max-level = 1;*/
#cooling-cells = 2;
L2_4: l2-cache {
next-level-cache = cpc;
};
};

..

thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = 1000;
polling-delay = 5000;

thermal-sensors = tmu;

trips {
cpu_alert: cpu-alert {
temperature = 45000;
hysteresis = 2000;
type = passive;
};
cpu_crit: cpu-crit {
temperature = 95000;
hysteresis = 2000;
type = critical;
};
};

cooling-maps {
map0 {
trip = cpu_alert;
cooling-device =
cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT;
};
map1 {
trip = cpu_alert;
cooling-device =
cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

2015-08-13 Thread Hongtao Jia

Hi Eduardo,

In previous mail I asked questions about including header files in device tree.
Don't bother, I have already figured out the solution.

Another questions is about cpu cooling:
I found out that there is no explicit calling for registering cpu cooling
device in the of-thermal style drivers.

And Samsung did it in cpufreq driver: drivers/cpufreq/exynos-cpufreq.c

Should all the of-thermal driver use the same way?
Or is there any recommendation for registering cpu cooling device?
(I enabled the CONFIG_CPUFREQ_DT and still got no cooling device registered)

Thanks.

---
Best Regards,
Hongtao


 -Original Message-
 From: Linuxppc-dev [mailto:linuxppc-dev-
 bounces+b38951=freescale@lists.ozlabs.org] On Behalf Of Hongtao Jia
 Sent: Friday, August 07, 2015 4:15 PM
 To: Eduardo Valentin
 Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; linux-
 p...@vger.kernel.org
 Subject: RE: [PATCH V2] QorIQ/TMU: add thermal management support based
 on TMU
 
 Thanks for your comments.
 Please see my questions inline.
 
 Thanks.
 ---
 Best Regards,
 Hongtao
 
 
  -Original Message-
  From: Eduardo Valentin [mailto:edubez...@gmail.com]
  Sent: Thursday, August 06, 2015 3:43 AM
  To: Jia Hongtao-B38951
  Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood
  Scott-
  B07421
  Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support
  based on TMU
 
  On Thu, Jul 30, 2015 at 08:13:09AM +, Hongtao Jia wrote:
   - Any specific reason why not using OF thermal?
   - No, actually.
  
   I'd like to use OF thermal after some clarification.
  
   Regarding to cooling-maps. For some cases there should be more
   than one cpus as cooling device and they are independent.
   1. Let's say 4. So we need to provide 4 maps like map0-map3. Right?
 
  That would depend on the amount of sensors you have. Do you have one
  sensor per cpu? if the answer is yes, then you probably want to have
  four different map entries, yes, but one on each thermal zone of each
  cpu temperature sensor. if the answer is no, then you would need to
  have all the maps in the same thermal zone.
 
   2. cooling-max-level may vary depend on switch settings or firmware.
  Is that
  OK if I do not provide cooling-min-level and cooling-max-level
  property?
 
  That is already achievable by using the cooling-device property of a
  cooling map.
 
  Please have a look in the example section of the
  Documentation/devicetree/bindings/thermal/thermal.txt
 
 Yes, I read this file.
 So in my understanding:
 There is no need to provide cooling-min-level and cooling-max-level
 property.
 THERMAL_NO_LIMIT value in cooling device node will indicate the driver to
 automatically parse the min and max state, right?
 
 Talking about THERMAL_NO_LIMIT, I need to #include dt-
 bindings/thermal/thermal.h to provide the definition. But I got
 compiling error when build dtb file.
 I did some research and using make t1040qds.dtb in order to involve
 preprocessor.
 But with simply adding #include dt-bindings/thermal/thermal.h to
 t1040si-post.dtsi at line 35 I still got error like this:
 Error: arch/powerpc/boot/dts/fsl/t1040si-post.dtsi:35.1-9 syntax error
 FATAL ERROR: Unable to parse input tree
 
 Could you help me out here.
 Thanks.
 
 
  Let me know if you need further clarification.
 
 
  BR,
 
  Eduardo Valentin
 
  
   Thanks.
   -Hongtao
  
  
-Original Message-
From: Eduardo Valentin [mailto:edubez...@gmail.com]
Sent: Thursday, July 30, 2015 2:56 PM
To: Jia Hongtao-B38951
Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood
Scott-
B07421
Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support
based on TMU
   
On Wed, Jul 29, 2015 at 02:19:39PM +0800, Jia Hongtao wrote:
 It supports one critical trip point and one passive trip point.
 The cpufreq is used as the cooling device to throttle CPUs when
 the passive trip is crossed.

 Signed-off-by: Jia Hongtao hongtao@freescale.com
 ---
 This patch based on:
 http://patchwork.ozlabs.org/patch/482987/

 Changes for V2:
 * Add tmu-range parse.
 * Use default trend hook.
 * Using latest thermal_zone_bind_cooling_device API.
 * Add calibration check during initialization.
 * Disable/enalbe device when suspend/resume.

  drivers/thermal/Kconfig |  11 ++
  drivers/thermal/Makefile|   1 +
  drivers/thermal/qoriq_thermal.c | 406
 
  3 files changed, 418 insertions(+)  create mode 100644
 drivers/thermal/qoriq_thermal.c

 diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
 index
 118938e..a200745 100644
 --- a/drivers/thermal/Kconfig
 +++ b/drivers/thermal/Kconfig
 @@ -180,6 +180,17 @@ config IMX_THERMAL
 cpufreq is used as the cooling device to throttle CPUs when
  the
 passive trip is crossed

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

2015-08-07 Thread Hongtao Jia

Thanks for your comments.
Please see my questions inline.

Thanks.
---
Best Regards,
Hongtao


 -Original Message-
 From: Eduardo Valentin [mailto:edubez...@gmail.com]
 Sent: Thursday, August 06, 2015 3:43 AM
 To: Jia Hongtao-B38951
 Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
 B07421
 Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support based
 on TMU
 
 On Thu, Jul 30, 2015 at 08:13:09AM +, Hongtao Jia wrote:
  - Any specific reason why not using OF thermal?
  - No, actually.
 
  I'd like to use OF thermal after some clarification.
 
  Regarding to cooling-maps. For some cases there should be more than
  one cpus as cooling device and they are independent.
  1. Let's say 4. So we need to provide 4 maps like map0-map3. Right?
 
 That would depend on the amount of sensors you have. Do you have one
 sensor per cpu? if the answer is yes, then you probably want to have four
 different map entries, yes, but one on each thermal zone of each cpu
 temperature sensor. if the answer is no, then you would need to have all
 the maps in the same thermal zone.
 
  2. cooling-max-level may vary depend on switch settings or firmware.
 Is that
 OK if I do not provide cooling-min-level and cooling-max-level
 property?
 
 That is already achievable by using the cooling-device property of a
 cooling map.
 
 Please have a look in the example section of the
 Documentation/devicetree/bindings/thermal/thermal.txt

Yes, I read this file.
So in my understanding:
There is no need to provide cooling-min-level and cooling-max-level 
property.
THERMAL_NO_LIMIT value in cooling device node will indicate the driver to
automatically parse the min and max state, right?

Talking about THERMAL_NO_LIMIT, I need to #include 
dt-bindings/thermal/thermal.h
to provide the definition. But I got compiling error when build dtb file.
I did some research and using make t1040qds.dtb in order to involve 
preprocessor.
But with simply adding #include dt-bindings/thermal/thermal.h to 
t1040si-post.dtsi
at line 35 I still got error like this:
Error: arch/powerpc/boot/dts/fsl/t1040si-post.dtsi:35.1-9 syntax error
FATAL ERROR: Unable to parse input tree

Could you help me out here.
Thanks.

 
 Let me know if you need further clarification.
 
 
 BR,
 
 Eduardo Valentin
 
 
  Thanks.
  -Hongtao
 
 
   -Original Message-
   From: Eduardo Valentin [mailto:edubez...@gmail.com]
   Sent: Thursday, July 30, 2015 2:56 PM
   To: Jia Hongtao-B38951
   Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood
   Scott-
   B07421
   Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support
   based on TMU
  
   On Wed, Jul 29, 2015 at 02:19:39PM +0800, Jia Hongtao wrote:
It supports one critical trip point and one passive trip point.
The cpufreq is used as the cooling device to throttle CPUs when
the passive trip is crossed.
   
Signed-off-by: Jia Hongtao hongtao@freescale.com
---
This patch based on:
http://patchwork.ozlabs.org/patch/482987/
   
Changes for V2:
* Add tmu-range parse.
* Use default trend hook.
* Using latest thermal_zone_bind_cooling_device API.
* Add calibration check during initialization.
* Disable/enalbe device when suspend/resume.
   
 drivers/thermal/Kconfig |  11 ++
 drivers/thermal/Makefile|   1 +
 drivers/thermal/qoriq_thermal.c | 406

 3 files changed, 418 insertions(+)  create mode 100644
drivers/thermal/qoriq_thermal.c
   
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index
118938e..a200745 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -180,6 +180,17 @@ config IMX_THERMAL
  cpufreq is used as the cooling device to throttle CPUs when
 the
  passive trip is crossed.
   
+config QORIQ_THERMAL
+   tristate Freescale QorIQ Thermal Monitoring Unit
+   depends on CPU_THERMAL
+   depends on OF
+   default n
+   help
+ Enable thermal management based on Freescale QorIQ Thermal
   Monitoring
+ Unit (TMU). It supports one critical trip point and one
+passive
   trip
+ point. The cpufreq is used as the cooling device to
 throttle
+CPUs
   when
+ the passive trip is crossed.
+
 config SPEAR_THERMAL
bool SPEAr thermal sensor driver
depends on PLAT_SPEAR
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index
535dfee..8c25859 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_DOVE_THERMAL)+= dove_thermal.o
 obj-$(CONFIG_DB8500_THERMAL)   += db8500_thermal.o
 obj-$(CONFIG_ARMADA_THERMAL)   += armada_thermal.o
 obj-$(CONFIG_IMX_THERMAL)  += imx_thermal.o
+obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
 obj

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

2015-07-30 Thread Hongtao Jia

- Any specific reason why not using OF thermal?
- No, actually.

I'd like to use OF thermal after some clarification.

Regarding to cooling-maps. For some cases there should be more than one cpus
as cooling device and they are independent.
1. Let's say 4. So we need to provide 4 maps like map0-map3. Right?
2. cooling-max-level may vary depend on switch settings or firmware. Is that
   OK if I do not provide cooling-min-level and cooling-max-level property?
   
Thanks.
-Hongtao


 -Original Message-
 From: Eduardo Valentin [mailto:edubez...@gmail.com]
 Sent: Thursday, July 30, 2015 2:56 PM
 To: Jia Hongtao-B38951
 Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
 B07421
 Subject: Re: [PATCH V2] QorIQ/TMU: add thermal management support based
 on TMU
 
 On Wed, Jul 29, 2015 at 02:19:39PM +0800, Jia Hongtao wrote:
  It supports one critical trip point and one passive trip point.
  The cpufreq is used as the cooling device to throttle CPUs when the
  passive trip is crossed.
 
  Signed-off-by: Jia Hongtao hongtao@freescale.com
  ---
  This patch based on:
  http://patchwork.ozlabs.org/patch/482987/
 
  Changes for V2:
  * Add tmu-range parse.
  * Use default trend hook.
  * Using latest thermal_zone_bind_cooling_device API.
  * Add calibration check during initialization.
  * Disable/enalbe device when suspend/resume.
 
   drivers/thermal/Kconfig |  11 ++
   drivers/thermal/Makefile|   1 +
   drivers/thermal/qoriq_thermal.c | 406
  
   3 files changed, 418 insertions(+)
   create mode 100644 drivers/thermal/qoriq_thermal.c
 
  diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index
  118938e..a200745 100644
  --- a/drivers/thermal/Kconfig
  +++ b/drivers/thermal/Kconfig
  @@ -180,6 +180,17 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
 
  +config QORIQ_THERMAL
  +   tristate Freescale QorIQ Thermal Monitoring Unit
  +   depends on CPU_THERMAL
  +   depends on OF
  +   default n
  +   help
  + Enable thermal management based on Freescale QorIQ Thermal
 Monitoring
  + Unit (TMU). It supports one critical trip point and one passive
 trip
  + point. The cpufreq is used as the cooling device to throttle CPUs
 when
  + the passive trip is crossed.
  +
   config SPEAR_THERMAL
  bool SPEAr thermal sensor driver
  depends on PLAT_SPEAR
  diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index
  535dfee..8c25859 100644
  --- a/drivers/thermal/Makefile
  +++ b/drivers/thermal/Makefile
  @@ -33,6 +33,7 @@ obj-$(CONFIG_DOVE_THERMAL)+= dove_thermal.o
   obj-$(CONFIG_DB8500_THERMAL)   += db8500_thermal.o
   obj-$(CONFIG_ARMADA_THERMAL)   += armada_thermal.o
   obj-$(CONFIG_IMX_THERMAL)  += imx_thermal.o
  +obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
   obj-$(CONFIG_DB8500_CPUFREQ_COOLING)   += db8500_cpufreq_cooling.o
   obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
   obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
  diff --git a/drivers/thermal/qoriq_thermal.c
  b/drivers/thermal/qoriq_thermal.c new file mode 100644 index
  000..0694f42
  --- /dev/null
  +++ b/drivers/thermal/qoriq_thermal.c
  @@ -0,0 +1,406 @@
  +/*
  + * Copyright 2015 Freescale Semiconductor, Inc.
  + *
  + * This program is free software; you can redistribute it and/or
  +modify it
  + * under the terms and conditions of the GNU General Public License,
  + * version 2, as published by the Free Software Foundation.
  + *
  + * This program is distributed in the hope it will be useful, but
  +WITHOUT
  + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  +or
  + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  +License for
  + * more details.
  + *
  + */
  +
  +/*
  + * Based on Freescale QorIQ Thermal Monitoring Unit (TMU)  */
  +#include linux/cpufreq.h #include linux/cpu_cooling.h #include
  +linux/module.h #include linux/platform_device.h #include
  +linux/err.h #include linux/io.h #include linux/of.h #include
  +linux/of_address.h #include linux/thermal.h
  +
  +#define SITES_MAX  16
  +
  +#define TMU_TEMP_PASSIVE   85000
  +#define TMU_TEMP_CRITICAL  95000
  +
  +#define TMU_PASSIVE_DELAY  1000/* Milliseconds */
  +#define TMU_POLLING_DELAY  5000
  +
  +/* The driver supports 1 passive trip point and 1 critical trip point
  +*/ enum tmu_thermal_trip {
  +   TMU_TRIP_PASSIVE,
  +   TMU_TRIP_CRITICAL,
  +   TMU_TRIP_NUM,
  +};
  +
  +/*
  + * QorIQ TMU Registers
  + */
  +struct qoriq_tmu_site_regs {
  +   __be32 tritsr;  /* Immediate Temperature Site Register */
  +   __be32 tratsr;  /* Average Temperature Site Register */
  +   u8 res0[0x8];
  +} __packed;
  +
  +struct qoriq_tmu_regs {
  +   __be32 tmr; /* Mode Register */
  +#define TMR_DISABLE0x0
  +#define TMR_ME

RE: [PATCH V3] QorIQ/TMU: add TMU node to device tree for QorIQ T1040

2015-07-09 Thread Hongtao Jia

Hi Scott,

Patch updated to V3, please help to review.
Thanks.

---
Best Regards,
Hongtao

 -Original Message-
 From: Jia Hongtao [mailto:hongtao@freescale.com]
 Sent: Thursday, June 11, 2015 3:53 PM
 To: Wood Scott-B07421
 Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org;
 robh...@kernel.org; edubez...@gmail.com; Jia Hongtao-B38951
 Subject: [PATCH V3] QorIQ/TMU: add TMU node to device tree for QorIQ
 T1040
 
 This is Thermal Monitoring Unit for QorIQ platform.
 
 Signed-off-by: Jia Hongtao hongtao@freescale.com
 ---
 Changes of V3:
 * Put TMU node directly into t1040si-post.dtsi file.
 * Add fsl,tmu-range property.
 * Change calibration property to fsl,tmu-calibration.
 * Update the calibration data.
 
 Changes of V2:
 * Provide more details on compatible and calibration properties.
 
  .../devicetree/bindings/thermal/qoriq-thermal.txt  | 63
 ++
  arch/powerpc/boot/dts/fsl/t1040si-post.dtsi| 42 +++
  2 files changed, 105 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/thermal/qoriq-
 thermal.txt
 
 diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 new file mode 100644
 index 000..2bc9cb3
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 @@ -0,0 +1,63 @@
 +* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
 +
 +Required properties:
 +- compatible : Must include fsl,qoriq-tmu. The version of the device
 is
 + determined by the TMU IP Block Revision Register (IPBRR0) at
 + offset 0x0BF8.
 + Table of correspondences between IPBRR0 values and example  chips:
 + Value   Device
 + --  -
 + 0x01900102  T1040
 +- reg : Address range of TMU registers.
 +- interrupts : Contains the interrupt for TMU.
 +- fsl,tmu-range : Temperature range for TMU. Including the starting
 + temperature and number of calibration points for each range.
 +- fsl,tmu-calibration : Calibration table for TMU. This is required to
 + determine what a specific sensor reading translates to in degrees
 + Celsius. There are four calibration ranges, for each range we need
 + a couple of calibration data formatted like TTCFGR, TSCFGR.
 + Freescale provides the data required.
 +
 +Example:
 +
 +tmu@f {
 + compatible = fsl,qoriq-tmu;
 + reg = 0xf 0x1000;
 + interrupts = 18 2 0 0;
 + fsl,tmu-range = 0x000a 0x00090026 0x0008004a 0x0001006a;
 + fsl,tmu-calibration = 0x 0x0025
 +0x0001 0x0028
 +0x0002 0x002d
 +0x0003 0x0031
 +0x0004 0x0036
 +0x0005 0x003a
 +0x0006 0x0040
 +0x0007 0x0044
 +0x0008 0x004a
 +0x0009 0x004f
 +0x000a 0x0054
 +
 +0x0001 0x000d
 +0x00010001 0x0013
 +0x00010002 0x0019
 +0x00010003 0x001f
 +0x00010004 0x0025
 +0x00010005 0x002d
 +0x00010006 0x0033
 +0x00010007 0x0043
 +0x00010008 0x004b
 +0x00010009 0x0053
 +
 +0x0002 0x0010
 +0x00020001 0x0017
 +0x00020002 0x001f
 +0x00020003 0x0029
 +0x00020004 0x0031
 +0x00020005 0x003c
 +0x00020006 0x0042
 +0x00020007 0x004d
 +0x00020008 0x0056
 +
 +0x0003 0x0012
 +0x00030001 0x001d;
 +};
 diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
 b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
 index 5cc01be..6d9ca4d 100644
 --- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
 +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
 @@ -407,6 +407,48 @@
   reg= 0xea000 0x4000;
   };
 
 + tmu@f {
 + compatible = fsl,qoriq-tmu;
 + reg = 0xf 0x1000;
 + interrupts = 18 2 0 0;
 + fsl,tmu-range = 0x000a 0x00090026 0x0008004a 0x0001006a;
 + fsl,tmu-calibration = 0x 0x0025
 +0x0001 0x0028
 +0x0002 0x002d
 +

RE: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

2015-06-08 Thread Hongtao Jia


 -Original Message-
 From: Wood Scott-B07421
 Sent: Wednesday, May 27, 2015 3:38 AM
 To: Jia Hongtao-B38951
 Cc: edubez...@gmail.com; linuxppc-dev@lists.ozlabs.org;
 devicet...@vger.kernel.org; robh...@kernel.org; rui.zh...@intel.com
 Subject: Re: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ
 T104x
 
 On Tue, 2015-05-26 at 01:33 -0500, Jia Hongtao-B38951 wrote:
  Hi Scott,
 
  Eduardo indicated that calibration property should add fsl
  prefix.
  I updated the patch.
  Any other comments?
  If not I will send V3 soon.
 
  Thanks.
 
 I'd go with fsl,tmu-calibration rather than fsl,calibration but not a
 big deal either way.

Thanks for the advice.

 
   diff --git a/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
   b/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
   new file mode 100644
   index 000..d85c77d
   --- /dev/null
   +++ b/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
   @@ -0,0 +1,82 @@
   +/*
   + * QorIQ TMU device tree stub [ controller @ offset 0xf ]
   + *
   + * Copyright 2015 Freescale Semiconductor Inc.
   + *
   + * Redistribution and use in source and binary forms, with or
   without
   + * modification, are permitted provided that the following
   conditions
   are met:
   + * * Redistributions of source code must retain the above
   copyright
   + *   notice, this list of conditions and the following
   disclaimer.
   + * * Redistributions in binary form must reproduce the above
   copyright
   + *   notice, this list of conditions and the following
   disclaimer in
   the
   + *   documentation and/or other materials provided with the
   distribution.
   + * * Neither the name of Freescale Semiconductor nor the
   + *   names of its contributors may be used to endorse or
   promote
   products
   + *   derived from this software without specific prior written
   permission.
   + *
   + *
   + * ALTERNATIVELY, this software may be distributed under the
   terms of
   the
   + * GNU General Public License (GPL) as published by the Free
   Software
   + * Foundation, either version 2 of that License or (at your
   option) any
   + * later version.
   + *
   + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS''
   AND
   ANY
   + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
   THE
   IMPLIED
   + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   PURPOSE
   ARE
   + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE
   LIABLE FOR
   ANY
   + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   CONSEQUENTIAL
   DAMAGES
   + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
   GOODS OR
   SERVICES;
   + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   HOWEVER
   CAUSED AND
   + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   LIABILITY, OR
   TORT
   + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
   THE USE
   OF THIS
   + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   + */
   +
+tmu@f{
   +   compatible = fsl,qoriq-tmu;
   +   reg = 0xf 0x1000;
   +   interrupts = 18 2 0 0;
   +   calibration = 0x 0x000f
   +  0x0001 0x0017
   +  0x0002 0x001e
   +  0x0003 0x0026
   +  0x0004 0x002e
   +  0x0005 0x0035
   +  0x0006 0x003d
   +  0x0007 0x0044
   +  0x0008 0x004c
   +  0x0009 0x0053
   +  0x000a 0x005b
   +  0x000b 0x0062
   +
   +  0x0001 0x0011
   +  0x00010001 0x0019
   +  0x00010002 0x0021
   +  0x00010003 0x002a
   +  0x00010004 0x0032
   +  0x00010005 0x003a
   +  0x00010006 0x0042
   +  0x00010007 0x004b
   +  0x00010008 0x0053
   +  0x00010009 0x005b
   +  0x0001000a 0x0063
   +
   +  0x0002 0x0012
   +  0x00020001 0x001b
   +  0x00020002 0x0024
   +  0x00020003 0x002c
   +  0x00020004 0x0035
   +  0x00020005 0x003d
   +  0x00020006 0x0046
   +  0x00020007 0x004e
   +  0x00020008 0x0057
   +
   +  0x0003 0x0009
   +  0x00030001 0x0011
   +  0x00030002 0x0019
   +  0x00030003 0x0021
   +  0x00030004 0x0029
   +  0x00030005 0x0031
   +  0x00030006 0x0039
   +  0x00030007 0x0041; };
   diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi

RE: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

2015-05-26 Thread Hongtao Jia

Hi Scott,

Eduardo indicated that calibration property should add fsl prefix.
I updated the patch.
Any other comments?
If not I will send V3 soon.

Thanks.

---
Best Regards,
Hongtao


 -Original Message-
 From: Jia Hongtao [mailto:hongtao@freescale.com]
 Sent: Wednesday, April 15, 2015 4:18 PM
 To: Wood Scott-B07421
 Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org;
 robh...@kernel.org; rui.zh...@intel.com; Jia Hongtao-B38951
 Subject: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ
 T104x
 
 This is Thermal Monitoring Unit for QorIQ platform.
 
 Signed-off-by: Jia Hongtao hongtao@freescale.com
 ---
 Changes from V1:
 * Provide more details on compatible and calibration properties.
 
  .../devicetree/bindings/thermal/qoriq-thermal.txt  | 68
 ++
  arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi   | 82
 ++
  arch/powerpc/boot/dts/fsl/t1040si-post.dtsi|  1 +
  3 files changed, 151 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/thermal/qoriq-
 thermal.txt
  create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
 
 diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 new file mode 100644
 index 000..48e7fff
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 @@ -0,0 +1,68 @@
 +* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
 +
 +Required properties:
 +- compatible : Must include fsl,qoriq-tmu. The version of the device
 is
 + determined by the TMU IP Block Revision Register (IPBRR0) at
 + offset 0x0BF8.
 + Table of correspondences between IPBRR0 values and example  chips:
 + Value   Device
 + --  -
 + 0x01900102  T1040
 +- reg : Address range of TMU registers.
 +- interrupts : Contains the interrupt for TMU.
 +- calibration : Calibration table for TMU. This is required to determine
 + what a specific sensor reading translates to in degrees Celsius.
 + There are four calibration config ranges, for each range we need
 + a couple of calibration data formatted like TTCFGR, TSCFGR.
 + Freescale provides the data required.
 +
 +Example:
 +
 +tmu@f {
 + compatible = fsl,qoriq-tmu;
 + reg = 0xf 0x1000;
 + interrupts = 18 2 0 0;
 + calibration = 0x 0x000f
 +0x0001 0x0017
 +0x0002 0x001e
 +0x0003 0x0026
 +0x0004 0x002e
 +0x0005 0x0035
 +0x0006 0x003d
 +0x0007 0x0044
 +0x0008 0x004c
 +0x0009 0x0053
 +0x000a 0x005b
 +0x000b 0x0062
 +
 +0x0001 0x0011
 +0x00010001 0x0019
 +0x00010002 0x0021
 +0x00010003 0x002a
 +0x00010004 0x0032
 +0x00010005 0x003a
 +0x00010006 0x0042
 +0x00010007 0x004b
 +0x00010008 0x0053
 +0x00010009 0x005b
 +0x0001000a 0x0063
 +
 +0x0002 0x0012
 +0x00020001 0x001b
 +0x00020002 0x0024
 +0x00020003 0x002c
 +0x00020004 0x0035
 +0x00020005 0x003d
 +0x00020006 0x0046
 +0x00020007 0x004e
 +0x00020008 0x0057
 +
 +0x0003 0x0009
 +0x00030001 0x0011
 +0x00030002 0x0019
 +0x00030003 0x0021
 +0x00030004 0x0029
 +0x00030005 0x0031
 +0x00030006 0x0039
 +0x00030007 0x0041;
 +};
 diff --git a/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
 b/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
 new file mode 100644
 index 000..d85c77d
 --- /dev/null
 +++ b/arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi
 @@ -0,0 +1,82 @@
 +/*
 + * QorIQ TMU device tree stub [ controller @ offset 0xf ]
 + *
 + * Copyright 2015 Freescale Semiconductor Inc.
 + *
 + * Redistribution and use in source and binary forms, with or without
 + * modification, are permitted provided that the following conditions
 are met:
 + * * Redistributions of source code must retain the above copyright
 + *   notice, this list of conditions and the following disclaimer.
 + * * Redistributions in binary form must reproduce the above
 copyright
 + *   notice, this list of conditions and the

RE: [PATCH] QorIQ/TMU: add thermal management support based on TMU

2015-05-10 Thread Hongtao Jia

Hello Eduardo,

As Rui Zhang did not response for a long time.
Could you help to review this Thermal Management driver?

Thanks.

---
Best Regards,
Hongtao

 -Original Message-
 From: Jia Hongtao-B38951
 Sent: Tuesday, April 28, 2015 3:34 PM
 To: rui.zh...@intel.com
 Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
 B07421; Jia Hongtao-B38951
 Subject: RE: [PATCH] QorIQ/TMU: add thermal management support based on
 TMU
 
 Hello Rui Zhang,
 
 Please help to review this Thermal Management driver.
 
 Thanks.
 
 ---
 Best Regards,
 Hongtao
 
  -Original Message-
  From: Jia Hongtao [mailto:hongtao@freescale.com]
  Sent: Friday, April 03, 2015 3:11 PM
  To: rui.zh...@intel.com
  Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood
  Scott- B07421; Jia Hongtao-B38951
  Subject: [PATCH] QorIQ/TMU: add thermal management support based on
  TMU
 
  It supports one critical trip point and one passive trip point.
  The cpufreq is used as the cooling device to throttle CPUs when the
  passive trip is crossed.
 
  Signed-off-by: Jia Hongtao hongtao@freescale.com
  ---
   drivers/thermal/Kconfig |  11 ++
   drivers/thermal/Makefile|   1 +
   drivers/thermal/qoriq_thermal.c | 405
  
   3 files changed, 417 insertions(+)
   create mode 100644 drivers/thermal/qoriq_thermal.c
 
  diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index
  af40db0..c0a8bd1 100644
  --- a/drivers/thermal/Kconfig
  +++ b/drivers/thermal/Kconfig
  @@ -147,6 +147,17 @@ config IMX_THERMAL
cpufreq is used as the cooling device to throttle CPUs when the
passive trip is crossed.
 
  +config QORIQ_THERMAL
  +   tristate Freescale QorIQ Thermal Monitoring Unit
  +   depends on CPU_THERMAL
  +   depends on OF
  +   default n
  +   help
  + Enable thermal management based on Freescale QorIQ Thermal
  Monitoring
  + Unit (TMU). It supports one critical trip point and one passive
  trip
  + point. The cpufreq is used as the cooling device to throttle CPUs
  when
  + the passive trip is crossed.
  +
   config SPEAR_THERMAL
  bool SPEAr thermal sensor driver
  depends on PLAT_SPEAR
  diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index
  fa0dc48..7de4847 100644
  --- a/drivers/thermal/Makefile
  +++ b/drivers/thermal/Makefile
  @@ -31,6 +31,7 @@ obj-$(CONFIG_DOVE_THERMAL)+= dove_thermal.o
   obj-$(CONFIG_DB8500_THERMAL)   += db8500_thermal.o
   obj-$(CONFIG_ARMADA_THERMAL)   += armada_thermal.o
   obj-$(CONFIG_IMX_THERMAL)  += imx_thermal.o
  +obj-$(CONFIG_QORIQ_THERMAL)+= qoriq_thermal.o
   obj-$(CONFIG_DB8500_CPUFREQ_COOLING)   += db8500_cpufreq_cooling.o
   obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
   obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
  diff --git a/drivers/thermal/qoriq_thermal.c
  b/drivers/thermal/qoriq_thermal.c new file mode 100644 index
  000..f5d3a2c
  --- /dev/null
  +++ b/drivers/thermal/qoriq_thermal.c
  @@ -0,0 +1,405 @@
  +/*
  + * Copyright 2015 Freescale Semiconductor, Inc.
  + *
  + * This program is free software; you can redistribute it and/or
  +modify
  it
  + * under the terms and conditions of the GNU General Public License,
  + * version 2, as published by the Free Software Foundation.
  + *
  + * This program is distributed in the hope it will be useful, but
  WITHOUT
  + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  + or
  + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  + License
  for
  + * more details.
  + *
  + */
  +
  +/*
  + * Based on Freescale QorIQ Thermal Monitoring Unit (TMU)  */
  +#include linux/cpufreq.h #include linux/cpu_cooling.h #include
  +linux/module.h #include linux/platform_device.h #include
  +linux/err.h #include linux/io.h #include linux/of.h #include
  +linux/thermal.h
  +
  +#define SITES_MAX  16
  +
  +#define TMU_TEMP_PASSIVE   85000
  +#define TMU_TEMP_CRITICAL  95000
  +
  +#define TMU_PASSIVE_DELAY  1000/* Milliseconds */
  +#define TMU_POLLING_DELAY  5000
  +
  +/* The driver supports 1 passive trip point and 1 critical trip point
  +*/ enum tmu_thermal_trip {
  +   TMU_TRIP_PASSIVE,
  +   TMU_TRIP_CRITICAL,
  +   TMU_TRIP_NUM,
  +};
  +
  +/*
  + * QorIQ TMU Registers
  + */
  +struct qoriq_tmu_site_regs {
  +   __be32 tritsr;  /* Immediate Temperature Site Register */
  +   __be32 tratsr;  /* Average Temperature Site Register */
  +   u8 res0[0x8];
  +} __packed;
  +
  +struct qoriq_tmu_regs {
  +   __be32 tmr; /* Mode Register */
  +#define TMR_DISABLE0x0
  +#define TMR_ME 0x8000
  +#define TMR_ALPF   0x0c00
  +#define TMR_MSITE  0x8000
  +#define TMR_ALL(TMR_ME | TMR_ALPF | TMR_MSITE)
  +   __be32 tsr; /* Status Register */
  +   __be32 tmtmir;  /* Temperature measurement interval

RE: [PATCH] QorIQ/TMU: add thermal management support based on TMU

2015-04-28 Thread Hongtao Jia

Hello Rui Zhang,

Please help to review this Thermal Management driver.

Thanks.

---
Best Regards,
Hongtao

 -Original Message-
 From: Jia Hongtao [mailto:hongtao@freescale.com]
 Sent: Friday, April 03, 2015 3:11 PM
 To: rui.zh...@intel.com
 Cc: linux...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
 B07421; Jia Hongtao-B38951
 Subject: [PATCH] QorIQ/TMU: add thermal management support based on TMU
 
 It supports one critical trip point and one passive trip point.
 The cpufreq is used as the cooling device to throttle CPUs when
 the passive trip is crossed.
 
 Signed-off-by: Jia Hongtao hongtao@freescale.com
 ---
  drivers/thermal/Kconfig |  11 ++
  drivers/thermal/Makefile|   1 +
  drivers/thermal/qoriq_thermal.c | 405
 
  3 files changed, 417 insertions(+)
  create mode 100644 drivers/thermal/qoriq_thermal.c
 
 diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
 index af40db0..c0a8bd1 100644
 --- a/drivers/thermal/Kconfig
 +++ b/drivers/thermal/Kconfig
 @@ -147,6 +147,17 @@ config IMX_THERMAL
 cpufreq is used as the cooling device to throttle CPUs when the
 passive trip is crossed.
 
 +config QORIQ_THERMAL
 + tristate Freescale QorIQ Thermal Monitoring Unit
 + depends on CPU_THERMAL
 + depends on OF
 + default n
 + help
 +   Enable thermal management based on Freescale QorIQ Thermal
 Monitoring
 +   Unit (TMU). It supports one critical trip point and one passive
 trip
 +   point. The cpufreq is used as the cooling device to throttle CPUs
 when
 +   the passive trip is crossed.
 +
  config SPEAR_THERMAL
   bool SPEAr thermal sensor driver
   depends on PLAT_SPEAR
 diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
 index fa0dc48..7de4847 100644
 --- a/drivers/thermal/Makefile
 +++ b/drivers/thermal/Makefile
 @@ -31,6 +31,7 @@ obj-$(CONFIG_DOVE_THERMAL)  += dove_thermal.o
  obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
  obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
  obj-$(CONFIG_IMX_THERMAL)+= imx_thermal.o
 +obj-$(CONFIG_QORIQ_THERMAL)  += qoriq_thermal.o
  obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
  obj-$(CONFIG_INTEL_POWERCLAMP)   += intel_powerclamp.o
  obj-$(CONFIG_X86_PKG_TEMP_THERMAL)   += x86_pkg_temp_thermal.o
 diff --git a/drivers/thermal/qoriq_thermal.c
 b/drivers/thermal/qoriq_thermal.c
 new file mode 100644
 index 000..f5d3a2c
 --- /dev/null
 +++ b/drivers/thermal/qoriq_thermal.c
 @@ -0,0 +1,405 @@
 +/*
 + * Copyright 2015 Freescale Semiconductor, Inc.
 + *
 + * This program is free software; you can redistribute it and/or modify
 it
 + * under the terms and conditions of the GNU General Public License,
 + * version 2, as published by the Free Software Foundation.
 + *
 + * This program is distributed in the hope it will be useful, but
 WITHOUT
 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 for
 + * more details.
 + *
 + */
 +
 +/*
 + * Based on Freescale QorIQ Thermal Monitoring Unit (TMU)
 + */
 +#include linux/cpufreq.h
 +#include linux/cpu_cooling.h
 +#include linux/module.h
 +#include linux/platform_device.h
 +#include linux/err.h
 +#include linux/io.h
 +#include linux/of.h
 +#include linux/thermal.h
 +
 +#define SITES_MAX16
 +
 +#define TMU_TEMP_PASSIVE 85000
 +#define TMU_TEMP_CRITICAL95000
 +
 +#define TMU_PASSIVE_DELAY1000/* Milliseconds */
 +#define TMU_POLLING_DELAY5000
 +
 +/* The driver supports 1 passive trip point and 1 critical trip point */
 +enum tmu_thermal_trip {
 + TMU_TRIP_PASSIVE,
 + TMU_TRIP_CRITICAL,
 + TMU_TRIP_NUM,
 +};
 +
 +/*
 + * QorIQ TMU Registers
 + */
 +struct qoriq_tmu_site_regs {
 + __be32 tritsr;  /* Immediate Temperature Site Register */
 + __be32 tratsr;  /* Average Temperature Site Register */
 + u8 res0[0x8];
 +} __packed;
 +
 +struct qoriq_tmu_regs {
 + __be32 tmr; /* Mode Register */
 +#define TMR_DISABLE  0x0
 +#define TMR_ME   0x8000
 +#define TMR_ALPF 0x0c00
 +#define TMR_MSITE0x8000
 +#define TMR_ALL  (TMR_ME | TMR_ALPF | TMR_MSITE)
 + __be32 tsr; /* Status Register */
 + __be32 tmtmir;  /* Temperature measurement interval
 Register */
 +#define TMTMIR_DEFAULT   0x0007
 + u8 res0[0x14];
 + __be32 tier;/* Interrupt Enable Register */
 +#define TIER_DISABLE 0x0
 + __be32 tidr;/* Interrupt Detect Register */
 + __be32 tiscr;   /* Interrupt Site Capture Register */
 + __be32 ticscr;  /* Interrupt Critical Site Capture Register
 */
 + u8 res1[0x10];
 + __be32 tmhtcrh; /* High Temperature Capture Register */
 + __be32 tmhtcrl; /* Low Temperature Capture Register */
 + u8

RE: [PATCH] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

2015-04-12 Thread Hongtao Jia

 -Original Message-
 From: Wood Scott-B07421
 Sent: Saturday, April 11, 2015 6:41 AM
 To: Jia Hongtao-B38951
 Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org;
 robh...@kernel.org; rui.zh...@intel.com
 Subject: Re: [PATCH] QorIQ/TMU: add TMU node to device tree for QorIQ
 T104x

 On Fri, 2015-04-10 at 01:23 -0500, Jia Hongtao-B38951 wrote:

   -Original Message-
   From: Wood Scott-B07421
   Sent: Friday, April 10, 2015 11:56 AM
   To: Jia Hongtao-B38951
   Cc: linuxppc-dev@lists.ozlabs.org; devicet...@vger.kernel.org;
   robh...@kernel.org; rui.zh...@intel.com
   Subject: Re: [PATCH] QorIQ/TMU: add TMU node to device tree for
   QorIQ T104x

   On Tue, 2015-03-31 at 14:17 +0800, Jia Hongtao wrote:
This is Thermal Monitoring Unit for QorIQ platform.

Signed-off-by: Jia Hongtao hongtao@freescale.com
---
 .../devicetree/bindings/thermal/qoriq-thermal.txt  | 58
   +++
 arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi   | 82
   ++
 arch/powerpc/boot/dts/fsl/t1040si-post.dtsi|  1 +
 3 files changed, 141 insertions(+)  create mode 100644
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
 create mode 100644
arch/powerpc/boot/dts/fsl/qoriq-tmu-t104xsi.dtsi

diff --git
a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
new file mode 100644
index 000..dfc17fa
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
@@ -0,0 +1,58 @@
+* Thermal Monitoring Unit (TMU) on Freescale QorIQ SoCs
+
+Required properties:
+- compatible : fsl,qoriq-tmu.

   compatible: Must include fsl,qoriq-tmu. The version of the device
 is
 determined by the TMU IP Block Revision Register (IPBRR0)
 at offset 0x0BF8.

 Table of correspondences between IPBRR0 values and example
 chips:
 Value   Device
 --- ---
 0x01900102  T1040

  I will update it in next version.

+- reg : address range of TMU registers.
+- interrupts : should contain the interrupt for TMU.

   s/should contain/contains/

  Thanks for the correction.

+- calibration : calibration table for TMU.

   What is the format of the calibration table, and where does one get
   the data?

  There are four calibration config range, for each range we got a
  couple of pairs formatted like TTCFGR, TSCFGR at offset of 0x0080,
 0x0084.

 The binding document needs to explain this, in more detail, as well as
 how one determines the data.

Right, I will add details.

 Is this configuration or hardware description?

To my understanding this is kind of hardware description.
The calibration data is vary with different SoCs.
These data is provided by hardware verification team.

-Hongtao

 -Scott

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RE: [PATCH V3] powerpc/85xx: workaround for chips with MSI hardware errata

2015-03-03 Thread Hongtao Jia

Hi Scott,

I sent V3 of this patch a few days ago.
Comments are welcome.

Thanks.
-Hongtao

 -Original Message-
 From: Jia Hongtao [mailto:hongtao@freescale.com]
 Sent: Thursday, February 26, 2015 3:23 PM
 To: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; asolo...@kb.kras.ru
 Cc: ga...@kernel.crashing.org; Li Yang-Leo-R58472; Jia Hongtao-B38951
 Subject: [PATCH V3] powerpc/85xx: workaround for chips with MSI hardware
 errata
 
 From: Hongtao Jia hongtao@freescale.com
 
 The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
 that neither MSI nor MSI-X can work fine. This is a workaround to allow
 MSI-X to function properly.
 
 Signed-off-by: Liu Shuo soniccat@gmail.com
 Signed-off-by: Li Yang le...@freescale.com
 Signed-off-by: Jia Hongtao hongtao@freescale.com
 ---
 Changes for V3:
 * remove mpic_has_erratum_pic1() function. Test erratum directly.
 * rebase on latest kernel update.
 
 Changes for V2:
 * change the name of function mpic_has_errata() to
 mpic_has_erratum_pic1().
 * move MSI_HW_ERRATA_ENDIAN define to fsl_msi.h with all other defines.
 
  arch/powerpc/sysdev/fsl_msi.c | 29 ++---
  arch/powerpc/sysdev/fsl_msi.h |  2 ++
  2 files changed, 28 insertions(+), 3 deletions(-)
 
 diff --git a/arch/powerpc/sysdev/fsl_msi.c
 b/arch/powerpc/sysdev/fsl_msi.c
 index 4bbb4b8..f086c6f 100644
 --- a/arch/powerpc/sysdev/fsl_msi.c
 +++ b/arch/powerpc/sysdev/fsl_msi.c
 @@ -162,7 +162,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev,
 int hwirq,
   msg-address_lo = lower_32_bits(address);
   msg-address_hi = upper_32_bits(address);
 
 - msg-data = hwirq;
 + /*
 +  * MPIC version 2.0 has erratum PIC1. It causes
 +  * that neither MSI nor MSI-X can work fine.
 +  * This is a workaround to allow MSI-X to function
 +  * properly. It only works for MSI-X, we prevent
 +  * MSI on buggy chips in fsl_setup_msi_irqs().
 +  */
 + if (msi_data-feature  MSI_HW_ERRATA_ENDIAN)
 + msg-data = __swab32(hwirq);
 + else
 + msg-data = hwirq;
 
   pr_debug(%s: allocated srs: %d, ibs: %d\n, __func__,
(hwirq  msi_data-srs_shift)  MSI_SRS_MASK,
 @@ -180,8 +190,16 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev,
 int nvec, int type)
   struct msi_msg msg;
   struct fsl_msi *msi_data;
 
 - if (type == PCI_CAP_ID_MSIX)
 - pr_debug(fslmsi: MSI-X untested, trying anyway.\n);
 + if (type == PCI_CAP_ID_MSI) {
 + /*
 +  * MPIC version 2.0 has erratum PIC1. For now MSI
 +  * could not work. So check to prevent MSI from
 +  * being used on the board with this erratum.
 +  */
 + list_for_each_entry(msi_data, msi_head, list)
 + if (msi_data-feature  MSI_HW_ERRATA_ENDIAN)
 + return -EINVAL;
 + }
 
   /*
* If the PCI node has an fsl,msi property, then we need to use it
 @@ -446,6 +464,11 @@ static int fsl_of_msi_probe(struct platform_device
 *dev)
 
   msi-feature = features-fsl_pic_ip;
 
 + /* For erratum PIC1 on MPIC version 2.0*/
 + if ((features-fsl_pic_ip  FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC
 +  (fsl_mpic_primary_get_version() == 0x0200))
 + msi-feature |= MSI_HW_ERRATA_ENDIAN;
 +
   /*
* Remember the phandle, so that we can match with any PCI nodes
* that have an fsl,msi property.
 diff --git a/arch/powerpc/sysdev/fsl_msi.h
 b/arch/powerpc/sysdev/fsl_msi.h
 index 420cfcb..a67359d 100644
 --- a/arch/powerpc/sysdev/fsl_msi.h
 +++ b/arch/powerpc/sysdev/fsl_msi.h
 @@ -27,6 +27,8 @@
  #define FSL_PIC_IP_IPIC   0x0002
  #define FSL_PIC_IP_VMPIC  0x0003
 
 +#define MSI_HW_ERRATA_ENDIAN 0x0010
 +
  struct fsl_msi_cascade_data;
 
  struct fsl_msi {
 --
 2.1.0.27.g96db324

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RE: [PATCH 4/4] powerpc/mpic: remove unused functions

2015-02-25 Thread Hongtao Jia

Hi Scott,

I'm really sorry for leave this patch like a zombie.
Now I have plan to revisit this patch.

From the previous comments the compile error was fixed.
But beyond that I have had no plan to update it.

Could you please comment on why it's still on hold?

Thanks.


 -Original Message-
 From: Wood Scott-B07421
 Sent: Tuesday, February 24, 2015 5:32 AM
 To: Arseny Solokha
 Cc: Michael Ellerman; Benjamin Herrenschmidt; Paul Mackerras; linuxppc-
 d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Jia Hongtao-B38951
 Subject: Re: [PATCH 4/4] powerpc/mpic: remove unused functions
 
 On Thu, 2015-02-19 at 19:26 +0700, Arseny Solokha wrote:
+ fsl_mpic_primary_get_version() is just a safe wrapper around
  fsl_mpic_get_version() for SMP configurations. While the latter is
  called explicitly for handling PIC initialization and setting up error
  interrupt vector depending on PIC hardware version, the former isn't
  used for anything.
 
 It was meant to be used by http://patchwork.ozlabs.org/patch/233211/
 which never got respun.  Hongtao, do you plan to revisit that patch?
 
 -Scott
 

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RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

2014-10-08 Thread Hongtao Jia

 -Original Message-
 From: Wood Scott-B07421
 Sent: Thursday, October 09, 2014 7:48 AM
 To: Jia Hongtao-B38951
 Cc: Guenter Roeck; Benjamin Herrenschmidt; Paul Mackerras; Michael
 Ellerman; linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
 Jojy G Varghese; Guenter Roeck
 Subject: Re: [PATCH] powerpc/fsl: Add support for pci(e) machine check
 exception on E500MC / E5500

 On Tue, 2014-10-07 at 22:08 -0500, Jia Hongtao-B38951 wrote:

   -Original Message-
   From: Wood Scott-B07421
   Sent: Tuesday, September 30, 2014 2:36 AM
   To: Guenter Roeck
   Cc: Benjamin Herrenschmidt; Paul Mackerras; Michael Ellerman;
   linuxppc- d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Jojy G
   Varghese; Guenter Roeck; Jia Hongtao-B38951
   Subject: Re: [PATCH] powerpc/fsl: Add support for pci(e) machine
   check exception on E500MC / E5500

   On Mon, 2014-09-29 at 09:48 -0700, Guenter Roeck wrote:
From: Jojy G Varghese jo...@juniper.net

For E500MC and E5500, a machine check exception in pci(e) memory
space crashes the kernel.

Testing shows that the MCAR(U) register is zero on a MC exception
for the
E5500 core. At the same time, DEAR register has been found to have
the address of the faulty load address during an MC exception for
 this core.

This fix changes the current behavior to fixup the result register
and instruction pointers in the case of a load operation on a
faulty PCI address.

The changes are:
- Added the hook to pci machine check handing to the e500mc
machine
   check
  exception handler.
- For the E5500 core, load faulting address from SPRN_DEAR register.
  As mentioned above, this is necessary because the E5500 core does
 not
  report the fault address in the MCAR register.

Cc: Scott Wood scottw...@freescale.com
Signed-off-by: Jojy G Varghese jo...@juniper.net [Guenter Roeck:
updated description]
Signed-off-by: Guenter Roeck gro...@juniper.net
Signed-off-by: Guenter Roeck li...@roeck-us.net
---
 arch/powerpc/kernel/traps.c   | 3 ++-
 arch/powerpc/sysdev/fsl_pci.c | 5 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/traps.c
b/arch/powerpc/kernel/traps.c index 0dc43f9..ecb709b 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -494,7 +494,8 @@ int machine_check_e500mc(struct pt_regs *regs)
int recoverable = 1;

if (reason  MCSR_LD) {
-   recoverable = fsl_rio_mcheck_exception(regs);
+   recoverable = fsl_rio_mcheck_exception(regs) ||
+   fsl_pci_mcheck_exception(regs);
if (recoverable == 1)
goto silent_out;
}
diff --git a/arch/powerpc/sysdev/fsl_pci.c
b/arch/powerpc/sysdev/fsl_pci.c index c507767..bdb956b 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1021,6 +1021,11 @@ int fsl_pci_mcheck_exception(struct pt_regs
*regs)  #endif
addr += mfspr(SPRN_MCAR);

+#ifdef CONFIG_E5500_CPU
+   if (mfspr(SPRN_EPCR)  SPRN_EPCR_ICM)
+   addr = PFN_PHYS(vmalloc_to_pfn((void
 *)mfspr(SPRN_DEAR)));
   #endif

   Kconfig tells you what hardware is supported, not what hardware
   you're actually running on.

   Jia Hongtao, do you know anything about this issue?  Is there an
 erratum?

  Sorry for the late response, I just return from my vacation.
  I don't know this issue.

   What chips are affected by the the erratum covered by
   http://patchwork.ozlabs.org/patch/240239/?

  MPC8544, MPC8548, MPC8572 are affected by this erratum.

 What is the erratum number?

The number of this erratum for each chip is not consistent.
MPC8544: PCIe 4
MPC8548: PCI-Ex 39
MPC8572: PCI-Ex 3

  I checked P4080 which using e500mc and no such erratum is found.

 What is the erratum behavior, and how does it differ from the problem
 that Jojy and Guenter are trying to solve?

Here is the description of the erratum:

When its link goes down, the PCI Express controller clears all outstanding 
transactions with an
error indicator and sends a link down exception to the interrupt controller if
PEX_PME_MES_DISR[LDDD] = 0. If, however, any transactions are sent to the 
controller
after the link down event, they will be accepted by the controller and wait for 
the link to come
back up before starting any timeout counters (e.g. completion timeout). There 
is no mechanism
to cancel the new transactions short of a device HRESET.

For e500mc as Jojy and Guenter described it's like the same erratum on e500, 
not 100% sure.

For e5500 I don't quite understand yet.

 -Scott

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RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

2014-10-07 Thread Hongtao Jia

 -Original Message-
 From: Wood Scott-B07421
 Sent: Tuesday, September 30, 2014 2:36 AM
 To: Guenter Roeck
 Cc: Benjamin Herrenschmidt; Paul Mackerras; Michael Ellerman; linuxppc-
 d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Jojy G Varghese;
 Guenter Roeck; Jia Hongtao-B38951
 Subject: Re: [PATCH] powerpc/fsl: Add support for pci(e) machine check
 exception on E500MC / E5500

 On Mon, 2014-09-29 at 09:48 -0700, Guenter Roeck wrote:
  From: Jojy G Varghese jo...@juniper.net

  For E500MC and E5500, a machine check exception in pci(e) memory space
  crashes the kernel.

  Testing shows that the MCAR(U) register is zero on a MC exception for
  the
  E5500 core. At the same time, DEAR register has been found to have the
  address of the faulty load address during an MC exception for this core.

  This fix changes the current behavior to fixup the result register and
  instruction pointers in the case of a load operation on a faulty PCI
  address.

  The changes are:
  - Added the hook to pci machine check handing to the e500mc machine
 check
exception handler.
  - For the E5500 core, load faulting address from SPRN_DEAR register.
As mentioned above, this is necessary because the E5500 core does not
report the fault address in the MCAR register.

  Cc: Scott Wood scottw...@freescale.com
  Signed-off-by: Jojy G Varghese jo...@juniper.net [Guenter Roeck:
  updated description]
  Signed-off-by: Guenter Roeck gro...@juniper.net
  Signed-off-by: Guenter Roeck li...@roeck-us.net
  ---
   arch/powerpc/kernel/traps.c   | 3 ++-
   arch/powerpc/sysdev/fsl_pci.c | 5 +
   2 files changed, 7 insertions(+), 1 deletion(-)

  diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
  index 0dc43f9..ecb709b 100644
  --- a/arch/powerpc/kernel/traps.c
  +++ b/arch/powerpc/kernel/traps.c
  @@ -494,7 +494,8 @@ int machine_check_e500mc(struct pt_regs *regs)
  int recoverable = 1;

  if (reason  MCSR_LD) {
  -   recoverable = fsl_rio_mcheck_exception(regs);
  +   recoverable = fsl_rio_mcheck_exception(regs) ||
  +   fsl_pci_mcheck_exception(regs);
  if (recoverable == 1)
  goto silent_out;
  }
  diff --git a/arch/powerpc/sysdev/fsl_pci.c
  b/arch/powerpc/sysdev/fsl_pci.c index c507767..bdb956b 100644
  --- a/arch/powerpc/sysdev/fsl_pci.c
  +++ b/arch/powerpc/sysdev/fsl_pci.c
  @@ -1021,6 +1021,11 @@ int fsl_pci_mcheck_exception(struct pt_regs
  *regs)  #endif
  addr += mfspr(SPRN_MCAR);

  +#ifdef CONFIG_E5500_CPU
  +   if (mfspr(SPRN_EPCR)  SPRN_EPCR_ICM)
  +   addr = PFN_PHYS(vmalloc_to_pfn((void *)mfspr(SPRN_DEAR)));
 #endif

 Kconfig tells you what hardware is supported, not what hardware you're
 actually running on.

 Jia Hongtao, do you know anything about this issue?  Is there an erratum?

Sorry for the late response, I just return from my vacation.
I don't know this issue.

 What chips are affected by the the erratum covered by
 http://patchwork.ozlabs.org/patch/240239/?

MPC8544, MPC8548, MPC8572 are affected by this erratum.
I checked P4080 which using e500mc and no such erratum is found.

 Can we rely on DEAR or is this just a side effect of likely having taken
 a TLB miss for the address recently?  Perhaps we should use the
 instruction emulation to determine the effective address instead.

 Guenter, is this patch intended to deal with an erratum or are you
 covering up legitimate errors?

 -Scott

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RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

2014-10-07 Thread Hongtao Jia

 -Original Message-
 From: Wood Scott-B07421
 Sent: Wednesday, October 01, 2014 8:44 AM
 To: Guenter Roeck
 Cc: Jojy Varghese; Benjamin Herrenschmidt; Paul Mackerras; Michael
 Ellerman; linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org;
 Guenter Roeck; Jia Hongtao-B38951
 Subject: Re: [PATCH] powerpc/fsl: Add support for pci(e) machine check
 exception on E500MC / E5500

 On Tue, 2014-09-30 at 08:50 -0700, Guenter Roeck wrote:
  On Mon, Sep 29, 2014 at 06:31:06PM -0500, Scott Wood wrote:
   On Mon, 2014-09-29 at 23:03 +, Jojy Varghese wrote:

On 9/29/14 12:06 PM, Guenter Roeck li...@roeck-us.net wrote:

Those are errors related to PCIe hotplug, and are seen with
unexpected PCIe device removals (triggered, for example, by
removing power from a PCIe adapter).
The behavior we see on E5500 is quite similar to the same
behavior on
E500:
If unhandled, the CPU keeps executing the same instruction over
and over again if there is an error on a PCIe access and thus
stalls. I don't know if this is considered an erratum or expected
behavior, but it is one we have to address since we have to be
able to handle that condition.

   The reason I ask is that the handling for e500 was described as an
   erratum workaround.  If it is an erratum it would be nice to know
   the erratum number and the full list of affected chips.

  My understanding, which may be wrong, was that this is expected
  behavior, at least for E5500. I actually thought I had seen it
  somewhere in the specification (response to PCIe errors), but I don't
 recall where exactly.

  At least for my part I am not aware of an erratum.

 Jia Hongtao, can you comment here?

I did not find any related erratum either.

Ultimately, we'll want
to
implement PCIe error handlers for the affected drivers, but that
will be a next step.

   For now can we at least print a ratelimited error message?  I don't
   like the idea of silently ignoring these errors.  I suppose it's a
   separate issue from extending the workaround to cover e500mc, though.

  I don't really like the idea of printing an error message pretty much
  each time when an unexpected hotplug event occurs.

 Unexpected events seem like the sort of thing you'd want to log, but my
 concern is that this might not be the only cause of PCI errors.

 -Scott

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RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support

RE: [PATCH V2 7/7] thermal: qoriq: Add thermal management support

Re: [PATCH 7/7] thermal: qoriq: Add thermal management support

答复: [PATCH 1/7] dt-bindings: Update QorIQ TMU thermal bindings

答复: [PATCH 1/2] cpufreq: qoriq: Fix cooling device registration issue during suspend

答复: [PATCH V3] cpufreq: qoriq: Register cooling device based on device tree

RE: [PATCH V2] cpufreq: qoriq: Register cooling device based on device tree

RE: [PATCH V2] cpufreq: qoriq: Register cooling device based on device tree

RE: [PATCH] cpufreq: qoriq: Register cooling device based on device tree

RE: [PATCH V3] thermal: qoriq: Add thermal management support

RE: [PATCH V3] thermal: qoriq: Add thermal management support

RE: [PATCH V3] thermal: qoriq: Add thermal management support

RE: [PATCH] PowerPC: Move Freescale device tree files into fsl folder

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH V2] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH V3] QorIQ/TMU: add TMU node to device tree for QorIQ T1040

RE: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

RE: [PATCH V2] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

RE: [PATCH] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH] QorIQ/TMU: add thermal management support based on TMU

RE: [PATCH] QorIQ/TMU: add TMU node to device tree for QorIQ T104x

RE: [PATCH V3] powerpc/85xx: workaround for chips with MSI hardware errata

RE: [PATCH 4/4] powerpc/mpic: remove unused functions

RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

RE: [PATCH] powerpc/fsl: Add support for pci(e) machine check exception on E500MC / E5500

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