On Mon, May 14, 2012 at 10:53:42AM +1000, Benjamin Herrenschmidt wrote:
On Fri, 2012-05-11 at 14:13 +0530, K.Prasad wrote:
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+ int ret, len = 0;
+ struct thread_struct *thread = (child-thread);
+ struct perf_event *bp;
+ struct perf_event_attr
for inclusion into the relevant PowerPC tree.
Thanks,
K.Prasad
--
PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG are
PowerPC specific ptrace flags that use the watchpoint register. While they are
targeted primarily towards BookE users, user-space applications such as GDB
On Wed, Dec 21, 2011 at 11:55:02AM +1100, David Gibson wrote:
On Thu, Dec 08, 2011 at 04:53:30PM +0530, K.Prasad wrote:
While PPC_PTRACE_SETHWDEBUG ptrace flag in PowerPC accepts
PPC_BREAKPOINT_MODE_EXACT mode of breakpoint, the same is not intimated to
the
user-space debuggers (like GDB
On Wed, Dec 07, 2011 at 05:01:57PM -0200, Thiago Jung Bauermann wrote:
On Thu, 2011-12-01 at 15:50 +0530, K.Prasad wrote:
On Mon, Nov 28, 2011 at 02:11:11PM +1100, David Gibson wrote:
[snip]
On Wed, Oct 12, 2011 at 11:09:48PM +0530, K.Prasad wrote:
diff --git a/Documentation/powerpc
. Request an
delete, followed by set breakpoint request instead.
Thanks,
K.Prasad
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of the variable can be specified).
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
Documentation/powerpc/ptrace.txt | 16
arch/powerpc/kernel/ptrace.c | 77 +++---
2 files changed, 87 insertions(+), 6 deletions(-)
diff --git a/Documentation
member of struct ppc_debug_info to advertise support for the
same on Book3E PowerPC processors.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/ptrace.h |1 +
arch/powerpc/kernel/ptrace.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git
On Mon, Nov 28, 2011 at 02:11:11PM +1100, David Gibson wrote:
[snip]
On Wed, Oct 12, 2011 at 11:09:48PM +0530, K.Prasad wrote:
+ if (bp) {
+ attr = bp-attr;
+ attr.bp_addr = (unsigned long)bp_info-addr
~HW_BREAKPOINT_ALIGN
On Wed, Oct 12, 2011 at 02:33:59PM +1100, David Gibson wrote:
On Fri, Sep 16, 2011 at 12:57:10PM +0530, K.Prasad wrote:
On Fri, Aug 26, 2011 at 03:05:52PM +0530, K.Prasad wrote:
On Wed, Aug 24, 2011 at 01:59:39PM +1000, David Gibson wrote:
On Tue, Aug 23, 2011 at 02:55:13PM +0530
On Fri, Aug 26, 2011 at 03:05:52PM +0530, K.Prasad wrote:
On Wed, Aug 24, 2011 at 01:59:39PM +1000, David Gibson wrote:
On Tue, Aug 23, 2011 at 02:55:13PM +0530, K.Prasad wrote:
On Tue, Aug 23, 2011 at 03:08:50PM +1000, David Gibson wrote:
On Fri, Aug 19, 2011 at 01:21:36PM +0530
On Wed, Aug 24, 2011 at 01:59:39PM +1000, David Gibson wrote:
On Tue, Aug 23, 2011 at 02:55:13PM +0530, K.Prasad wrote:
On Tue, Aug 23, 2011 at 03:08:50PM +1000, David Gibson wrote:
On Fri, Aug 19, 2011 at 01:21:36PM +0530, K.Prasad wrote:
PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG
On Tue, Aug 23, 2011 at 03:08:50PM +1000, David Gibson wrote:
On Fri, Aug 19, 2011 at 01:21:36PM +0530, K.Prasad wrote:
PPC_PTRACE_GETHWDBGINFO, PPC_PTRACE_SETHWDEBUG and PPC_PTRACE_DELHWDEBUG are
PowerPC specific ptrace flags that use the watchpoint register. While they
are
targeted
On Tue, Aug 23, 2011 at 03:09:31PM +1000, David Gibson wrote:
On Fri, Aug 19, 2011 at 01:23:38PM +0530, K.Prasad wrote:
While PPC_PTRACE_SETHWDEBUG ptrace flag in PowerPC accepts
PPC_BREAKPOINT_MODE_EXACT mode of breakpoint, the same is not intimated to
the
user-space debuggers (like
began using the
PPC_PTRACE_GETHWDBGINFO/PPC_PTRACE_SETHWDEBUG/PPC_PTRACE_DELHWDEBUG
flags on BookS processors is presently unable to set watchpoints. The
changes in Patch1, will fix that issue and help it use a common set of code
across BookE and BookS.
K.Prasad (2):
[hw-breakpoint] Use generic hw
...@linux.vnet.ibm.com
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
Documentation/powerpc/ptrace.txt | 16 ++
arch/powerpc/kernel/ptrace.c | 104 +++---
2 files changed, 112 insertions(+), 8 deletions(-)
diff --git a/Documentation/powerpc/ptrace.txt
member of struct ppc_debug_info to advertise support for the
same on Book3E PowerPC processors.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/ptrace.h |1 +
arch/powerpc/kernel/ptrace.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git
always been a goal.
I've looked at the PowerPC parts of the code and they look harmless.
Acked-by: K.Prasad pra...@linux.vnet.ibm.com
Thanks,
K.Prasad
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to me (and is a bit confusing with very similar
names).
Why not make HAVE_HW_BREAKPOINT selectable by the user (which in turn
would turn on PERF_EVENTS) for a given architecture?
Thanks,
K.Prasad
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On Mon, Jul 04, 2011 at 03:29:14PM +0200, Frederic Weisbecker wrote:
On Mon, Jul 04, 2011 at 06:57:46PM +0530, K.Prasad wrote:
On Tue, May 24, 2011 at 11:52:23PM +0200, Frederic Weisbecker wrote:
Migrate conditional hw_breakpoint code compilation under
the new config to prepare
:
+ if (ptrace_get_breakpoints(child) 0)
+ return -ESRCH;
ret = ptrace_set_debugreg(child, addr, data);
+ ptrace_put_breakpoints(child);
break;
#ifdef CONFIG_PPC64
--
1.7.3.2
Hi Frederic,
Looks fine to me.
Acked-by: K.Prasad pra
On Mon, Feb 07, 2011 at 04:13:37PM +1100, Benjamin Herrenschmidt wrote:
On Mon, 2011-02-07 at 10:22 +0530, K.Prasad wrote:
Okay! Another wrapper of #ifndef CONFIG_HAVE_HW_BREAKPOINT around
the
definition of 'set_debug_reg_defaults'.
Can you send a patch ?
Pasted below.
There's
On Mon, Feb 07, 2011 at 09:54:13AM +1100, Benjamin Herrenschmidt wrote:
A typo in the #ifdef statement makes us never call it
in flush_thread()
I wish it never compiled for such typos :-)
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
Acked-by: K.Prasad pra
On Mon, Feb 07, 2011 at 02:10:39PM +1100, Benjamin Herrenschmidt wrote:
On Mon, 2011-02-07 at 08:26 +0530, K.Prasad wrote:
On Mon, Feb 07, 2011 at 09:54:13AM +1100, Benjamin Herrenschmidt wrote:
A typo in the #ifdef statement makes us never call it
in flush_thread()
I wish
On Thu, Dec 16, 2010 at 06:07:47PM +0100, Andreas Schwab wrote:
K.Prasad pra...@linux.vnet.ibm.com writes:
How about the revised patch below? It is only compile-tested; have you
got a quick test case that I can run?
It crashes the kernel when running the watch-vfork test.
Andreas
On Mon, Dec 13, 2010 at 08:05:36PM +0100, Andreas Schwab wrote:
K.Prasad pra...@linux.vnet.ibm.com writes:
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
+ /* Create a new breakpoint request if one doesn't exist already */
+ hw_breakpoint_init(attr);
+ attr.bp_addr = bp_info-addr
On Wed, Dec 01, 2010 at 10:07:58AM +0530, K.Prasad wrote:
On Mon, Nov 29, 2010 at 11:15:51AM +0100, Andreas Schwab wrote:
K.Prasad pra...@linux.vnet.ibm.com writes:
Although ppc_set_hwdebug() can set DABR through set_dabr() in
arch/powerpc/kernel/process.c, it is good to have
On Mon, Nov 29, 2010 at 11:15:51AM +0100, Andreas Schwab wrote:
K.Prasad pra...@linux.vnet.ibm.com writes:
Although ppc_set_hwdebug() can set DABR through set_dabr() in
arch/powerpc/kernel/process.c, it is good to have it converted to use
register_user_hw_breakpoint().
What do you mean
for these new ptrace
flags?
Thanks,
K.Prasad
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,
K.Prasad
+
+ mtmsr(mfmsr() ~MSR_DE);
+ isync();
+ dbcr0 = mfspr(SPRN_DBCR0);
+ dbcr0 = (dbcr0 DBCR0_EDM) | new_thread-dbcr0;
+ mtspr(SPRN_DBCR0, dbcr0);
+ }
+#endif /* CONFIG_PPC64_BOOK3E */
+
#ifdef CONFIG_PPC64
progress.
Kindly let me know your comments.
Thanks,
K.Prasad
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Introduce support for generic hw-breakpoint interfaces for PowerPC
BookIII E processors.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |2
arch/powerpc/include/asm/cputable.h|4
arch/powerpc/include/asm
of extraneous exceptions (through clearing of
extraneous exception flag and preventing the invocation of callback).
Kindly let me know if you have any further comments.
Thanks,
K.Prasad
Changelog - ver XXIII
(Version XXII: 20100528063924.ga8...@in.ibm.com)
- Detection
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
-step only the
per-task breakpoints
- perform arch-specific cleanup before unregistration through
arch_unregister_hw_breakpoint()
]
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch/powerpc/include/asm/cputable.h |4
arch
single-step handler after alignment interrupt pointed out
by Paul Mackerras pau...@samba.org]
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/kernel/traps.c |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
Index: linux-2.6.ppc64_test/arch/powerpc/kernel/traps.c
delivery.
Restore hw-breakpoints if the user-context is altered in the signal handler.
[With inputs from Paul Mackerras pau...@samba.org which helped identify a
need to restore breakpoints before handling a signal delivered in certain
cases]
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
(we don't
want to change ptrace behaviour for fear of breaking compatability).
[Suggestions from Paul Mackerras pau...@samba.org to add a new flag in
'struct arch_hw_breakpoint' to identify extraneous interrupts]
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm
On Thu, Jun 10, 2010 at 10:40:24PM +1000, Paul Mackerras wrote:
On Wed, Jun 09, 2010 at 03:55:59PM +0530, K.Prasad wrote:
+ if (!((bp-attr.bp_addr = dar)
+(dar = (bp-attr.bp_addr + bp-attr.bp_len {
+ /*
+* This exception is triggered not because
On Tue, Jun 15, 2010 at 11:54:59AM +1000, Paul Mackerras wrote:
On Fri, Jun 04, 2010 at 12:21:45PM +0530, K.Prasad wrote:
Meanwhile I tested the per-cpu breakpoints with the new emulate_step
patch (refer linuxppc-dev message-id:
20100602112903.gb30...@brick.ozlabs.ibm.com
of extraneous breakpoint exceptions is now done using a boolean flag
in 'struct arch_hw_breakpoint'.
- A dangling put_cpu() (remnant from previous patch versions) in
arch_unregister_hw_breakpoint() is now removed.
Kindly let me know your comments.
Thanks,
K.Prasad
Changelog - ver XXII
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
delivery.
Restore hw-breakpoints if the user-context is altered in the signal handler.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hw_breakpoint.h |3 +++
arch/powerpc/kernel/hw_breakpoint.c | 18 ++
arch/powerpc/kernel/signal.c
(we don't
want to change ptrace behaviour for fear of breaking compatability).
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
Signed-off-by: Paul Mackerras pau...@samba.org
---
arch/powerpc/include/asm/hw_breakpoint.h |1 +
arch/powerpc/kernel/hw_breakpoint.c | 19
On Mon, Jun 07, 2010 at 09:25:59PM +1000, Paul Mackerras wrote:
On Mon, Jun 07, 2010 at 12:33:51PM +0530, K.Prasad wrote:
Given that 'ptrace_bps' is used only for ptrace originated breakpoints
and that we return early i.e. before detecting extraneous interrupts
in hw_breakpoint_handler
On Fri, Jun 04, 2010 at 07:06:48PM +1000, Paul Mackerras wrote:
On Fri, Jun 04, 2010 at 12:21:45PM +0530, K.Prasad wrote:
Meanwhile I tested the per-cpu breakpoints with the new emulate_step
patch (refer linuxppc-dev message-id:
20100602112903.gb30...@brick.ozlabs.ibm.com
On Wed, Jun 02, 2010 at 09:33:16PM +1000, Paul Mackerras wrote:
On Fri, May 28, 2010 at 12:09:24PM +0530, K.Prasad wrote:
Please find a new set of patches that have the following changes.
Thanks. There are a couple of minor things still remaining (dangling
put_cpu
,
K.Prasad
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Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
[]' and
'last_hit_ubp' members are now promptly cleaned-up.
- Single-step exception is now conditionally emulated upon hitting
alignment_exception.
- Rebased to commit 31f46717997a83bdf6db0dd04810c0a329eb3148 of linux-2.6 tree.
Kindly let me know your comments for the same.
Thanks,
K.Prasad
Changelog
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
delivery.
Restore hw-breakpoints if the user-context is altered in the signal handler.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hw_breakpoint.h |3 +++
arch/powerpc/kernel/hw_breakpoint.c | 18 ++
arch/powerpc/kernel/signal.c
(we don't
want to change ptrace behaviour for fear of breaking compatability).
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/kernel/hw_breakpoint.c | 39
1 file changed, 35 insertions(+), 4 deletions(-)
Index: linux-2.6.ppc64_test/arch
On Thu, May 27, 2010 at 04:19:40PM +1000, Paul Mackerras wrote:
On Tue, May 25, 2010 at 02:44:20PM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them
On Tue, May 25, 2010 at 06:39:19AM -0500, Millton Miller wrote:
On Tue, 25 May 2010 at 14:43:56 +0530, K.Prasad wrote:
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook
On Wed, May 26, 2010 at 10:54:41AM +0100, David Howells wrote:
K.Prasad pra...@linux.vnet.ibm.com wrote:
My understanding is weak function definitions must appear in a different C
file than their call sites to work on some toolchains.
Atleast, there are quite a few precedents
On Wed, May 26, 2010 at 10:47:42PM +0530, K.Prasad wrote:
On Wed, May 26, 2010 at 10:54:41AM +0100, David Howells wrote:
K.Prasad pra...@linux.vnet.ibm.com wrote:
My understanding is weak function definitions must appear in a
different C
file than their call sites to work
On Wed, May 26, 2010 at 07:23:15PM +0200, Frederic Weisbecker wrote:
On Wed, May 26, 2010 at 10:47:42PM +0530, K.Prasad wrote:
On Wed, May 26, 2010 at 10:54:41AM +0100, David Howells wrote:
K.Prasad pra...@linux.vnet.ibm.com wrote:
My understanding is weak function definitions must
have to be cleared during sigreturn. A 'double-hit' on
hw_breakpoint_handler() is harmless for non-ptrace instructions.
- Minor changes to enhance code brevity.
Kindly let me know your comments.
Thanks,
K.Prasad
Changelog - ver XX
(Version XIX: linuxppc-dev ref
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
delivery.
Restore hw-breakpoints if the user-context is altered in the signal handler.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hw_breakpoint.h |2 ++
arch/powerpc/kernel/hw_breakpoint.c | 16
arch/powerpc/kernel/signal.c
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
in the signal handler
(causing loss of MSR_SE). Side-effect: 'Double-hit' of breakpoint if the
instruction pointer is unaltered in the new context.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hw_breakpoint.h |3 +++
arch/powerpc/kernel/hw_breakpoint.c | 28
will only be emulated. Breakpoint will be
unregistered with a warning if emulation fails.
Thanks,
K.Prasad
Changelog - ver XIX
(Version XVIII: linuxppc-dev ref: 20100512033055.ga6...@in.ibm.com)
- Increased coverage of breakpoints during concurrent alignment_exception
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
On Thu, May 20, 2010 at 11:10:03PM +1000, Paul Mackerras wrote:
On Thu, May 20, 2010 at 09:36:03AM +0530, K.Prasad wrote:
(Had this mail composed along with the patchset...but mail server issues
caused delay in sending this...)
Hi Paul,
While we continue to discuss some of the design
f4b87dee923342505e1ddba8d34ce9de33e75050, thereby
necessitating minor changes to arch_validate_hwbkpt_settings().
Thanks,
K.Prasad
Changelog - ver XVIII
(Version XVII: linuxppc-dev ref: 20100414034340.ga6...@in.ibm.com)
- hw-breakpoint restoration variables are cleaned-up before
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
An alignment interrupt may intervene between a DSI/hw-breakpoint exception
and the single-step exception. Enable the alignment interrupt (through
modifications to emulate_single_step()) to notify the single-step exception
handler for proper restoration of hw-breakpoints.
Signed-off-by: K.Prasad
in the signal handler
(causing loss of MSR_SE).
Side-effect: 'Double-hit' of breakpoint if the instruction pointer is
unaltered in the new context.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/hw_breakpoint.h |3 +++
arch/powerpc/kernel/hw_breakpoint.c | 28
seamless handling of kernel-space breakpoints within the context
of a user-space process and breakpoints for kernel-threads.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/kernel/hw_breakpoint.c | 24 +---
include/linux/perf_event.h |1 +
kernel
On Mon, May 24, 2010 at 09:32:25AM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
snipped
+/*
+ * Handle debug exception
On Mon, May 17, 2010 at 10:32:41PM +1000, Paul Mackerras wrote:
On Fri, May 14, 2010 at 12:25:31PM +0530, K.Prasad wrote:
Okay. I will re-use single_step_exception() after modifications; it
appearsto have no in-kernel users for it.
It's called from exceptions-64s.S, head_32.S
On Wed, May 12, 2010 at 04:32:47PM +1000, Paul Mackerras wrote:
On Wed, May 05, 2010 at 02:03:03AM +0530, K.Prasad wrote:
It is true that the breakpoint exceptions will go amiss following the
alignment exception, and be restored when the thread single-steps due
to other requests causing
handlers;
causes single_step_dabr_instruction() to be invoked after alignment_exception.
- SIGTRAP is no longer generated for non-ptrace user-space breakpoints.
- Slight code restructuring for brevity and style corrections.
Kindly accept them to be a part of -next tree.
Thanks,
K.Prasad
Changelog
Data address breakpoint exceptions are currently handled along with page-faults
which require interrupts to remain in enabled state. Since exception handling
for data breakpoints aren't pre-empt safe, we handle them separately.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
Acked-by: Paul
Certain architectures (such as PowerPC Book III S) have a need to cleanup
data-structures before the breakpoint is unregistered. This patch introduces
an arch-specific hook in release_bp_slot() along with a weak definition in
the form of a stub funciton.
Signed-off-by: K.Prasad pra
Implement perf-events based hw-breakpoint interfaces for PowerPC Book III S
processors. These interfaces help arbitrate requests from various users and
schedules them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch
On Wed, May 05, 2010 at 02:03:03AM +0530, K.Prasad wrote:
On Mon, May 03, 2010 at 04:23:30PM +1000, Paul Mackerras wrote:
On Wed, Apr 14, 2010 at 09:18:27AM +0530, K.Prasad wrote:
[snipped]
It has been pointed out to me before (Roland's mail Ref:linuxppc-dev
message-id
On Mon, May 03, 2010 at 04:23:30PM +1000, Paul Mackerras wrote:
On Wed, Apr 14, 2010 at 09:18:27AM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them
code intergration
(hw_breakpoint.c and hw_breakpoint_booke.c)
- Code clean-up and reduction.
Kindly let me know about comments/suggestions, if any.
Thank You,
K.Prasad
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Implement hardware breakpoint interfaces for PowerPC BookE processors
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |2
arch/powerpc/include/asm/cputable.h|4
arch/powerpc/include/asm/hw_breakpoint_booke.h | 42
.
Thanks,
K.Prasad
Changelog - ver XVI
(Version XV: linuxppc-dev ref: 20100323140639.ga21...@in.ibm.com)
- Used a new config option CONFIG_PPC_BOOK3S_64 (in lieu of
CONFIG_PPC64/CPU_FTR_HAS_DABR) to limit the scope of the new code.
- Disabled breakpoints before kexec
Data address breakpoint exceptions are currently handled along with page-faults
which require interrupts to remain in enabled state. Since exception handling
for data breakpoints aren't pre-empt safe, we handle them separately.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch/powerpc/include
for a seperate CONFIG_HW_BREAKPOINTS though.
Let me know what you think.
Thanks,
K.Prasad
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exceptions
in DSISR finally (after check for other causes) + changes in code comments
and
representation of DSISR_DABRMATCH constant.
- Rebased to commit ae6be51ed01d6c4aaf249a207b4434bc7785853b of linux-2.6.
Let me know if you have any comments.
Thanks,
K.Prasad
Changelog - ver XV
Data address breakpoint exceptions are currently handled along with page-faults
which require interrupts to remain in enabled state. Since exception handling
for data breakpoints aren't pre-empt safe, we handle them separately.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
arch/powerpc/include
On Mon, Mar 29, 2010 at 02:53:36PM -0500, Dave Kleikamp wrote:
On Mon, 2010-03-29 at 17:01 +0530, K.Prasad wrote:
On Fri, Mar 26, 2010 at 04:11:45PM -0500, Dave Kleikamp wrote:
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02
On Tue, Mar 30, 2010 at 04:24:42PM +1100, Paul Mackerras wrote:
On Tue, Mar 23, 2010 at 07:37:02PM +0530, K.Prasad wrote:
Index: linux-2.6.ppc64_test/arch/powerpc/kernel/exceptions-64s.S
===
--- linux-2.6.ppc64_test.orig/arch
On Tue, Mar 30, 2010 at 04:32:25PM +1100, Benjamin Herrenschmidt wrote:
On Tue, 2010-03-30 at 16:24 +1100, Paul Mackerras wrote:
On Tue, Mar 23, 2010 at 07:37:02PM +0530, K.Prasad wrote:
Index: linux-2.6.ppc64_test/arch/powerpc/kernel/exceptions-64s.S
On Fri, Mar 26, 2010 at 04:11:45PM -0500, Dave Kleikamp wrote:
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02)
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various
On Tue, Mar 23, 2010 at 04:33:01PM +1100, Paul Mackerras wrote:
On Mon, Mar 08, 2010 at 11:44:48PM +0530, K.Prasad wrote:
@@ -479,6 +483,7 @@ struct task_struct *__switch_to(struct t
old_thread-accum_tb += (current_tb - start_tb);
new_thread-start_tb = current_tb
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