Hi All,
On Fri, Aug 30, 2013 at 11:36 PM, David Hawkins d...@ovro.caltech.eduwrote:
Hi S.Saravanan,
I successfully mapped the Programmable Interrupt Controller registers
in the EP to the PCI space. Thus now I can write the shared message
interrupt registers in the EP from the RC over
Hi All ,
On Mon, Aug 26, 2013 at 4:08 AM, David Hawkins d...@ovro.caltech.edu wrote:
Hi S.Saravanan,
Root complex's would normally interrupt a device via a PCIe write
to a register in a BAR on the end-point (or in extended configuration
space registers depending on the hardware
Hi All,
First of all thank you all for taking your time out to reply
On Fri, Aug 23, 2013 at 3:59 AM, Ira W. Snyder i...@ovro.caltech.edu wrote:
On Thu, Aug 22, 2013 at 02:43:38PM -0700, David Hawkins wrote:
Hi S.Saravanan,
I have a custom board with four MPC8640 nodes
Hi All,
I have a custom board with four MPC8640 nodes connected over a
transparent PCI express switch . In this configuration one node is
configured as host(Root Complex) and others as agents(End Point) .Thus the
legacy PCI software works fine . However the mainline kernel lacks any
.**
**
** **
Alex.
** **
*From:* Linuxppc-dev [mailto:linuxppc-dev-bounces+alexandre.bounine=
idt@lists.ozlabs.org] *On Behalf Of *Saravanan S
*Sent:* Friday, July 13, 2012 2:16 AM
*To:* linuxppc-dev@lists.ozlabs.org
*Subject:* Standalone SRIO Driver for Linux
** **
Hi
Hi ,
Iam currently working on the GE make DSP230 board consisting of Quad
PowerPC8640 nodes interconnected by SRIO with Linux 2.6.34 . However the
only way to access the SRIO is through rionet facility . Our requirement is
to use the SRIO interconnect without the Ethernet overheads. This
