Shift should be TX_SYNC_SHIFT_BASE if mode != COMM_DIR_RX
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/ucc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/soc/fsl/qe/ucc.c b/drivers/soc/fsl/qe/ucc.c
index c646d87..681f7d4
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
arch/powerpc/pla
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/irqchip/irq-qeic.
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/p
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
drivers/{soc/
when apply the second patch, in fact, there was
no compile issue
when apply all the patches of this patchset
Changes for v10:
- simplify codes, remove duplicated codes
Zhao Qiang (4):
irqchip/qeic: move qeic driver from drivers/soc/fsl/qe
Changes for v2
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
arch/powerpc/pla
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/irqchip/irq-qeic.
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/p
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
drivers/{soc/
when apply the second patch, in fact, there was
no compile issue
when apply all the patches of this patchset
Zhao Qiang (4):
irqchip/qeic: move qeic driver from drivers/soc/fsl/qe
Changes for v2:
- modify the subject and commit msg
Changes for v3
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- include all Errata QE_General4 in #ifdef
drivers/soc/fsl/qe/qe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 2ef6fc6..4ac9ce8 100644
--- a/drive
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/qe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 2ef6fc6..d48fa4a 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -229,7 +229,9
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v6:
- new added
Changes for v7:
- fix warning
drivers/irqchip/irq-qeic.
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
C
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v6:
- new added
drivers/irqchip/irq-qeic.c | 28 +---
include/soc/fsl/qe/qe_ic.
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
C
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
modify get_qe_base function with of_address_to_resource
instead of of_get_property and of_translate_address.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- na
Changes for v4:
- na
Changes for v5:
- na
Changes
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
C
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
C
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
d
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to ope
modify get_qe_base function with of_address_to_resource
instead of of_get_property and of_translate_address.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- na
Changes for v3:
- na
Changes for v4:
- na
Changes for v5:
- na
drivers/soc/
The driver stays the same.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify the subject and commit msg
drivers/irqchip/Makefile| 1 +
drivers/{soc/fsl/qe => irqchip}/qe_ic.c | 0
drivers/{soc/fsl/qe => irqchip}/qe_ic.h | 0
driver
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject and comm
cade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/p
cade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
there are init_qe_ic_sysfs and qeic_of_init, refactor
them.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/irqchip/qe_ic.c| 83 +-
include/soc/fsl/qe/qe_ic.h | 7
2 files changed, 45 insertions(+), 45 deletions(-)
diff
The codes of qe_ic_init in platforms are redundant,
move them to qe_ic under irqchip
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/platforms/83xx/misc.c| 15 ---
arch/powerpc/platforms/85xx/corenet_generic.c | 9 -
arch/powerpc/platform
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject
Changes for v3:
- na
include/soc/fsl/qe/ucc_fast.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- remove useless code.
- remove Unnecessary casts
- return IRQ_NONE when there are no interrupt
- remove U
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- delete dead code
- use
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- break codes getting clock_bits and source to smaller functions.
- add __iomem to qe_mux_reg
- add bits operation fun
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- use strcmp instead of strcasecmp
Changes for v3:
- na
drivers/soc/fsl/qe/qe.c | 6 ++
include/soc/fsl/qe/qe.h
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- remove useless code.
- remove Unnecessary casts
- return IRQ_NONE when there are no interrupt
- remove U
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- modify subject
include/soc/fsl/qe/ucc_fast.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b2633b7..e898895 100644
--- a/i
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- delete dead code
- use
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- break codes getting clock_bits and source to smaller functions.
- add __iomem to qe_mux_reg
- add bits operation fun
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2:
- use strcmp instead of strcasecmp
drivers/soc/fsl/qe/qe.c | 6 ++
include/soc/fsl/qe/qe.h | 2 ++
include/soc/
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t104xqds.dts
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
hanges for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to propert
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
changes for v2
- Add interrupt-controller in Required properties
- delete a
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA
Changes for v4
- drop device_type
-
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t104xrdb.dts
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring<r...@kernel.org>
---
Changes for v3
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
MAINTAINERS|6 +
drivers/net/wan/Kconfig| 12 +
drivers/net/wan/Makefile |1 +
drivers/net/wan/fsl_ucc_
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/Kconfig| 4 +
drivers/soc/
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
include/soc/fsl/qe/ucc_fast.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b2633b7..e898895 100644
--- a/include/soc/fsl/qe/ucc_fast.h
+++ b/inclu
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/ucc.c | 450 ++
drivers/soc/fsl/qe/ucc_fast.c | 36
include/soc/fsl/qe/qe.h
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/qe.c | 6 ++
include/soc/fsl/qe/qe.h | 2 ++
include/soc/fsl/qe/ucc_fast.h | 2 ++
3 files changed, 10 insertions(+)
diff
qe_ic was put in drivers/soc/fsl/qe, but it should be in
drivers/irqchip.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/irqchip/Makefile| 1 +
drivers/{soc/fsl/qe => irqchip}/qe_ic.c | 0
drivers/{soc/fsl/qe => irqchip}/qe_ic.h | 0
drivers/soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
b/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
index 830ea48..be7bab6 100644
--- a/arch/powerpc/boot/d
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
changes for v2
- Add interrupt-controller in Required properties
- delete a
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38 +
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring<r...@kernel.org>
---
Changes for v3
New bindings use "fsl,t1040-ucc-uart" as the compatible for qe-uart.
So add it.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/tty/serial/ucc_uart.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
arch/powerpc/boot/dts/fsl/t1040si-post.dts
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to propert
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 +
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA
Changes for v4
- drop device_type
-
Drop device type and modify compatible to SoC specific compatible.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/tty/serial/ucc_uart.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index 1
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38 +
1 file changed, 38 insertions(+)
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 +
1 file changed, 38 insertions(+)
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
arch/p
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring<r...@kernel.org>
---
Changes for v3
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA
Changes for v4
- drop device_type
-
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to propert
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
Acked-by: Rob Herring <r...@kernel.org>
---
changes for v2
- Add interrupt-controller in Required properties
- delete a
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v3
- NA
Documentation/devicetree/bindings/{powerpc
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/powerpc/bo
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
arch/powerpc/boot/dts/fsl/t104xd4rd
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
Changes for v3
- rebase
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 39 +
1 file changed, 39 insertions(+)
diff --git a/arch/powerpc/bo
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v2
- NA
.../bindings/powerpc/fsl/cpm_qe/uqe_seri
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslo
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xqds.dtsi
b/arch/p
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +
arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi | 40 ++
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
.../bindings/powerpc/fsl/cpm_qe/netwo
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- rebase
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 40 +
1 file changed, 40 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/t104xrdb.dtsi
b/arch/p
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- new added
Documentation/devicetree/bindings/{p
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
Changes for v2
- modify tx/rx-clock-name specification
.../bindings/powerpc/fsl/cpm_qe/uqe_serial.txt| 19 +++
127 is the theoretical up boundary of QEIC number,
in fact there only be 44 qe_ic_info now.
add check to overflow for qe_ic_info
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
drivers/soc/fsl/qe/qe_ic.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/d
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
---
.../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 ++
1 file changed, 53 insertions(+)
diff --git a/Documen
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