Re: [PATCH v6 32/48] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0

2021-04-09 Thread Nicholas Piggin
Excerpts from Alexey Kardashevskiy's message of April 9, 2021 6:55 pm: > > > On 05/04/2021 11:19, Nicholas Piggin wrote: >> SRR0/1, DAR, DSISR must all be protected from machine check which can >> clobber them. Ensure MSR[RI] is clear while they are live. >> >> Signed-off-by: Nicholas Piggin

Re: [PATCH v6 32/48] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0

2021-04-09 Thread Alexey Kardashevskiy
On 05/04/2021 11:19, Nicholas Piggin wrote: SRR0/1, DAR, DSISR must all be protected from machine check which can clobber them. Ensure MSR[RI] is clear while they are live. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 11 +++--

[PATCH v6 32/48] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0

2021-04-04 Thread Nicholas Piggin
SRR0/1, DAR, DSISR must all be protected from machine check which can clobber them. Ensure MSR[RI] is clear while they are live. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 11 +++-- arch/powerpc/kvm/book3s_hv_interrupt.c | 33 +++---