Hello Johannes,
On 03/19/2014 04:54 PM, Johannes Thumshirn wrote:
On Wed, Mar 19, 2014 at 01:46:37PM +0100, Valentin Longchamp wrote:
Hello,
We have a board that is based on Freescale's P2041 SoC. The boards has 2 PCIe
buses with this topology:
PCIe 0 --- PEX8505 switch --- 4 network
On Wed, Mar 19, 2014 at 01:46:37PM +0100, Valentin Longchamp wrote:
Hello,
We have a board that is based on Freescale's P2041 SoC. The boards has 2 PCIe
buses with this topology:
PCIe 0 --- PEX8505 switch --- 4 network devices
PCIE 2 --- FPGA
On 3.10.33 + a subset of the Freescale SDK 1.4
Hello,
-Original Message-
From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
ow...@vger.kernel.org] On Behalf Of Valentin Longchamp
Sent: Wednesday, March 19, 2014 5:47 AM
To: linuxppc-dev@lists.ozlabs.org; linux-...@vger.kernel.org
Subject: EDAC PCIe errors when scannning
