If firmware does not setup the "GPS Port Configuration Register"
and the "CDM 48MHz Fractional Divider Configuration Register",
it can be corrected through DTS.
Signed-off-by: Heiko Schocher <h...@denx.de>
cc: devictree-disc...@lists.ozlabs.org
cc: linuxppc-dev@lists.ozlabs.org
cc: Grant Likely <glik...@secretlab.ca>
cc: Wolfgang Denk <w...@denx.de>
---
.../devicetree/bindings/powerpc/fsl/mpc5200.txt | 16 +++++++++++
arch/powerpc/platforms/52xx/mpc52xx_common.c | 27 ++++++++++++++++++++
2 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
index 4ccb2cd..0c1c6c8 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt
@@ -155,6 +155,9 @@ Each GPIO controller node should have the empty property
gpio-controller and
according to the bit numbers in the GPIO control registers. The second cell
is for flags which is currently unused.
+If firmware does not setup port_config correct, it can be modified
+through the "fsl,init-port-config" property in the "fsl,mpc5200-gpio" node.
+
fsl,mpc5200-fec nodes
---------------------
The FEC node can specify one of the following properties to configure
@@ -196,3 +199,16 @@ External interrupts:
fsl,mpc5200-mscan nodes
-----------------------
See file can.txt in this directory.
+
+fsl,mpc5200-cdm nodes
+---------------------
+- setup "CDM 48MHz Fractional Divider Configuration Register"
+ If firmware does not setup this register correct, you can
+ modify it with the following properties:
+
+ - fsl,init-ext-48mhz-en
+ see MPC5200BUM Table 5-11 Bits 0-7
+ - fsl,init-fd-enable
+ see MPC5200BUM Table 5-11 Bits 8-15
+ - fsl,init-fd-counters
+ see MPC5200BUM Table 5-11 Bits 16-31
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c
b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 41f3a7e..41099f3 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -136,6 +136,8 @@ void __init
mpc52xx_map_common_devices(void)
{
struct device_node *np;
+ const u32 *prop;
+ int plen;
/* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
* possibly from a interrupt context. wdt is only implement
@@ -153,11 +155,36 @@ mpc52xx_map_common_devices(void)
/* Clock Distribution Module, used by PSC clock setting function */
np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
mpc52xx_cdm = of_iomap(np, 0);
+ prop = of_get_property(np, "fsl,init-ext-48mhz-en", &plen);
+ if (prop) {
+ pr_debug("ext-48mhz-en: old:%x new:%x\n",
+ in_8(&mpc52xx_cdm->ext_48mhz_en), *prop);
+ out_8(&mpc52xx_cdm->ext_48mhz_en, *prop);
+ }
+ prop = of_get_property(np, "fsl,init-fd-enable", &plen);
+ if (prop) {
+ pr_debug("fd-enable: old:%x new:%x\n",
+ in_8(&mpc52xx_cdm->fd_enable), *prop);
+ out_8(&mpc52xx_cdm->fd_enable, *prop);
+ }
+ prop = of_get_property(np, "fsl,init-fd-counters", &plen);
+ if (prop) {
+ pr_debug("fd-counters: old:%x new:%x\n",
+ in_be16(&mpc52xx_cdm->fd_counters), *prop);
+ out_be16(&mpc52xx_cdm->fd_counters, *prop);
+ }
of_node_put(np);
/* simple_gpio registers */
np = of_find_matching_node(NULL, mpc52xx_gpio_simple);
simple_gpio = of_iomap(np, 0);
+ /* fixup the port_config register */
+ prop = of_get_property(np, "fsl,init-port-config", &plen);
+ if (prop) {
+ pr_info("port-config: old:%x new:%x\n",
+ in_be32(&simple_gpio->port_config), *prop);
+ out_be32(&simple_gpio->port_config, *prop);
+ }
of_node_put(np);
/* wkup_gpio registers */
--
1.7.4.4
_______________________________________________
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
