[PATCH][v2] powerpc/pci: Fix IMMRBAR address

[Minghuan Lian]

For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
So when getting base address, these bits should be masked,
otherwise we may get incorrect base address.

Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
Change log:
v2:
Use PCI_BASE_ADDRESS_MEM_MASK instead of 0xfff0

 arch/powerpc/sysdev/fsl_pci.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4dfd61d..252716d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -868,6 +868,14 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
 
pci_bus_read_config_dword(hose-bus,
PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, base);
+
+   /*
+* For PEXCSRBAR, bit 3-0 indicate prefetchable and
+* address type. So when getting base address, these
+* bits should be masked
+*/
+   base = PCI_BASE_ADDRESS_MEM_MASK;
+
return base;
}
 #endif
-- 
1.8.1.2


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RE: [PATCH][v2] powerpc/pci: Fix IMMRBAR address

[Roy Zang]

 -Original Message-
 From: Minghuan Lian [mailto:minghuan.l...@freescale.com]
 Sent: Monday, January 20, 2014 4:54 AM
 To: linuxppc-dev@lists.ozlabs.org
 Cc: Zang Roy-R61911; Wood Scott-B07421; Kumar Gala; Lian Minghuan-B31939
 Subject: [PATCH][v2] powerpc/pci: Fix IMMRBAR address
 
 For PEXCSRBAR, bit 3-0 indicate prefetchable and address type.
 So when getting base address, these bits should be masked,
 otherwise we may get incorrect base address.
 
 Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
Acked.
Roy
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