Re: [PATCH] powerpc: Update 8641hpcn dts file to match latest u-boot
On Dec 20, 2008, at 9:27 PM, Timur Tabi wrote: On Fri, Dec 19, 2008 at 4:05 PM, Becky Bruce bec...@kernel.crashing.org wrote: --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -26,7 +26,7 @@ serial1 = serial1; pci0 = pci0; pci1 = pci1; - rapidio0 = rapidio0; + /* rapidio0 = rapidio0; */ If you're going to leave commented-out code in the DTS, please add a comment here to explain why the code is commented-out and not just deleted. There is a comment its just further down w/the actual rapidio node. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Update 8641hpcn dts file to match latest u-boot
On Dec 19, 2008, at 4:05 PM, Becky Bruce wrote: The newest revision of uboot reworks the memory map for this board to look more like the 85xx boards. Also, some regions which were far larger than the actual hardware have been scaled back to match the board, and the imaginary second flash bank has been removed. Rapidio and PCI are mutually exclusive in the hardware, and they now are occupying the same space in the address map. The Rapidio node is commented out of the .dts since PCI is the common use case. Signed-off-by: Becky Bruce bec...@kernel.crashing.org --- arch/powerpc/boot/dts/mpc8641_hpcn.dts | 56 + +- 1 files changed, 32 insertions(+), 24 deletions(-) applied to next. I moved the comment up to the alias so its early in the file. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Update 8641hpcn dts file to match latest u-boot
Becky Bruce wrote: The newest revision of uboot reworks the memory map for this board to look more like the 85xx boards. Also, some regions which were far larger than the actual hardware have been scaled back to match the board, and the imaginary second flash bank has been removed. Rapidio and PCI are mutually exclusive in the hardware, and they now are occupying the same space in the address map. The Rapidio node is commented out of the .dts since PCI is the common use case. Hi Becky, What would be the newest revision of U-Boot that implements this memory map? We're entering into moving-target territory again here where we have no real idea which kernels are required or work or are even supported on which versions of the firmware.. and of course this device tree committed to mainline means that the next set of kernel.org won't have the right data to boot what could be a perfectly workable kernel on previous U-Boot versions. Isn't there any documentation on this apart from git changesets hidden behind obscure many-digit hashes? -- Matt Sealey m...@genesi-usa.com ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc: Update 8641hpcn dts file to match latest u-boot
The newest revision of uboot reworks the memory map for this
board to look more like the 85xx boards. Also, some regions
which were far larger than the actual hardware have been scaled
back to match the board, and the imaginary second flash bank has
been removed. Rapidio and PCI are mutually exclusive in the hardware,
and they now are occupying the same space in the address map.
The Rapidio node is commented out of the .dts since PCI is the
common use case.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 56 ++-
1 files changed, 32 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index d665e76..e79af90 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -26,7 +26,7 @@
serial1 = serial1;
pci0 = pci0;
pci1 = pci1;
- rapidio0 = rapidio0;
+ /* rapidio0 = rapidio0; */
};
cpus {
@@ -62,18 +62,17 @@
reg = 0x 0x4000; // 1G at 0x0
};
- local...@f8005000 {
+ local...@ffe05000 {
#address-cells = 2;
#size-cells = 1;
compatible = fsl,mpc8641-localbus, simple-bus;
- reg = 0xf8005000 0x1000;
+ reg = 0xffe05000 0x1000;
interrupts = 19 2;
interrupt-parent = mpic;
- ranges = 0 0 0xff80 0x0080
- 1 0 0xfe00 0x0100
- 2 0 0xf820 0x0010
- 3 0 0xf810 0x0010;
+ ranges = 0 0 0xef80 0x0080
+ 2 0 0xffdf8000 0x8000
+ 3 0 0xffdf 0x8000;
fl...@0,0 {
compatible = cfi-flash;
@@ -103,13 +102,13 @@
};
};
- soc8...@f800 {
+ soc8...@ffe0 {
#address-cells = 1;
#size-cells = 1;
device_type = soc;
compatible = simple-bus;
- ranges = 0x 0xf800 0x0010;
- reg = 0xf800 0x1000; // CCSRBAR
+ ranges = 0x 0xffe0 0x0010;
+ reg = 0xffe0 0x1000; // CCSRBAR
bus-frequency = 0;
i...@3000 {
@@ -295,17 +294,17 @@
};
};
- pci0: p...@f8008000 {
+ pci0: p...@ffe08000 {
cell-index = 0;
compatible = fsl,mpc8641-pcie;
device_type = pci;
#interrupt-cells = 1;
#size-cells = 2;
#address-cells = 3;
- reg = 0xf8008000 0x1000;
+ reg = 0xffe08000 0x1000;
bus-range = 0x0 0xff;
ranges = 0x0200 0x0 0x8000 0x8000 0x0 0x2000
- 0x0100 0x0 0x 0xe200 0x0 0x0010;
+ 0x0100 0x0 0x 0xffc0 0x0 0x0001;
clock-frequency = ;
interrupt-parent = mpic;
interrupts = 24 2;
@@ -436,7 +435,7 @@
0x0100 0x0 0x
0x0100 0x0 0x
- 0x0 0x0010;
+ 0x0 0x0001;
uli1...@0 {
reg = 0 0 0 0 0;
#size-cells = 2;
@@ -446,7 +445,7 @@
0x0 0x2000
0x0100 0x0 0x
0x0100 0x0 0x
- 0x0 0x0010;
+ 0x0 0x0001;
i...@1e {
device_type = isa;
#interrupt-cells = 2;
@@ -504,17 +503,17 @@
};
- pci1: p...@f8009000 {
+ pci1: p...@ffe09000 {
cell-index = 1;
compatible = fsl,mpc8641-pcie;
device_type = pci;
#interrupt-cells = 1;
#size-cells = 2;
#address-cells = 3;
- reg = 0xf8009000 0x1000;
+ reg = 0xffe09000 0x1000;
bus-range = 0 0xff;
ranges = 0x0200 0x0 0xa000 0xa000 0x0 0x2000
- 0x0100 0x0 0x 0xe300 0x0 0x0010;
+ 0x0100 0x0 0x 0xffc1 0x0 0x0001;
clock-frequency = ;
interrupt-parent = mpic;
interrupts = 25 2;
@@ -537,18
