Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores
On Sat, Jan 11, 2020 at 2:13 AM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> > This adds emulation support for the following prefixed integer
> > load/stores:
> > * Prefixed Load Byte and Zero (plbz)
> > * Prefixed Load Halfword and Zero (plhz)
> > * Prefixed Load Halfword Algebraic (plha)
> > * Prefixed Load Word and Zero (plwz)
> > * Prefixed Load Word Algebraic (plwa)
> > * Prefixed Load Doubleword (pld)
> > * Prefixed Store Byte (pstb)
> > * Prefixed Store Halfword (psth)
> > * Prefixed Store Word (pstw)
> > * Prefixed Store Doubleword (pstd)
> > * Prefixed Load Quadword (plq)
> > * Prefixed Store Quadword (pstq)
> >
> > Signed-off-by: Jordan Niethe
> > ---
> > arch/powerpc/lib/sstep.c | 110 +++
> > 1 file changed, 110 insertions(+)
> >
> > diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> > index ade3f5eba2e5..4f5ad1f602d8 100644
> > --- a/arch/powerpc/lib/sstep.c
> > +++ b/arch/powerpc/lib/sstep.c
> > @@ -187,6 +187,43 @@ static nokprobe_inline unsigned long xform_ea(unsigned
> > int instr,
> > return ea;
> > }
> >
> > +/*
> > + * Calculate effective address for a MLS:D-form / 8LS:D-form prefixed
> > instruction
> > + */
> > +static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
> > + unsigned int sufx,
> > + const struct pt_regs *regs)
> > +{
> > + int ra, prefix_r;
> > + unsigned int dd;
> > + unsigned long ea, d0, d1, d;
> > +
> > + prefix_r = instr & (1ul << 20);
> > + ra = (sufx >> 16) & 0x1f;
> > +
> > + d0 = instr & 0x3;
> > + d1 = sufx & 0x;
> > + d = (d0 << 16) | d1;
> > +
> > + /*
> > + * sign extend a 34 bit number
> > + */
> > + dd = (unsigned int) (d >> 2);
> > + ea = (signed int) dd;
> > + ea = (ea << 2) | (d & 0x3);
> > +
> > + if (!prefix_r && ra)
> > + ea += regs->gpr[ra];
> > + else if (!prefix_r && !ra)
> > + ; /* Leave ea as is */
> > + else if (prefix_r && !ra)
> > + ea += regs->nip;
> > + else if (prefix_r && ra)
> > + ; /* Invalid form. Should already be checked for by caller! */
> > +
> > + return ea;
> > +}
> > +
> > /*
> > * Return the largest power of 2, not greater than sizeof(unsigned long),
> > * such that x is a multiple of it.
> > @@ -1166,6 +1203,7 @@ int analyse_instr(struct instruction_op *op, const
> > struct pt_regs *regs,
> > unsigned int instr, unsigned int sufx)
> > {
> > unsigned int opcode, ra, rb, rc, rd, spr, u;
> > + unsigned int sufxopcode, prefixtype, prefix_r;
> > unsigned long int imm;
> > unsigned long int val, val2;
> > unsigned int mb, me, sh;
> > @@ -2652,6 +2690,78 @@ int analyse_instr(struct instruction_op *op, const
> > struct pt_regs *regs,
> >
> > }
> >
> > +/*
> > + * Prefixed instructions
> > + */
> > + switch (opcode) {
> > + case 1:
> > + prefix_r = instr & (1ul << 20);
> > + ra = (sufx >> 16) & 0x1f;
> > + op->update_reg = ra;
> > + rd = (sufx >> 21) & 0x1f;
> > + op->reg = rd;
> > + op->val = regs->gpr[rd];
> > +
> > + sufxopcode = sufx >> 26;
> > + prefixtype = (instr >> 24) & 0x3;
> > + switch (prefixtype) {
> > + case 0: /* Type 00 Eight-Byte Load/Store */
> > + if (prefix_r && ra)
> > + break;
> > + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> > + switch (sufxopcode) {
> > + case 41:/* plwa */
> > + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
> > + break;
> > + case 56:/* plq */
> > + op->type = MKOP(LOAD, PREFIXED, 16);
> > + break;
> > + case 57:/* pld */
> > + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 8);
> > + break;
> > + case 60:/* stq */
> > + op->type = MKOP(STORE, PREFIXED, 16);
> > + break;
> > + case 61:/* pstd */
> > + op->type = MKOP(STORE, PREFIXED | SIGNEXT, 8);
>
> sorry, we don't do SIGNEXT for 1 byte below in Type 10, so does 8 byte is used
> conscious without definition in `do_signext()` as we don't really need to do
> anything ?
No, it was mistake. Those instructions should not have been marked as SIGNEXT.
>
> -- Bala
>
> > + break;
> > + }
> > + break;
> > + case 1: /* Type 01 Modified Register-to-Register
Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores
On Fri, Jan 10, 2020 at 9:38 PM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> > This adds emulation support for the following prefixed integer
> > load/stores:
> > * Prefixed Load Byte and Zero (plbz)
> > * Prefixed Load Halfword and Zero (plhz)
> > * Prefixed Load Halfword Algebraic (plha)
> > * Prefixed Load Word and Zero (plwz)
> > * Prefixed Load Word Algebraic (plwa)
> > * Prefixed Load Doubleword (pld)
> > * Prefixed Store Byte (pstb)
> > * Prefixed Store Halfword (psth)
> > * Prefixed Store Word (pstw)
> > * Prefixed Store Doubleword (pstd)
> > * Prefixed Load Quadword (plq)
> > * Prefixed Store Quadword (pstq)
> >
> > Signed-off-by: Jordan Niethe
> > ---
> > arch/powerpc/lib/sstep.c | 110 +++
> > 1 file changed, 110 insertions(+)
> >
> > diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> > index ade3f5eba2e5..4f5ad1f602d8 100644
> > --- a/arch/powerpc/lib/sstep.c
> > +++ b/arch/powerpc/lib/sstep.c
> > @@ -187,6 +187,43 @@ static nokprobe_inline unsigned long xform_ea(unsigned
> > int instr,
> > return ea;
> > }
> >
> > +/*
> > + * Calculate effective address for a MLS:D-form / 8LS:D-form prefixed
> > instruction
> > + */
> > +static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
> > + unsigned int sufx,
> > + const struct pt_regs *regs)
> > +{
> > + int ra, prefix_r;
> > + unsigned int dd;
> > + unsigned long ea, d0, d1, d;
> > +
> > + prefix_r = instr & (1ul << 20);
> > + ra = (sufx >> 16) & 0x1f;
> > +
> > + d0 = instr & 0x3;
> > + d1 = sufx & 0x;
> > + d = (d0 << 16) | d1;
> > +
> > + /*
> > + * sign extend a 34 bit number
> > + */
> > + dd = (unsigned int) (d >> 2);
> > + ea = (signed int) dd;
> > + ea = (ea << 2) | (d & 0x3);
> > +
> > + if (!prefix_r && ra)
> > + ea += regs->gpr[ra];
> > + else if (!prefix_r && !ra)
> > + ; /* Leave ea as is */
> > + else if (prefix_r && !ra)
> > + ea += regs->nip;
> > + else if (prefix_r && ra)
> > + ; /* Invalid form. Should already be checked for by caller! */
> > +
> > + return ea;
> > +}
> > +
> > /*
> > * Return the largest power of 2, not greater than sizeof(unsigned long),
> > * such that x is a multiple of it.
> > @@ -1166,6 +1203,7 @@ int analyse_instr(struct instruction_op *op, const
> > struct pt_regs *regs,
> > unsigned int instr, unsigned int sufx)
> > {
> > unsigned int opcode, ra, rb, rc, rd, spr, u;
> > + unsigned int sufxopcode, prefixtype, prefix_r;
> > unsigned long int imm;
> > unsigned long int val, val2;
> > unsigned int mb, me, sh;
> > @@ -2652,6 +2690,78 @@ int analyse_instr(struct instruction_op *op, const
> > struct pt_regs *regs,
> >
> > }
> >
> > +/*
> > + * Prefixed instructions
> > + */
> > + switch (opcode) {
> > + case 1:
> > + prefix_r = instr & (1ul << 20);
> > + ra = (sufx >> 16) & 0x1f;
> > + op->update_reg = ra;
> > + rd = (sufx >> 21) & 0x1f;
> > + op->reg = rd;
> > + op->val = regs->gpr[rd];
> > +
> > + sufxopcode = sufx >> 26;
> > + prefixtype = (instr >> 24) & 0x3;
> > + switch (prefixtype) {
> > + case 0: /* Type 00 Eight-Byte Load/Store */
> > + if (prefix_r && ra)
> > + break;
> > + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> > + switch (sufxopcode) {
> > + case 41:/* plwa */
> > + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
> > + break;
> > + case 56:/* plq */
> > + op->type = MKOP(LOAD, PREFIXED, 16);
> > + break;
> > + case 57:/* pld */
> > + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 8);
> > + break;
> > + case 60:/* stq */
> > + op->type = MKOP(STORE, PREFIXED, 16);
> > + break;
> > + case 61:/* pstd */
> > + op->type = MKOP(STORE, PREFIXED | SIGNEXT, 8);
>
> For 8 byte and and 1 byte (mentioned below for Type 10 instructions), we
> do not have their respective definitions in `do_signext()`, I am not
> sure whether it is typo/miss.
This was a mistake. pstd/pld should not have been flagged with SIGNEXT.
There still are only algebraic loads for word and halfword lengths so
do_signext()
is fine.
>
> > + break;
> > + }
> > +
Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores
On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> This adds emulation support for the following prefixed integer
> load/stores:
> * Prefixed Load Byte and Zero (plbz)
> * Prefixed Load Halfword and Zero (plhz)
> * Prefixed Load Halfword Algebraic (plha)
> * Prefixed Load Word and Zero (plwz)
> * Prefixed Load Word Algebraic (plwa)
> * Prefixed Load Doubleword (pld)
> * Prefixed Store Byte (pstb)
> * Prefixed Store Halfword (psth)
> * Prefixed Store Word (pstw)
> * Prefixed Store Doubleword (pstd)
> * Prefixed Load Quadword (plq)
> * Prefixed Store Quadword (pstq)
>
> Signed-off-by: Jordan Niethe
> ---
> arch/powerpc/lib/sstep.c | 110 +++
> 1 file changed, 110 insertions(+)
>
> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> index ade3f5eba2e5..4f5ad1f602d8 100644
> --- a/arch/powerpc/lib/sstep.c
> +++ b/arch/powerpc/lib/sstep.c
> @@ -187,6 +187,43 @@ static nokprobe_inline unsigned long xform_ea(unsigned
> int instr,
> return ea;
> }
>
> +/*
> + * Calculate effective address for a MLS:D-form / 8LS:D-form prefixed
> instruction
> + */
> +static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
> + unsigned int sufx,
> + const struct pt_regs *regs)
> +{
> + int ra, prefix_r;
> + unsigned int dd;
> + unsigned long ea, d0, d1, d;
> +
> + prefix_r = instr & (1ul << 20);
> + ra = (sufx >> 16) & 0x1f;
> +
> + d0 = instr & 0x3;
> + d1 = sufx & 0x;
> + d = (d0 << 16) | d1;
> +
> + /*
> + * sign extend a 34 bit number
> + */
> + dd = (unsigned int) (d >> 2);
> + ea = (signed int) dd;
> + ea = (ea << 2) | (d & 0x3);
> +
> + if (!prefix_r && ra)
> + ea += regs->gpr[ra];
> + else if (!prefix_r && !ra)
> + ; /* Leave ea as is */
> + else if (prefix_r && !ra)
> + ea += regs->nip;
> + else if (prefix_r && ra)
> + ; /* Invalid form. Should already be checked for by caller! */
> +
> + return ea;
> +}
> +
> /*
> * Return the largest power of 2, not greater than sizeof(unsigned long),
> * such that x is a multiple of it.
> @@ -1166,6 +1203,7 @@ int analyse_instr(struct instruction_op *op, const
> struct pt_regs *regs,
> unsigned int instr, unsigned int sufx)
> {
> unsigned int opcode, ra, rb, rc, rd, spr, u;
> + unsigned int sufxopcode, prefixtype, prefix_r;
> unsigned long int imm;
> unsigned long int val, val2;
> unsigned int mb, me, sh;
> @@ -2652,6 +2690,78 @@ int analyse_instr(struct instruction_op *op, const
> struct pt_regs *regs,
>
> }
>
> +/*
> + * Prefixed instructions
> + */
> + switch (opcode) {
> + case 1:
> + prefix_r = instr & (1ul << 20);
> + ra = (sufx >> 16) & 0x1f;
> + op->update_reg = ra;
> + rd = (sufx >> 21) & 0x1f;
> + op->reg = rd;
> + op->val = regs->gpr[rd];
> +
> + sufxopcode = sufx >> 26;
> + prefixtype = (instr >> 24) & 0x3;
> + switch (prefixtype) {
> + case 0: /* Type 00 Eight-Byte Load/Store */
> + if (prefix_r && ra)
> + break;
> + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> + switch (sufxopcode) {
> + case 41:/* plwa */
> + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
> + break;
> + case 56:/* plq */
> + op->type = MKOP(LOAD, PREFIXED, 16);
> + break;
> + case 57:/* pld */
> + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 8);
> + break;
> + case 60:/* stq */
> + op->type = MKOP(STORE, PREFIXED, 16);
> + break;
> + case 61:/* pstd */
> + op->type = MKOP(STORE, PREFIXED | SIGNEXT, 8);
sorry, we don't do SIGNEXT for 1 byte below in Type 10, so does 8 byte is used
conscious without definition in `do_signext()` as we don't really need to do
anything ?
-- Bala
> + break;
> + }
> + break;
> + case 1: /* Type 01 Modified Register-to-Register */
> + break;
> + case 2: /* Type 10 Modified Load/Store */
> + if (prefix_r && ra)
> + break;
> + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> + switch (sufxopcode) {
> + case 32:/* plwz */
> + op->type =
Re: [PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores
On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> This adds emulation support for the following prefixed integer
> load/stores:
> * Prefixed Load Byte and Zero (plbz)
> * Prefixed Load Halfword and Zero (plhz)
> * Prefixed Load Halfword Algebraic (plha)
> * Prefixed Load Word and Zero (plwz)
> * Prefixed Load Word Algebraic (plwa)
> * Prefixed Load Doubleword (pld)
> * Prefixed Store Byte (pstb)
> * Prefixed Store Halfword (psth)
> * Prefixed Store Word (pstw)
> * Prefixed Store Doubleword (pstd)
> * Prefixed Load Quadword (plq)
> * Prefixed Store Quadword (pstq)
>
> Signed-off-by: Jordan Niethe
> ---
> arch/powerpc/lib/sstep.c | 110 +++
> 1 file changed, 110 insertions(+)
>
> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
> index ade3f5eba2e5..4f5ad1f602d8 100644
> --- a/arch/powerpc/lib/sstep.c
> +++ b/arch/powerpc/lib/sstep.c
> @@ -187,6 +187,43 @@ static nokprobe_inline unsigned long xform_ea(unsigned
> int instr,
> return ea;
> }
>
> +/*
> + * Calculate effective address for a MLS:D-form / 8LS:D-form prefixed
> instruction
> + */
> +static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
> + unsigned int sufx,
> + const struct pt_regs *regs)
> +{
> + int ra, prefix_r;
> + unsigned int dd;
> + unsigned long ea, d0, d1, d;
> +
> + prefix_r = instr & (1ul << 20);
> + ra = (sufx >> 16) & 0x1f;
> +
> + d0 = instr & 0x3;
> + d1 = sufx & 0x;
> + d = (d0 << 16) | d1;
> +
> + /*
> + * sign extend a 34 bit number
> + */
> + dd = (unsigned int) (d >> 2);
> + ea = (signed int) dd;
> + ea = (ea << 2) | (d & 0x3);
> +
> + if (!prefix_r && ra)
> + ea += regs->gpr[ra];
> + else if (!prefix_r && !ra)
> + ; /* Leave ea as is */
> + else if (prefix_r && !ra)
> + ea += regs->nip;
> + else if (prefix_r && ra)
> + ; /* Invalid form. Should already be checked for by caller! */
> +
> + return ea;
> +}
> +
> /*
> * Return the largest power of 2, not greater than sizeof(unsigned long),
> * such that x is a multiple of it.
> @@ -1166,6 +1203,7 @@ int analyse_instr(struct instruction_op *op, const
> struct pt_regs *regs,
> unsigned int instr, unsigned int sufx)
> {
> unsigned int opcode, ra, rb, rc, rd, spr, u;
> + unsigned int sufxopcode, prefixtype, prefix_r;
> unsigned long int imm;
> unsigned long int val, val2;
> unsigned int mb, me, sh;
> @@ -2652,6 +2690,78 @@ int analyse_instr(struct instruction_op *op, const
> struct pt_regs *regs,
>
> }
>
> +/*
> + * Prefixed instructions
> + */
> + switch (opcode) {
> + case 1:
> + prefix_r = instr & (1ul << 20);
> + ra = (sufx >> 16) & 0x1f;
> + op->update_reg = ra;
> + rd = (sufx >> 21) & 0x1f;
> + op->reg = rd;
> + op->val = regs->gpr[rd];
> +
> + sufxopcode = sufx >> 26;
> + prefixtype = (instr >> 24) & 0x3;
> + switch (prefixtype) {
> + case 0: /* Type 00 Eight-Byte Load/Store */
> + if (prefix_r && ra)
> + break;
> + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> + switch (sufxopcode) {
> + case 41:/* plwa */
> + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
> + break;
> + case 56:/* plq */
> + op->type = MKOP(LOAD, PREFIXED, 16);
> + break;
> + case 57:/* pld */
> + op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 8);
> + break;
> + case 60:/* stq */
> + op->type = MKOP(STORE, PREFIXED, 16);
> + break;
> + case 61:/* pstd */
> + op->type = MKOP(STORE, PREFIXED | SIGNEXT, 8);
For 8 byte and and 1 byte (mentioned below for Type 10 instructions), we
do not have their respective definitions in `do_signext()`, I am not
sure whether it is typo/miss.
> + break;
> + }
> + break;
> + case 1: /* Type 01 Modified Register-to-Register */
Type 01 would be Eight-Byte Register-to-Register.
-- Bala
> + break;
> + case 2: /* Type 10 Modified Load/Store */
> + if (prefix_r && ra)
> + break;
> + op->ea = mlsd_8lsd_ea(instr, sufx, regs);
> + switch (sufxopcode) {
> + case 32:/*
[PATCH 06/18] powerpc sstep: Add support for prefixed integer load/stores
This adds emulation support for the following prefixed integer
load/stores:
* Prefixed Load Byte and Zero (plbz)
* Prefixed Load Halfword and Zero (plhz)
* Prefixed Load Halfword Algebraic (plha)
* Prefixed Load Word and Zero (plwz)
* Prefixed Load Word Algebraic (plwa)
* Prefixed Load Doubleword (pld)
* Prefixed Store Byte (pstb)
* Prefixed Store Halfword (psth)
* Prefixed Store Word (pstw)
* Prefixed Store Doubleword (pstd)
* Prefixed Load Quadword (plq)
* Prefixed Store Quadword (pstq)
Signed-off-by: Jordan Niethe
---
arch/powerpc/lib/sstep.c | 110 +++
1 file changed, 110 insertions(+)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index ade3f5eba2e5..4f5ad1f602d8 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -187,6 +187,43 @@ static nokprobe_inline unsigned long xform_ea(unsigned int
instr,
return ea;
}
+/*
+ * Calculate effective address for a MLS:D-form / 8LS:D-form prefixed
instruction
+ */
+static nokprobe_inline unsigned long mlsd_8lsd_ea(unsigned int instr,
+ unsigned int sufx,
+ const struct pt_regs *regs)
+{
+ int ra, prefix_r;
+ unsigned int dd;
+ unsigned long ea, d0, d1, d;
+
+ prefix_r = instr & (1ul << 20);
+ ra = (sufx >> 16) & 0x1f;
+
+ d0 = instr & 0x3;
+ d1 = sufx & 0x;
+ d = (d0 << 16) | d1;
+
+ /*
+* sign extend a 34 bit number
+*/
+ dd = (unsigned int) (d >> 2);
+ ea = (signed int) dd;
+ ea = (ea << 2) | (d & 0x3);
+
+ if (!prefix_r && ra)
+ ea += regs->gpr[ra];
+ else if (!prefix_r && !ra)
+ ; /* Leave ea as is */
+ else if (prefix_r && !ra)
+ ea += regs->nip;
+ else if (prefix_r && ra)
+ ; /* Invalid form. Should already be checked for by caller! */
+
+ return ea;
+}
+
/*
* Return the largest power of 2, not greater than sizeof(unsigned long),
* such that x is a multiple of it.
@@ -1166,6 +1203,7 @@ int analyse_instr(struct instruction_op *op, const struct
pt_regs *regs,
unsigned int instr, unsigned int sufx)
{
unsigned int opcode, ra, rb, rc, rd, spr, u;
+ unsigned int sufxopcode, prefixtype, prefix_r;
unsigned long int imm;
unsigned long int val, val2;
unsigned int mb, me, sh;
@@ -2652,6 +2690,78 @@ int analyse_instr(struct instruction_op *op, const
struct pt_regs *regs,
}
+/*
+ * Prefixed instructions
+ */
+ switch (opcode) {
+ case 1:
+ prefix_r = instr & (1ul << 20);
+ ra = (sufx >> 16) & 0x1f;
+ op->update_reg = ra;
+ rd = (sufx >> 21) & 0x1f;
+ op->reg = rd;
+ op->val = regs->gpr[rd];
+
+ sufxopcode = sufx >> 26;
+ prefixtype = (instr >> 24) & 0x3;
+ switch (prefixtype) {
+ case 0: /* Type 00 Eight-Byte Load/Store */
+ if (prefix_r && ra)
+ break;
+ op->ea = mlsd_8lsd_ea(instr, sufx, regs);
+ switch (sufxopcode) {
+ case 41:/* plwa */
+ op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 4);
+ break;
+ case 56:/* plq */
+ op->type = MKOP(LOAD, PREFIXED, 16);
+ break;
+ case 57:/* pld */
+ op->type = MKOP(LOAD, PREFIXED | SIGNEXT, 8);
+ break;
+ case 60:/* stq */
+ op->type = MKOP(STORE, PREFIXED, 16);
+ break;
+ case 61:/* pstd */
+ op->type = MKOP(STORE, PREFIXED | SIGNEXT, 8);
+ break;
+ }
+ break;
+ case 1: /* Type 01 Modified Register-to-Register */
+ break;
+ case 2: /* Type 10 Modified Load/Store */
+ if (prefix_r && ra)
+ break;
+ op->ea = mlsd_8lsd_ea(instr, sufx, regs);
+ switch (sufxopcode) {
+ case 32:/* plwz */
+ op->type = MKOP(LOAD, PREFIXED, 4);
+ break;
+ case 34:/* plbz */
+ op->type = MKOP(LOAD, PREFIXED, 1);
+ break;
+ case 36:/* pstw */
+ op->type = MKOP(STORE, PREFIXED, 4);
+
