Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-16 Thread Michael Ellerman
Peter Zijlstra writes: > On Tue, Sep 14, 2021 at 08:40:38PM +1000, Michael Ellerman wrote: >> Peter Zijlstra writes: > >> > I'm thinking we ought to keep hops as steps along the NUMA fabric, with >> > 0 hops being the local node. That only gets us: >> > >> > L2, remote=0, hops=HOPS_0 -- our L2 >

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-14 Thread Peter Zijlstra
On Tue, Sep 14, 2021 at 08:40:38PM +1000, Michael Ellerman wrote: > Peter Zijlstra writes: > > I'm thinking we ought to keep hops as steps along the NUMA fabric, with > > 0 hops being the local node. That only gets us: > > > > L2, remote=0, hops=HOPS_0 -- our L2 > > L2, remote=1, hops=HOPS_0 --

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-14 Thread Michael Ellerman
Peter Zijlstra writes: > On Thu, Sep 09, 2021 at 10:45:54PM +1000, Michael Ellerman wrote: > >> > The 'new' composite doesnt have a hops field because the hardware that >> > nessecitated that change doesn't report it, but we could easily add a >> > field there. >> > >> > Suppose we add, mem_hops:3

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-09 Thread Peter Zijlstra
On Thu, Sep 09, 2021 at 10:45:54PM +1000, Michael Ellerman wrote: > > The 'new' composite doesnt have a hops field because the hardware that > > nessecitated that change doesn't report it, but we could easily add a > > field there. > > > > Suppose we add, mem_hops:3 (would 6 hops be too small?) an

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-09 Thread Michael Ellerman
Peter Zijlstra writes: > On Wed, Sep 08, 2021 at 05:17:53PM +1000, Michael Ellerman wrote: >> Kajol Jain writes: > >> > diff --git a/include/uapi/linux/perf_event.h >> > b/include/uapi/linux/perf_event.h >> > index f92880a15645..030b3e990ac3 100644 >> > --- a/include/uapi/linux/perf_event.h >> >

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-08 Thread Peter Zijlstra
On Wed, Sep 08, 2021 at 05:17:53PM +1000, Michael Ellerman wrote: > Kajol Jain writes: > > diff --git a/include/uapi/linux/perf_event.h > > b/include/uapi/linux/perf_event.h > > index f92880a15645..030b3e990ac3 100644 > > --- a/include/uapi/linux/perf_event.h > > +++ b/include/uapi/linux/perf_ev

Re: [PATCH 1/3] perf: Add macros to specify onchip L2/L3 accesses

2021-09-08 Thread Michael Ellerman
Kajol Jain writes: > Add couple of new macros to represent onchip L2 and onchip L3 accesses. It would be "on chip". But I think this needs much more explanation, this is a generic header so these definitions need to make sense, and have an understood meaning, across all architectures. I think mo