Re: [PATCH 14/15] powerpc/powernv/sriov: Refactor M64 BAR setup

2020-07-14 Thread Alexey Kardashevskiy 



On 10/07/2020 15:23, Oliver O'Halloran wrote:
> Split up the logic so that we have one branch that handles setting up a
> segmented window and another that handles setting up single PE windows for
> each VF.
> 
> Signed-off-by: Oliver O'Halloran 


Reviewed-by: Alexey Kardashevskiy 



> ---
> This patch could be folded into the previous one. I've kept it
> seperate mainly because the diff is *horrific* when they're merged.
> ---
>  arch/powerpc/platforms/powernv/pci-sriov.c | 57 ++
>  1 file changed, 27 insertions(+), 30 deletions(-)
> 
> diff --git a/arch/powerpc/platforms/powernv/pci-sriov.c 
> b/arch/powerpc/platforms/powernv/pci-sriov.c
> index 2f967aa4fbf5..8de03636888a 100644
> --- a/arch/powerpc/platforms/powernv/pci-sriov.c
> +++ b/arch/powerpc/platforms/powernv/pci-sriov.c
> @@ -441,52 +441,49 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, 
> u16 num_vfs)
>   struct resource   *res;
>   inti, j;
>   int64_trc;
> - inttotal_vfs;
>   resource_size_tsize, start;
> - intm64_bars;
> + intbase_pe_num;
>  
>   phb = pci_bus_to_pnvhb(pdev->bus);
>   iov = pnv_iov_get(pdev);
> - total_vfs = pci_sriov_get_totalvfs(pdev);
> -
> - if (iov->m64_single_mode)
> - m64_bars = num_vfs;
> - else
> - m64_bars = 1;
>  
>   for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
>   res = >resource[i + PCI_IOV_RESOURCES];
>   if (!res->flags || !res->parent)
>   continue;
>  
> - for (j = 0; j < m64_bars; j++) {
> + /* don't need single mode? map everything in one go! */
> + if (!iov->m64_single_mode) {
>   win = pnv_pci_alloc_m64_bar(phb, iov);
>   if (win < 0)
>   goto m64_failed;
>  
> - if (iov->m64_single_mode) {
> - int pe_num = iov->vf_pe_arr[j].pe_number;
> -
> - size = pci_iov_resource_size(pdev,
> - PCI_IOV_RESOURCES + i);
> - start = res->start + size * j;
> - rc = pnv_ioda_map_m64_single(phb, win,
> -  pe_num,
> -  start,
> -  size);
> - } else {
> - size = resource_size(res);
> - start = res->start;
> -
> - rc = pnv_ioda_map_m64_accordion(phb, win, start,
> - size);
> - }
> + size = resource_size(res);
> + start = res->start;
>  
> - if (rc != OPAL_SUCCESS) {
> - dev_err(>dev, "Failed to map M64 window 
> #%d: %lld\n",
> - win, rc);
> + rc = pnv_ioda_map_m64_accordion(phb, win, start, size);
> + if (rc)
> + goto m64_failed;
> +
> + continue;
> + }
> +
> + /* otherwise map each VF with single PE BARs */
> + size = pci_iov_resource_size(pdev, PCI_IOV_RESOURCES + i);
> + base_pe_num = iov->vf_pe_arr[0].pe_number;
> +
> + for (j = 0; j < num_vfs; j++) {
> + win = pnv_pci_alloc_m64_bar(phb, iov);
> + if (win < 0)
> + goto m64_failed;
> +
> + start = res->start + size * j;
> + rc = pnv_ioda_map_m64_single(phb, win,
> +  base_pe_num + j,
> +  start,
> +  size);
> + if (rc)
>   goto m64_failed;
> - }
>   }
>   }
>   return 0;
> 

-- 
Alexey

[PATCH 14/15] powerpc/powernv/sriov: Refactor M64 BAR setup

2020-07-09 Thread Oliver O'Halloran 
Split up the logic so that we have one branch that handles setting up a
segmented window and another that handles setting up single PE windows for
each VF.

Signed-off-by: Oliver O'Halloran 
---
This patch could be folded into the previous one. I've kept it
seperate mainly because the diff is *horrific* when they're merged.
---
 arch/powerpc/platforms/powernv/pci-sriov.c | 57 ++
 1 file changed, 27 insertions(+), 30 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-sriov.c 
b/arch/powerpc/platforms/powernv/pci-sriov.c
index 2f967aa4fbf5..8de03636888a 100644
--- a/arch/powerpc/platforms/powernv/pci-sriov.c
+++ b/arch/powerpc/platforms/powernv/pci-sriov.c
@@ -441,52 +441,49 @@ static int pnv_pci_vf_assign_m64(struct pci_dev *pdev, 
u16 num_vfs)
struct resource   *res;
inti, j;
int64_trc;
-   inttotal_vfs;
resource_size_tsize, start;
-   intm64_bars;
+   intbase_pe_num;
 
phb = pci_bus_to_pnvhb(pdev->bus);
iov = pnv_iov_get(pdev);
-   total_vfs = pci_sriov_get_totalvfs(pdev);
-
-   if (iov->m64_single_mode)
-   m64_bars = num_vfs;
-   else
-   m64_bars = 1;
 
for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
res = >resource[i + PCI_IOV_RESOURCES];
if (!res->flags || !res->parent)
continue;
 
-   for (j = 0; j < m64_bars; j++) {
+   /* don't need single mode? map everything in one go! */
+   if (!iov->m64_single_mode) {
win = pnv_pci_alloc_m64_bar(phb, iov);
if (win < 0)
goto m64_failed;
 
-   if (iov->m64_single_mode) {
-   int pe_num = iov->vf_pe_arr[j].pe_number;
-
-   size = pci_iov_resource_size(pdev,
-   PCI_IOV_RESOURCES + i);
-   start = res->start + size * j;
-   rc = pnv_ioda_map_m64_single(phb, win,
-pe_num,
-start,
-size);
-   } else {
-   size = resource_size(res);
-   start = res->start;
-
-   rc = pnv_ioda_map_m64_accordion(phb, win, start,
-   size);
-   }
+   size = resource_size(res);
+   start = res->start;
 
-   if (rc != OPAL_SUCCESS) {
-   dev_err(>dev, "Failed to map M64 window 
#%d: %lld\n",
-   win, rc);
+   rc = pnv_ioda_map_m64_accordion(phb, win, start, size);
+   if (rc)
+   goto m64_failed;
+
+   continue;
+   }
+
+   /* otherwise map each VF with single PE BARs */
+   size = pci_iov_resource_size(pdev, PCI_IOV_RESOURCES + i);
+   base_pe_num = iov->vf_pe_arr[0].pe_number;
+
+   for (j = 0; j < num_vfs; j++) {
+   win = pnv_pci_alloc_m64_bar(phb, iov);
+   if (win < 0)
+   goto m64_failed;
+
+   start = res->start + size * j;
+   rc = pnv_ioda_map_m64_single(phb, win,
+base_pe_num + j,
+start,
+size);
+   if (rc)
goto m64_failed;
-   }
}
}
return 0;
-- 
2.26.2