Benjamin Herrenschmidt wrote:
On Wed, 2010-01-20 at 16:09 -0600, Joel Schopp wrote:
I can turn that into a conditional branch (case statement) with a shift
for the common 1,2,4 cases which should cover all procs available today
falling back to a divide for any theoretical future processors
On Mon, 2010-01-25 at 11:50 -0600, Joel Schopp wrote:
Look at the cputhreads.h implementation ... Today we only support
power-of-two numbers of threads.
I've run 3 threads using cpu hotplug to offline 1 of the 4. It's
certainly a stupid idea, but there you go.
Oh, you mean you need
On Wed, 2010-01-20 at 16:09 -0600, Joel Schopp wrote:
I can turn that into a conditional branch (case statement) with a shift
for the common 1,2,4 cases which should cover all procs available today
falling back to a divide for any theoretical future processors that do
other numbers of
On Wed, 2010-01-20 at 16:44 -0600, Joel Schopp wrote:
Care to take Gautham's bugfix patch (patch 1/2) now, since it just fixes
a bug? You'll need it if you ever try to make the x86 broken version work.
Sure, I'll take that, thanks!
___
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
On Wed, 2010-01-20 at 14:04 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
So this is an actual performance improvement, not only power savings?
This patch
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
On Wed, 2010-01-20 at 14:04 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
So this is an actual performance improvement, not only power savings?
It's primarily a performance improvement. Any power/energy
+ if (cpu_has_feature(CPU_FTRS_POWER7) weight == 4) {
I think we should avoid using cpu_has_feature like this. It's better to
create a new feature and add it to POWER7 in the cputable, then check
for that here.
The way that it is now, I think any CPU that has superset of the
+
+static inline int thread_in_smt4core(int x)
+{
+ return x % 4;
+}
Needs a whitespace here though I don't really like the above. Any reason
why you can't use the existing cpu_thread_in_core() ?
I will change it to cpu_thread_in_core()
+unsigned long arch_scale_smt_power(struct
Peter Zijlstra wrote:
On Wed, 2010-01-20 at 14:04 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
So this is an actual performance improvement, not only
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