Re: [PATCH 2/3] powerpc/powernv: DMA operations for discontiguous allocation

2018-07-04 Thread Russell Currey
On Fri, 2018-06-29 at 17:34 +1000, Russell Currey wrote: > + /* > + * The TCE isn't being used, so let's try and > allocate it. > + * Bits 0 and 1 are read/write, and we use bit 2 as > a "lock" > + * bit. This is to prevent any race where the

Re: [PATCH 2/3] powerpc/powernv: DMA operations for discontiguous allocation

2018-07-03 Thread Russell Currey
On Mon, 2018-07-02 at 18:47 +1000, Alexey Kardashevskiy wrote: > On Fri, 29 Jun 2018 17:34:36 +1000 > Russell Currey wrote: > > > DMA pseudo-bypass is a new set of DMA operations that solve some > > issues for > > devices that want to address more than 32 bits but can't address > > the 59 > >

Re: [PATCH 2/3] powerpc/powernv: DMA operations for discontiguous allocation

2018-07-02 Thread Alexey Kardashevskiy
On Fri, 29 Jun 2018 17:34:36 +1000 Russell Currey wrote: > DMA pseudo-bypass is a new set of DMA operations that solve some issues for > devices that want to address more than 32 bits but can't address the 59 > bits required to enable direct DMA. > > The previous implementation for POWER8/PHB3

Re: [PATCH 2/3] powerpc/powernv: DMA operations for discontiguous allocation

2018-06-29 Thread Benjamin Herrenschmidt
On Fri, 2018-06-29 at 17:34 +1000, Russell Currey wrote: > DMA pseudo-bypass is a new set of DMA operations that solve some issues for > devices that want to address more than 32 bits but can't address the 59 > bits required to enable direct DMA. One thing you may need to add (I didn't see it

[PATCH 2/3] powerpc/powernv: DMA operations for discontiguous allocation

2018-06-29 Thread Russell Currey
DMA pseudo-bypass is a new set of DMA operations that solve some issues for devices that want to address more than 32 bits but can't address the 59 bits required to enable direct DMA. The previous implementation for POWER8/PHB3 worked around this by configuring a bypass from the default 32-bit