Re: [PATCH 4/5] powerpc/dts: remove msi-available-ranges property

2013-06-17 Thread Scott Wood 

On 06/17/2013 12:15:36 AM, Lian Minghuan-b31939 wrote:

On 06/15/2013 06:10 AM, Scott Wood wrote:

On 06/14/2013 02:15:58 AM, Minghuan Lian wrote:

For MPIC v4.3 MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. For the
first register, when using MSIIR we will get the irqs 0x0 0x1 0x2
...0x1f, but when using MSIIR1, the irqs are 0x0 0x10 0x20 ... 0x1f0
It is hard to describe the available irqs using property
'msi-available-ranges'. The patch removes this property.


Only remove it from mpic 4.3.  And since you introduced  
qoriq-mpic4.3.dtsi earlier in the patchset, why didn't you just  
avoid adding it then?


[Minghuan] If adding it in qoriq-mpic4.3, and the 3-5 patches are not  
accepted, mpic4.3 can also work.


mpic 4.3 cannot work with msi-available-ranges, at all.  The hardware  
just doesn't work that way.


-Scott
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Re: [PATCH 4/5] powerpc/dts: remove msi-available-ranges property

2013-06-16 Thread Lian Minghuan-b31939 

On 06/15/2013 06:10 AM, Scott Wood wrote:

On 06/14/2013 02:15:58 AM, Minghuan Lian wrote:

For MPIC v4.3 MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. For the
first register, when using MSIIR we will get the irqs 0x0 0x1 0x2
...0x1f, but when using MSIIR1, the irqs are 0x0 0x10 0x20 ... 0x1f0
It is hard to describe the available irqs using property
'msi-available-ranges'. The patch removes this property.


Only remove it from mpic 4.3.  And since you introduced 
qoriq-mpic4.3.dtsi earlier in the patchset, why didn't you just avoid 
adding it then?


[Minghuan] If adding it in qoriq-mpic4.3, and the 3-5 patches are not 
accepted, mpic4.3 can also work.

-Scott



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[PATCH 4/5] powerpc/dts: remove msi-available-ranges property

2013-06-14 Thread Minghuan Lian 
For MPIC v4.3 MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. For the
first register, when using MSIIR we will get the irqs 0x0 0x1 0x2
...0x1f, but when using MSIIR1, the irqs are 0x0 0x10 0x20 ... 0x1f0
It is hard to describe the available irqs using property
'msi-available-ranges'. The patch removes this property.

Signed-off-by: Minghuan Lian minghuan.l...@freescale.com
---
 arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi  | 1 -
 arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi| 3 ---
 arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi | 4 
 3 files changed, 8 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
index 71c30eb..1ac4f23 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
@@ -66,7 +66,6 @@ message@41400 {
 msi@41600 {
compatible = fsl,mpic-msi;
reg = 0x41600 0x80;
-   msi-available-ranges = 0 0x100;
interrupts = 
0xe0 0 0 0
0xe1 0 0 0
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
index 08f4227..cf7355c 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi
@@ -54,7 +54,6 @@ timer@41100 {
 msi0: msi@41600 {
compatible = fsl,mpic-msi;
reg = 0x41600 0x200 0x44140 4;
-   msi-available-ranges = 0 0x100;
interrupts = 
0xe0 0 0 0
0xe1 0 0 0
@@ -69,7 +68,6 @@ msi0: msi@41600 {
 msi1: msi@41800 {
compatible = fsl,mpic-msi;
reg = 0x41800 0x200 0x45140 4;
-   msi-available-ranges = 0 0x100;
interrupts = 
0xe8 0 0 0
0xe9 0 0 0
@@ -84,7 +82,6 @@ msi1: msi@41800 {
 msi2: msi@41a00 {
compatible = fsl,mpic-msi;
reg = 0x41a00 0x200 0x46140 4;
-   msi-available-ranges = 0 0x100;
interrupts = 
0xf0 0 0 0
0xf1 0 0 0
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
index e2665b8..8a997ea 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
@@ -54,7 +54,6 @@ timer@41100 {
 msi0: msi@41600 {
compatible = fsl,mpic-msi, fsl,mpic-msi-v4.3;
reg = 0x41600 0x200 0x44148 4;
-   msi-available-ranges = 0 0x200;
interrupts = 
0xe0 0 0 0
0xe1 0 0 0
@@ -77,7 +76,6 @@ msi0: msi@41600 {
 msi1: msi@41800 {
compatible = fsl,mpic-msi, fsl,mpic-msi-v4.3;
reg = 0x41800 0x200 0x45148 4;
-   msi-available-ranges = 0 0x200;
interrupts = 
0xe8 0 0 0
0xe9 0 0 0
@@ -100,7 +98,6 @@ msi1: msi@41800 {
 msi2: msi@41a00 {
compatible = fsl,mpic-msi, fsl,mpic-msi-v4.3;
reg = 0x41a00 0x200 0x46148 4;
-   msi-available-ranges = 0 0x200;
interrupts = 
0xf0 0 0 0
0xf1 0 0 0
@@ -123,7 +120,6 @@ msi2: msi@41a00 {
 msi3: msi@41c00 {
compatible = fsl,mpic-msi, fsl,mpic-msi-v4.3;
reg = 0x41c00 0x200 0x47148 4;
-   msi-available-ranges = 0 0x200;
interrupts = 
0xf8 0 0 0
0xf9 0 0 0
-- 
1.8.1.2


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Re: [PATCH 4/5] powerpc/dts: remove msi-available-ranges property

2013-06-14 Thread Scott Wood 

On 06/14/2013 02:15:58 AM, Minghuan Lian wrote:

For MPIC v4.3 MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. For the
first register, when using MSIIR we will get the irqs 0x0 0x1 0x2
...0x1f, but when using MSIIR1, the irqs are 0x0 0x10 0x20 ... 0x1f0
It is hard to describe the available irqs using property
'msi-available-ranges'. The patch removes this property.


Only remove it from mpic 4.3.  And since you introduced  
qoriq-mpic4.3.dtsi earlier in the patchset, why didn't you just avoid  
adding it then?


-Scott
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