Re: [PATCH resend] powernv/iommu: disable IOMMU bypass with param iommu=nobypass

2015-01-22 Thread cascardo 
On Thu, Jan 22, 2015 at 12:05:31PM +1100, Michael Ellerman wrote:
 On Wed, 2015-01-21 at 13:23 -0200, Thadeu Lima de Souza Cascardo wrote:
  When IOMMU bypass is enabled, a PCI device can read and write memory
  that was not mapped by the driver without causing an EEH. That might
  cause memory corruption, for example.
  
  When we disable bypass, DMA reads and writes to addresses not mapped by
  the IOMMU will cause an EEH, allowing us to debug such issues.
  
  Signed-off-by: Thadeu Lima de Souza Cascardo casca...@linux.vnet.ibm.com
  Reviewed-by: Gavin Shan gws...@linux.vnet.ibm.com
  ---
   Documentation/kernel-parameters.txt   |2 ++
   arch/powerpc/platforms/powernv/pci-ioda.c |   24 +++-
   2 files changed, 25 insertions(+), 1 deletion(-)
 
 Is this unchanged since v2?
 

Yes, it's unchanged, just rebased.

Cascardo.

 It's marked as under review in patchwork which means I'm looking at it:
 
   http://patchwork.ozlabs.org/patch/402682/
 
 
 Please check patchwork in future.
 
 cheers
 
 
 ___
 Linuxppc-dev mailing list
 Linuxppc-dev@lists.ozlabs.org
 https://lists.ozlabs.org/listinfo/linuxppc-dev

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH resend] powernv/iommu: disable IOMMU bypass with param iommu=nobypass

2015-01-22 Thread Michael Ellerman 
On Wed, 2015-01-21 at 13:23 -0200, Thadeu Lima de Souza Cascardo wrote:
 diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
 b/arch/powerpc/platforms/powernv/pci-ioda.c
 index fac88ed..f942a19 100644
 --- a/arch/powerpc/platforms/powernv/pci-ioda.c
 +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
 @@ -75,6 +75,27 @@ static void pe_level_printk(const struct pnv_ioda_pe *pe, 
 const char *level,
  #define pe_info(pe, fmt, ...)\
   pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__)
  
 +static bool pnv_iommu_bypass_disabled __read_mostly;
 +
 +static int __init iommu_setup(char *str)
 +{
 + if (!str)
 + return -EINVAL;
 + while (*str) {
 + if (!strncmp(str, nobypass, 8)) {
 + pnv_iommu_bypass_disabled = true;
 + pr_info(PowerNV: IOMMU bypass window disabled.\n);

I added a break here.

 + }
 + str += strcspn(str, ,);
 + if (*str == ',')
 + str++;
 + }
 +
 + return 0;
 +}
 +
 +early_param(iommu, iommu_setup);

cheers


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH resend] powernv/iommu: disable IOMMU bypass with param iommu=nobypass

2015-01-21 Thread Michael Ellerman 
On Wed, 2015-01-21 at 13:23 -0200, Thadeu Lima de Souza Cascardo wrote:
 When IOMMU bypass is enabled, a PCI device can read and write memory
 that was not mapped by the driver without causing an EEH. That might
 cause memory corruption, for example.
 
 When we disable bypass, DMA reads and writes to addresses not mapped by
 the IOMMU will cause an EEH, allowing us to debug such issues.
 
 Signed-off-by: Thadeu Lima de Souza Cascardo casca...@linux.vnet.ibm.com
 Reviewed-by: Gavin Shan gws...@linux.vnet.ibm.com
 ---
  Documentation/kernel-parameters.txt   |2 ++
  arch/powerpc/platforms/powernv/pci-ioda.c |   24 +++-
  2 files changed, 25 insertions(+), 1 deletion(-)

Is this unchanged since v2?

It's marked as under review in patchwork which means I'm looking at it:

  http://patchwork.ozlabs.org/patch/402682/


Please check patchwork in future.

cheers


___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[PATCH resend] powernv/iommu: disable IOMMU bypass with param iommu=nobypass

2015-01-21 Thread Thadeu Lima de Souza Cascardo 
When IOMMU bypass is enabled, a PCI device can read and write memory
that was not mapped by the driver without causing an EEH. That might
cause memory corruption, for example.

When we disable bypass, DMA reads and writes to addresses not mapped by
the IOMMU will cause an EEH, allowing us to debug such issues.

Signed-off-by: Thadeu Lima de Souza Cascardo casca...@linux.vnet.ibm.com
Reviewed-by: Gavin Shan gws...@linux.vnet.ibm.com
---
 Documentation/kernel-parameters.txt   |2 ++
 arch/powerpc/platforms/powernv/pci-ioda.c |   24 +++-
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 4df73da..7dedfe5 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1493,6 +1493,8 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
forcesac
soft
pt  [x86, IA-64]
+   nobypass[PPC/POWERNV]
+   Disable IOMMU bypass, using IOMMU for PCI devices.
 
 
io7=[HW] IO7 for Marvel based alpha systems
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index fac88ed..f942a19 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -75,6 +75,27 @@ static void pe_level_printk(const struct pnv_ioda_pe *pe, 
const char *level,
 #define pe_info(pe, fmt, ...)  \
pe_level_printk(pe, KERN_INFO, fmt, ##__VA_ARGS__)
 
+static bool pnv_iommu_bypass_disabled __read_mostly;
+
+static int __init iommu_setup(char *str)
+{
+   if (!str)
+   return -EINVAL;
+   while (*str) {
+   if (!strncmp(str, nobypass, 8)) {
+   pnv_iommu_bypass_disabled = true;
+   pr_info(PowerNV: IOMMU bypass window disabled.\n);
+   }
+   str += strcspn(str, ,);
+   if (*str == ',')
+   str++;
+   }
+
+   return 0;
+}
+
+early_param(iommu, iommu_setup);
+
 /*
  * stdcix is only supposed to be used in hypervisor real mode as per
  * the architecture spec
@@ -1348,7 +1369,8 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb 
*phb,
pnv_ioda_setup_bus_dma(pe, pe-pbus, true);
 
/* Also create a bypass window */
-   pnv_pci_ioda2_setup_bypass_pe(phb, pe);
+   if (!pnv_iommu_bypass_disabled)
+   pnv_pci_ioda2_setup_bypass_pe(phb, pe);
return;
 fail:
if (pe-tce32_seg = 0)
-- 
1.7.10.4

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev