Let do_page_fault() retrieve address and errorcode from regs.

This simplifies the code and shouldn't impeed performance as
address and errorcode are likely still hot in the cache.

Additional cleanup could be done in book3s/64 code once
the same changes have been applied to hash_fault() handling.

Suggested-by: Nicholas Piggin <npig...@gmail.com>
Signed-off-by: Christophe Leroy <christophe.le...@csgroup.eu>
---
 arch/powerpc/include/asm/bug.h       |  2 +-
 arch/powerpc/kernel/entry_32.S       |  7 +------
 arch/powerpc/kernel/exceptions-64e.S |  2 --
 arch/powerpc/kernel/head_40x.S       |  6 +++---
 arch/powerpc/kernel/head_8xx.S       |  6 +++---
 arch/powerpc/kernel/head_book3s_32.S |  5 ++---
 arch/powerpc/kernel/head_booke.h     |  4 +---
 arch/powerpc/mm/fault.c              | 10 +++++-----
 8 files changed, 16 insertions(+), 26 deletions(-)

diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h
index af8c164254d0..5a05f43b2984 100644
--- a/arch/powerpc/include/asm/bug.h
+++ b/arch/powerpc/include/asm/bug.h
@@ -111,7 +111,7 @@
 #ifndef __ASSEMBLY__
 
 struct pt_regs;
-extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
+int do_page_fault(struct pt_regs *regs);
 void bad_page_fault(struct pt_regs *regs, int sig);
 void __bad_page_fault(struct pt_regs *regs, int sig);
 extern void _exception(int, struct pt_regs *, int, unsigned long);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index abd95aebe73a..05904334c0ff 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -276,8 +276,7 @@ reenable_mmu:
         * We save a bunch of GPRs,
         * r3 can be different from GPR3(r1) at this point, r9 and r11
         * contains the old MSR and handler address respectively,
-        * r4 & r5 can contain page fault arguments that need to be passed
-        * along as well. r0, r6-r8, r12, CCR, CTR, XER etc... are left
+        * r0, r4-r8, r12, CCR, CTR, XER etc... are left
         * clobbered as they aren't useful past this point.
         */
 
@@ -285,15 +284,11 @@ reenable_mmu:
        stw     r9,8(r1)
        stw     r11,12(r1)
        stw     r3,16(r1)
-       stw     r4,20(r1)
-       stw     r5,24(r1)
 
        /* If we are disabling interrupts (normal case), simply log it with
         * lockdep
         */
 1:     bl      trace_hardirqs_off
-       lwz     r5,24(r1)
-       lwz     r4,20(r1)
        lwz     r3,16(r1)
        lwz     r11,12(r1)
        lwz     r9,8(r1)
diff --git a/arch/powerpc/kernel/exceptions-64e.S 
b/arch/powerpc/kernel/exceptions-64e.S
index e6fa10fc5d67..52421042a020 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -1011,8 +1011,6 @@ storage_fault_common:
        std     r14,_DAR(r1)
        std     r15,_DSISR(r1)
        addi    r3,r1,STACK_FRAME_OVERHEAD
-       mr      r4,r14
-       mr      r5,r15
        ld      r14,PACA_EXGEN+EX_R14(r13)
        ld      r15,PACA_EXGEN+EX_R15(r13)
        bl      do_page_fault
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index a1ae00689e0f..16dc0eecbdf9 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -191,9 +191,9 @@ _ENTRY(saved_ksp_limit)
  */
        START_EXCEPTION(0x0400, InstructionAccess)
        EXCEPTION_PROLOG
-       mr      r4,r12                  /* Pass SRR0 as arg2 */
-       stw     r4, _DEAR(r11)
-       li      r5,0                    /* Pass zero as arg3 */
+       stw     r12, _DEAR(r11)         /* SRR0 as DEAR */
+       li      r5,0
+       stw     r5, _ESR(r11)           /* Zero ESR */
        EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* 0x0500 - External Interrupt Exception */
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 81f3c984f50c..7dce277c8a2a 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -312,14 +312,14 @@ DataStoreTLBMiss:
        . = 0x1300
 InstructionTLBError:
        EXCEPTION_PROLOG
-       mr      r4,r12
        andis.  r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
        andis.  r10,r9,SRR1_ISI_NOPT@h
        beq+    .Litlbie
-       tlbie   r4
+       tlbie   r12
        /* 0x400 is InstructionAccess exception, needed by bad_page_fault() */
 .Litlbie:
-       stw     r4, _DAR(r11)
+       stw     r12, _DAR(r11)
+       stw     r5, _DSISR(r11)
        EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* This is the data TLB error on the MPC8xx.  This could be due to
diff --git a/arch/powerpc/kernel/head_book3s_32.S 
b/arch/powerpc/kernel/head_book3s_32.S
index 15e6003fd3b8..0133a02d1d47 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -369,9 +369,9 @@ BEGIN_MMU_FTR_SECTION
 END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)
 #endif
 #endif /* CONFIG_VMAP_STACK */
-1:     mr      r4,r12
        andis.  r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
-       stw     r4, _DAR(r11)
+       stw     r12, _DAR(r11)
+       stw     r5, _DSISR(r11)
        EXC_XFER_LITE(0x400, handle_page_fault)
 
 /* External interrupt */
@@ -693,7 +693,6 @@ handle_page_fault_tramp_1:
 #ifdef CONFIG_VMAP_STACK
        EXCEPTION_PROLOG_2 handle_dar_dsisr=1
 #endif
-       lwz     r4, _DAR(r11)
        lwz     r5, _DSISR(r11)
        /* fall through */
 handle_page_fault_tramp_2:
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index 74e230c200fb..0fbdacc7fab7 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -476,9 +476,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
        NORMAL_EXCEPTION_PROLOG(INST_STORAGE);                \
        mfspr   r5,SPRN_ESR;            /* Grab the ESR and save it */        \
        stw     r5,_ESR(r11);                                                 \
-       mr      r4,r12;                 /* Pass SRR0 as arg2 */               \
-       stw     r4, _DEAR(r11);                                               \
-       li      r5,0;                   /* Pass zero as arg3 */               \
+       stw     r12, _DEAR(r11);        /* Pass SRR0 as arg2 */               \
        EXC_XFER_LITE(0x0400, handle_page_fault)
 
 #define ALIGNMENT_EXCEPTION                                                  \
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index af1c7a6d09dc..fafacf7019f9 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -388,9 +388,10 @@ static void sanity_check_fault(bool is_write, bool is_user,
  * The return value is 0 if the fault was handled, or the signal
  * number if this is a kernel fault that can't be handled here.
  */
-static int __do_page_fault(struct pt_regs *regs, unsigned long address,
-                          unsigned long error_code)
+static int __do_page_fault(struct pt_regs *regs)
 {
+       unsigned long address = regs->dar;
+       unsigned long error_code = regs->dsisr;
        struct vm_area_struct * vma;
        struct mm_struct *mm = current->mm;
        unsigned int flags = FAULT_FLAG_DEFAULT;
@@ -542,12 +543,11 @@ static int __do_page_fault(struct pt_regs *regs, unsigned 
long address,
 }
 NOKPROBE_SYMBOL(__do_page_fault);
 
-int do_page_fault(struct pt_regs *regs, unsigned long address,
-                 unsigned long error_code)
+int do_page_fault(struct pt_regs *regs)
 {
        const struct exception_table_entry *entry;
        enum ctx_state prev_state = exception_enter();
-       int rc = __do_page_fault(regs, address, error_code);
+       int rc = __do_page_fault(regs);
        exception_exit(prev_state);
        if (likely(!rc))
                return 0;
-- 
2.25.0

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