From: Igal Liberman igal.liber...@freescale.com
Based on prior work by Andy Fleming aflem...@freescale.com
Signed-off-by: Igal Liberman igal.liber...@freescale.com
Signed-off-by: Shruti Kanetkar shr...@freescale.com
Signed-off-by: Emil Medve emilian.me...@freescale.com
---
v1 --- v2:
- Added T1024 support
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi |9 ++-
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi | 20 -
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi | 12 ++-
arch/powerpc/boot/dts/fsl/b4si-post.dtsi| 31 +++-
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi | 115 ++-
arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi |5 +-
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 29 ++-
arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi | 10 ++-
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 29 ++-
arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi | 10 ++-
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 48 ++-
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 15 +++-
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 29 ++-
arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi | 10 ++-
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi | 56 -
arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi | 17 +++-
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 19 +
arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi |6 ++
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 31
arch/powerpc/boot/dts/fsl/t104xsi-pre.dtsi |9 ++-
arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 43 ++
arch/powerpc/boot/dts/fsl/t208xsi-pre.dtsi | 11 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 88 +++-
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi | 22 -
24 files changed, 654 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 9cfeaef..5d54ec7 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -1,7 +1,7 @@
/*
* B4420 Silicon/SoC Device Tree Source (pre include)
*
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -54,8 +54,13 @@
dma0 = dma0;
dma1 = dma1;
sdhc = sdhc;
- };
+ fman0 = fman0;
+ ethernet0 = enet0;
+ ethernet1 = enet1;
+ ethernet2 = enet2;
+ ethernet3 = enet3;
+ };
cpus {
#address-cells = 1;
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index 26585d6..3065833 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -1,7 +1,7 @@
/*
* B4860 Silicon/SoC Device Tree Source (post include)
*
- * Copyright 2012 - 2014 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -271,6 +271,24 @@
compatible = fsl,b4860-rcpm, fsl,qoriq-rcpm-2.0;
};
+/include/ qoriq-fman3-0-1g-4.dtsi
+/include/ qoriq-fman3-0-1g-5.dtsi
+/include/ qoriq-fman3-0-10g-0.dtsi
+/include/ qoriq-fman3-0-10g-1.dtsi
+ fman@40 {
+ enet4: ethernet@e8000 {
+ };
+
+ enet5: ethernet@ea000 {
+ };
+
+ enet6: ethernet@f {
+ };
+
+ enet7: ethernet@f2000 {
+ };
+ };
+
L2: l2-cache-controller@c2 {
compatible = fsl,b4860-l2-cache-controller;
};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
index bc914f2..a738f7c 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -1,7 +1,7 @@
/*
* B4860 Silicon/SoC Device Tree Source (pre include)
*
- * Copyright 2012 Freescale Semiconductor Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -54,6 +54,16 @@
dma0 = dma0;
dma1 = dma1;
sdhc = sdhc;
+
+ fman0 = fman0;
+ ethernet0 = enet0;
+ ethernet1 = enet1;
+ ethernet2 = enet2;
+ ethernet3 = enet3;
+ ethernet4 = enet4;
+ ethernet5 = enet5;
+ ethernet6 = enet6;
+ ethernet7 = enet7;
};
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi