Hi Bala,
@@ -709,6 +722,8 @@ void emulate_vsx_load(struct instruction_op *op, union
vsx_reg *reg,
reg->d[0] = reg->d[1] = 0;
switch (op->element_size) {
+ case 32:
+ /* [p]lxvp[x] or [p]stxvp[x] */
This function does not emulate stvxp
case 16:
add emulate_step() changes to support vsx vector paired storage
access instructions that provides octword operands loads/stores
between storage and set of 2 Vector Scalar Registers (VSRs).
Signed-off-by: Balamuruhan S
---
arch/powerpc/include/asm/sstep.h | 2 +-
arch/powerpc/lib/sstep.c
