Re: [PATCH v3 3/3] powerpc/mpc85xx: add support for Keymile's kmcoge4 board

2014-04-08 Thread Scott Wood
On Tue, 2014-03-25 at 14:41 +0100, Valentin Longchamp wrote:
 + lbc: localbus@ffe124000 {
 + reg = 0xf 0xfe124000 0 0x1000;
 + ranges = 0 0 0xf 0xffa0 0x0004 /* LB 0 */
 +   1 0 0xf 0xfb00 0x0001 /* LB 1 */
 +   2 0 0xf 0xd000 0x1000 /* LB 2 */
 +   3 0 0xf 0xe000 0x1000;   /* LB 3 */
 +
 + nand@0,0 {
 + #address-cells = 1;
 + #size-cells = 1;
 + compatible = fsl,elbc-fcm-nand;
 + reg = 0 0 0x4;
 +
 + partition@0 {
 + label = ubi0;
 + reg = 0x0 0x1000;
 + };

Putting partition info in the dts file is a bad habit and (as I've told
others) I don't think we should continue doing so in new dts files.

In this case it looks like you're just making the entire chip into one
partition, so I'm not sure what the point is of partitioning at all.

-Scott


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[PATCH v3 3/3] powerpc/mpc85xx: add support for Keymile's kmcoge4 board

2014-03-25 Thread Valentin Longchamp
This patch introduces the support for Keymile's kmcoge4 board which is
the internal reference design for boards based on Freescale's
P2040/P2041 SoCs. This internal reference design is named kmp204x.

The peripherals used on this board are:
- SPI NOR Flash as bootloader medium
- NAND Flash with a ubi partition
- 2 PCIe busses (hosts 1 and 3)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 4 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
  CPLD
- 2 I2C busses
- last but not least, the mandatory serial port

The patch also adds a defconfig file for this reference design that is
necessary because of the lowmem option that must be set higher due to
the number of PCIe devices with big ioremapped mem ranges on the boad.

Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com

---
Changes in v3:
- add the compatible strings for the localbus nodes
- remove the IRQ part of the board-control node as it is currently being
  reworked

Changes in v2:
- add some nodes on the localbus CS when possible
- only use the corenet_generic machine and add kmcoge4 to the supported
  boards instead of defining a new kmp204x machine
- set better and more precise device nodes for the spi devices
- remove the partion layout for the spi_flash@0

 arch/powerpc/boot/dts/kmcoge4.dts | 157 ++
 arch/powerpc/configs/85xx/kmp204x_defconfig   | 227 ++
 arch/powerpc/platforms/85xx/Kconfig   |   2 +-
 arch/powerpc/platforms/85xx/corenet_generic.c |   3 +-
 4 files changed, 387 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/kmcoge4.dts
 create mode 100644 arch/powerpc/configs/85xx/kmp204x_defconfig

diff --git a/arch/powerpc/boot/dts/kmcoge4.dts 
b/arch/powerpc/boot/dts/kmcoge4.dts
new file mode 100644
index 000..bcd0263
--- /dev/null
+++ b/arch/powerpc/boot/dts/kmcoge4.dts
@@ -0,0 +1,157 @@
+/*
+ * Keymile kmcoge4 Device Tree Source, based on the P2041RDB DTS
+ *
+ * (C) Copyright 2014
+ * Valentin Longchamp, Keymile AG, valentin.longch...@keymile.com
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ fsl/p2041si-pre.dtsi
+
+/ {
+   model = keymile,kmcoge4;
+   compatible = keymile,kmcoge4, keymile,kmp204x;
+   #address-cells = 2;
+   #size-cells = 2;
+   interrupt-parent = mpic;
+
+   memory {
+   device_type = memory;
+   };
+
+   dcsr: dcsr@f {
+   ranges = 0x 0xf 0x 0x01008000;
+   };
+
+   soc: soc@ffe00 {
+   ranges = 0x 0xf 0xfe00 0x100;
+   reg = 0xf 0xfe00 0 0x1000;
+   spi@11 {
+   flash@0 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = spansion,s25fl256s1;
+   reg = 0;
+   spi-max-frequency = 2000; /* input clock 
*/
+   };
+
+   network_clock@1 {
+   compatible = zarlink,zl30343;
+   reg = 1;
+   spi-max-frequency = 800;
+   };
+
+   flash@2 {
+   #address-cells = 1;
+   #size-cells = 1;
+   compatible = micron,m25p32;
+   reg = 2;
+   spi-max-frequency = 1500;
+   };
+   };
+
+   i2c@119000 {
+   status = disabled;
+   };
+
+   i2c@119100 {
+   status = disabled;
+   };
+
+   usb0: usb@21 {
+   status = disabled;
+   };
+
+   usb1: usb@211000 {
+   status = disabled;
+   };
+
+   sata@22 {
+   status = disabled;
+   };
+
+   sata@221000 {
+   status = disabled;
+   };
+   };
+
+   rio: rapidio@ffe0c {
+   status = disabled;
+   };
+
+   lbc: localbus@ffe124000 {
+   reg = 0xf 0xfe124000 0 0x1000;
+   ranges = 0 0 0xf 0xffa0 0x0004 /* LB 0 */
+ 1 0 0xf 0xfb00 0x0001 /* LB 1 */
+ 2 0 0xf 0xd000 0x1000 /* LB 2 */
+ 3 0 0xf 0xe000 0x1000;   /* LB 3 */
+
+   nand@0,0 {
+   #address-cells =