Re: (subset) [Patch v5 00/12] Add audio support for LPC32XX CPUs

2024-06-28 Thread Mark Brown
On Thu, 27 Jun 2024 17:00:18 +0200, Piotr Wojtaszczyk wrote: > This pach set is to bring back audio to machines with a LPC32XX CPU. > The legacy LPC32XX SoC used to have audio spport in linux 2.6.27. > The support was dropped due to lack of interest from mainaeners. > > Piotr Wojtaszczyk (12): >

[Patch v5 00/12] Add audio support for LPC32XX CPUs

2024-06-27 Thread Piotr Wojtaszczyk
This pach set is to bring back audio to machines with a LPC32XX CPU. The legacy LPC32XX SoC used to have audio spport in linux 2.6.27. The support was dropped due to lack of interest from mainaeners. Piotr Wojtaszczyk (12): dt-bindings: dma: pl08x: Add dma-cells description dt-bindings: dma: A

Re: [PATCH v5 00/12] KVM: x86/xen: Add in-kernel Xen event channel delivery

2021-12-09 Thread Paolo Bonzini
On 12/9/21 19:47, David Woodhouse wrote: As in the previous two rounds, the last patch (this time patch 12) is included as illustration of how we*might* use this for fixing the UAF bugs in nesting, but isn't intended to be applied as-is. Patches 1-11 are. Queued 1-7, will be on kvm/next tomorro

Re: [PATCH v5 00/12] KVM: x86/xen: Add in-kernel Xen event channel delivery

2021-12-09 Thread David Woodhouse
On Thu, 2021-12-09 at 19:34 +0100, Paolo Bonzini wrote: > > As in the previous two rounds, the last patch (this time patch 12) is > > included as illustration of how we*might* use this for fixing the UAF > > bugs in nesting, but isn't intended to be applied as-is. Patches 1-11 are. > > Queued 1-7

Re: [PATCH v5 00/12] KVM: x86/xen: Add in-kernel Xen event channel delivery

2021-12-09 Thread Paolo Bonzini
On 11/21/21 13:54, David Woodhouse wrote: Introduce the basic concept of 2 level event channels for kernel delivery, which is just a simple matter of a few test_and_set_bit calls on a mapped shared info page. This can be used for routing MSI of passthrough devices to PIRQ event channels in a Xen

[PATCH v5 00/12] KVM: x86/xen: Add in-kernel Xen event channel delivery

2021-11-21 Thread David Woodhouse
Introduce the basic concept of 2 level event channels for kernel delivery, which is just a simple matter of a few test_and_set_bit calls on a mapped shared info page. This can be used for routing MSI of passthrough devices to PIRQ event channels in a Xen guest, and we can build on it for deliverin

[PATCH v5 00/12]

2019-08-15 Thread Sam Bobroff
Hi all, Here is v5, with a complete rewrite of the commit message for patch 1, and the inclusion of three patches from another set which are based on this set (previously titled "EEH fixes 4"). Cover letter: This patch set adds support for EEH recovery of hot plugged devices on pSeries machines.

[PATCH v5 00/12] perf/core: Generalise event exclusion checking

2019-01-10 Thread Andrew Murray
Many PMU drivers do not have the capability to exclude counting events that occur in specific contexts such as idle, kernel, guest, etc. These drivers indicate this by returning an error in their event_init upon testing the events attribute flags. However this approach requires that each time a ne

[PATCH v5 00/12]powerpc: "paca->soft_enabled" based local atomic operation implementation

2017-01-04 Thread Madhavan Srinivasan
Local atomic operations are fast and highly reentrant per CPU counters. Used for percpu variable updates. Local atomic operations only guarantee variable modification atomicity wrt the CPU which owns the data and these needs to be executed in a preemption safe way. Here is the design of the patchs

[Patch v5 00/12] microblaze/MIPS/PowerPC: Xilinx intc

2016-10-17 Thread Zubair Lutfullah Kakakhel
Hi, The MIPS based Xilfpga platform uses the axi interrupt controller daisy chained to the MIPS microAptiv cpu interrupt controller. This patch series moves the axi interrupt controller driver out of arch/microblaze to drivers/irqchip and then cleans it up a bit. And then remove another implementa

[RFC PATCH v5 00/12] powerpc: "paca->soft_enabled" based local atomic operation implementation

2016-09-05 Thread Madhavan Srinivasan
Local atomic operations are fast and highly reentrant per CPU counters. Used for percpu variable updates. Local atomic operations only guarantee variable modification atomicity wrt the CPU which owns the data and these needs to be executed in a preemption safe way. Here is the design of the patchs

[RFC PATCH v5 00/12] Machine check handling in linux host.

2013-10-30 Thread Mahesh J Salgaonkar
Hi, Please find the patch set that performs the machine check handling inside linux host. The design is to be able to handle re-entrancy so that we do not clobber the machine check information during nested machine check interrupt. The patch 2 introduces separate emergency stack in paca structure