Re: [PATCH v5 00/16] KVM: PPC: Book3S HV: add XIVE native exploitation mode

2019-05-09 Thread Cédric Le Goater
Satheesh, >> Xive(both ic-mode=dual and ic-mode=xive) guest fails to boot with >> guest memory > 64G, till 64G it boots fine. >> >> Note: xics(ic-mode=xics) guest with the same configuration boots fine > > Indeed. The guest hangs because IPIs are not correctly received. The guest > sees the

Re: [PATCH v5 00/16] KVM: PPC: Book3S HV: add XIVE native exploitation mode

2019-05-06 Thread Cédric Le Goater
Hello Satheesh, On 4/29/19 10:05 AM, Satheesh Rajendran wrote: > On Wed, Apr 10, 2019 at 07:04:32PM +0200, Cédric Le Goater wrote: >> Hello, >> >> GitHub trees available here : >> >> QEMU sPAPR: >> >> https://github.com/legoater/qemu/commits/xive-next >> >> Linux/KVM: >> >>

Re: [PATCH v5 00/16] KVM: PPC: Book3S HV: add XIVE native exploitation mode

2019-04-29 Thread Satheesh Rajendran
On Wed, Apr 10, 2019 at 07:04:32PM +0200, Cédric Le Goater wrote: > Hello, > > GitHub trees available here : > > QEMU sPAPR: > > https://github.com/legoater/qemu/commits/xive-next > > Linux/KVM: > > https://github.com/legoater/linux/commits/xive-5.1 Hi, Xive(both ic-mode=dual and

[PATCH v5 00/16] KVM: PPC: Book3S HV: add XIVE native exploitation mode

2019-04-10 Thread Cédric Le Goater
Hello, On the POWER9 processor, the XIVE interrupt controller can control interrupt sources using MMIOs to trigger events, to EOI or to turn off the sources. Priority management and interrupt acknowledgment is also controlled by MMIO in the CPU presenter sub-engine. PowerNV/baremetal Linux runs