Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API

2019-08-21 Thread Claudio Carvalho
On 8/9/19 9:45 AM, Michael Ellerman wrote: > Claudio Carvalho writes: >> From: Sukadev Bhattiprolu >> >> POWER9 processor includes support for Protected Execution Facility (PEF). >> Which POWER9? Please be more precise. >> >> It's public knowledge that some versions of Power9 don't have PEF

Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API

2019-08-21 Thread Claudio Carvalho
On 8/12/19 12:58 PM, Fabiano Rosas wrote: > Claudio Carvalho writes: > > Some small suggestions below: > >> + >> +* The privilege of a process is now determined by three MSR bits, >> + MSR(S, HV, PR). In each of the tables below the modes are listed >> + from least privilege to

Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API

2019-08-12 Thread Fabiano Rosas
Claudio Carvalho writes: Some small suggestions below: > + > +* The privilege of a process is now determined by three MSR bits, > + MSR(S, HV, PR). In each of the tables below the modes are listed > + from least privilege to highest privilege. The higher privilege > + modes

Re: [PATCH v5 1/7] Documentation/powerpc: Ultravisor API

2019-08-09 Thread Michael Ellerman
Claudio Carvalho writes: > From: Sukadev Bhattiprolu > > POWER9 processor includes support for Protected Execution Facility (PEF). Which POWER9? Please be more precise. It's public knowledge that some versions of Power9 don't have PEF (or have it broken / fused off). People are going to try

[PATCH v5 1/7] Documentation/powerpc: Ultravisor API

2019-08-07 Thread Claudio Carvalho
From: Sukadev Bhattiprolu POWER9 processor includes support for Protected Execution Facility (PEF). Attached documentation provides an overview of PEF and defines the API for various interfaces that must be implemented in the Ultravisor firmware as well as in the KVM Hypervisor. Based on input