Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-18 Thread Grant Likely
On Wed, 17 Apr 2013 12:22:23 -0400, Jason Cooper ja...@lakedaemon.net wrote:
 On Wed, Apr 17, 2013 at 05:17:48PM +0100, Grant Likely wrote:
  On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net wrote:
   On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
   On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray 
   andrew.mur...@arm.com wrote:
On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
 The pci_process_bridge_OF_ranges function, used to parse the ranges
 property of a PCI host device, is found in both Microblaze and 
 PowerPC
 architectures. These implementations are nearly identical. This patch
 moves this common code to a common place.

 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com
 Reviewed-by: Rob Herring rob.herr...@calxeda.com
 Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
 Tested-by: Linus Walleij linus.wall...@linaro.org
 Acked-by: Michal Simek mon...@monstr.eu
 ---
  arch/microblaze/include/asm/pci-bridge.h |5 +-
  arch/microblaze/pci/pci-common.c |  192 
 
  arch/powerpc/include/asm/pci-bridge.h|5 +-
  arch/powerpc/kernel/pci-common.c |  192 
 
   
Is there anyone on linuxppc-dev/linux-mips that can help test this 
patchset?
   
I've tested that it builds on powerpc with a variety of configs (some 
which
include fsl_pci.c implementation). Though I don't have hardware to 
verify that
it works.
   
I haven't tested this builds or runs on MIPS.
   
You shouldn't see any difference in behaviour or new warnings and PCI 
devices
should continue to operate as before.
  
   I've got through a line-by-line comparison between powerpc, microblaze,
   and then new code. The differences are purely cosmetic, so I have
   absolutely no concerns about this patch. I've applied it to my tree.
  
   oops.  Due to the number of dependencies the mvebu-pcie series has (this
   being one of them, we (arm-soc/mvebu) asked if we could take this
   through our tree.  Rob Herring agreed to this several days ago.  Is this
   a problem for you?
  
   It would truly (dogs and cats living together) upset the apple cart for
   us at this stage to pipe these through a different tree...
  
  Not a problem at all. I'll drop it.
 
 Great!  Thanks.

You can add my Acked-by: Grant Likely grant.lik...@linaro.org to the
first patch. I've not reviewed out the second or third patches yet.

None of this appears to be in linux-next yet. I've boot tested on
PowerPC, but that isn't the same as an ack by the PowerPC maintainers.
It is probably too late for the whole now since we're after -rc7.
However, if you ask me to, I have absolutely no problem putting the
first patch into my tree for v3.10 merging. I went over the patch
line-by-line and am convinced that it is functionally identical.

Let me know if you need me to do this.

g.

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Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-18 Thread Jason Cooper
On Thu, Apr 18, 2013 at 01:48:32PM +0100, Grant Likely wrote:
 On Wed, 17 Apr 2013 12:22:23 -0400, Jason Cooper ja...@lakedaemon.net wrote:
  On Wed, Apr 17, 2013 at 05:17:48PM +0100, Grant Likely wrote:
   On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net 
   wrote:
On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray 
andrew.mur...@arm.com wrote:
 On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
  The pci_process_bridge_OF_ranges function, used to parse the 
  ranges
  property of a PCI host device, is found in both Microblaze and 
  PowerPC
  architectures. These implementations are nearly identical. This 
  patch
  moves this common code to a common place.
 
  Signed-off-by: Andrew Murray andrew.mur...@arm.com
  Signed-off-by: Liviu Dudau liviu.du...@arm.com
  Reviewed-by: Rob Herring rob.herr...@calxeda.com
  Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
  Tested-by: Linus Walleij linus.wall...@linaro.org
  Acked-by: Michal Simek mon...@monstr.eu
  ---
   arch/microblaze/include/asm/pci-bridge.h |5 +-
   arch/microblaze/pci/pci-common.c |  192 
  
   arch/powerpc/include/asm/pci-bridge.h|5 +-
   arch/powerpc/kernel/pci-common.c |  192 
  

 Is there anyone on linuxppc-dev/linux-mips that can help test this 
 patchset?

 I've tested that it builds on powerpc with a variety of configs 
 (some which
 include fsl_pci.c implementation). Though I don't have hardware to 
 verify that
 it works.

 I haven't tested this builds or runs on MIPS.

 You shouldn't see any difference in behaviour or new warnings and 
 PCI devices
 should continue to operate as before.
   
I've got through a line-by-line comparison between powerpc, microblaze,
and then new code. The differences are purely cosmetic, so I have
absolutely no concerns about this patch. I've applied it to my tree.
   
oops.  Due to the number of dependencies the mvebu-pcie series has (this
being one of them, we (arm-soc/mvebu) asked if we could take this
through our tree.  Rob Herring agreed to this several days ago.  Is this
a problem for you?
   
It would truly (dogs and cats living together) upset the apple cart for
us at this stage to pipe these through a different tree...
   
   Not a problem at all. I'll drop it.
  
  Great!  Thanks.
 
 You can add my Acked-by: Grant Likely grant.lik...@linaro.org to the
 first patch. I've not reviewed out the second or third patches yet.
 
 None of this appears to be in linux-next yet. I've boot tested on
 PowerPC, but that isn't the same as an ack by the PowerPC maintainers.
 It is probably too late for the whole now since we're after -rc7.
 However, if you ask me to, I have absolutely no problem putting the
 first patch into my tree for v3.10 merging. I went over the patch
 line-by-line and am convinced that it is functionally identical.
 
 Let me know if you need me to do this.

Thanks for the offer, Olof just pulled the branch last night (my PRs
were a little late trying to sort all this out), so it should be in
shortly.

FYI:

  65ee348 of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

is in arm-soc/mvebu/drivers as well as arm-soc/next/drivers (and
arm-soc/for-next if you want to test merging everything...)

thx,

Jason.
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Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-17 Thread Grant Likely
On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com wrote:
 On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
  The pci_process_bridge_OF_ranges function, used to parse the ranges
  property of a PCI host device, is found in both Microblaze and PowerPC
  architectures. These implementations are nearly identical. This patch
  moves this common code to a common place.
  
  Signed-off-by: Andrew Murray andrew.mur...@arm.com
  Signed-off-by: Liviu Dudau liviu.du...@arm.com
  Reviewed-by: Rob Herring rob.herr...@calxeda.com
  Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
  Tested-by: Linus Walleij linus.wall...@linaro.org
  Acked-by: Michal Simek mon...@monstr.eu
  ---
   arch/microblaze/include/asm/pci-bridge.h |5 +-
   arch/microblaze/pci/pci-common.c |  192 
  
   arch/powerpc/include/asm/pci-bridge.h|5 +-
   arch/powerpc/kernel/pci-common.c |  192 
  
 
 Is there anyone on linuxppc-dev/linux-mips that can help test this patchset?
 
 I've tested that it builds on powerpc with a variety of configs (some which
 include fsl_pci.c implementation). Though I don't have hardware to verify that
 it works.
 
 I haven't tested this builds or runs on MIPS.
 
 You shouldn't see any difference in behaviour or new warnings and PCI devices
 should continue to operate as before.

I've got through a line-by-line comparison between powerpc, microblaze,
and then new code. The differences are purely cosmetic, so I have
absolutely no concerns about this patch. I've applied it to my tree.

g.

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Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-17 Thread Jason Cooper
On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
 On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com 
 wrote:
  On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
   The pci_process_bridge_OF_ranges function, used to parse the ranges
   property of a PCI host device, is found in both Microblaze and PowerPC
   architectures. These implementations are nearly identical. This patch
   moves this common code to a common place.
   
   Signed-off-by: Andrew Murray andrew.mur...@arm.com
   Signed-off-by: Liviu Dudau liviu.du...@arm.com
   Reviewed-by: Rob Herring rob.herr...@calxeda.com
   Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
   Tested-by: Linus Walleij linus.wall...@linaro.org
   Acked-by: Michal Simek mon...@monstr.eu
   ---
arch/microblaze/include/asm/pci-bridge.h |5 +-
arch/microblaze/pci/pci-common.c |  192 
   
arch/powerpc/include/asm/pci-bridge.h|5 +-
arch/powerpc/kernel/pci-common.c |  192 
   
  
  Is there anyone on linuxppc-dev/linux-mips that can help test this patchset?
  
  I've tested that it builds on powerpc with a variety of configs (some which
  include fsl_pci.c implementation). Though I don't have hardware to verify 
  that
  it works.
  
  I haven't tested this builds or runs on MIPS.
  
  You shouldn't see any difference in behaviour or new warnings and PCI 
  devices
  should continue to operate as before.
 
 I've got through a line-by-line comparison between powerpc, microblaze,
 and then new code. The differences are purely cosmetic, so I have
 absolutely no concerns about this patch. I've applied it to my tree.

oops.  Due to the number of dependencies the mvebu-pcie series has (this
being one of them, we (arm-soc/mvebu) asked if we could take this
through our tree.  Rob Herring agreed to this several days ago.  Is this
a problem for you?

It would truly (dogs and cats living together) upset the apple cart for
us at this stage to pipe these through a different tree...

thx,

Jason.
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Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-17 Thread Grant Likely
On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net wrote:
 On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
 On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com 
 wrote:
  On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
   The pci_process_bridge_OF_ranges function, used to parse the ranges
   property of a PCI host device, is found in both Microblaze and PowerPC
   architectures. These implementations are nearly identical. This patch
   moves this common code to a common place.
  
   Signed-off-by: Andrew Murray andrew.mur...@arm.com
   Signed-off-by: Liviu Dudau liviu.du...@arm.com
   Reviewed-by: Rob Herring rob.herr...@calxeda.com
   Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
   Tested-by: Linus Walleij linus.wall...@linaro.org
   Acked-by: Michal Simek mon...@monstr.eu
   ---
arch/microblaze/include/asm/pci-bridge.h |5 +-
arch/microblaze/pci/pci-common.c |  192 
   
arch/powerpc/include/asm/pci-bridge.h|5 +-
arch/powerpc/kernel/pci-common.c |  192 
   
 
  Is there anyone on linuxppc-dev/linux-mips that can help test this 
  patchset?
 
  I've tested that it builds on powerpc with a variety of configs (some which
  include fsl_pci.c implementation). Though I don't have hardware to verify 
  that
  it works.
 
  I haven't tested this builds or runs on MIPS.
 
  You shouldn't see any difference in behaviour or new warnings and PCI 
  devices
  should continue to operate as before.

 I've got through a line-by-line comparison between powerpc, microblaze,
 and then new code. The differences are purely cosmetic, so I have
 absolutely no concerns about this patch. I've applied it to my tree.

 oops.  Due to the number of dependencies the mvebu-pcie series has (this
 being one of them, we (arm-soc/mvebu) asked if we could take this
 through our tree.  Rob Herring agreed to this several days ago.  Is this
 a problem for you?

 It would truly (dogs and cats living together) upset the apple cart for
 us at this stage to pipe these through a different tree...

Not a problem at all. I'll drop it.

g.
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Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-17 Thread Jason Cooper
On Wed, Apr 17, 2013 at 05:17:48PM +0100, Grant Likely wrote:
 On Wed, Apr 17, 2013 at 5:10 PM, Jason Cooper ja...@lakedaemon.net wrote:
  On Wed, Apr 17, 2013 at 05:00:15PM +0100, Grant Likely wrote:
  On Tue, 16 Apr 2013 11:30:06 +0100, Andrew Murray andrew.mur...@arm.com 
  wrote:
   On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
The pci_process_bridge_OF_ranges function, used to parse the ranges
property of a PCI host device, is found in both Microblaze and PowerPC
architectures. These implementations are nearly identical. This patch
moves this common code to a common place.
   
Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Reviewed-by: Rob Herring rob.herr...@calxeda.com
Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Tested-by: Linus Walleij linus.wall...@linaro.org
Acked-by: Michal Simek mon...@monstr.eu
---
 arch/microblaze/include/asm/pci-bridge.h |5 +-
 arch/microblaze/pci/pci-common.c |  192 

 arch/powerpc/include/asm/pci-bridge.h|5 +-
 arch/powerpc/kernel/pci-common.c |  192 

  
   Is there anyone on linuxppc-dev/linux-mips that can help test this 
   patchset?
  
   I've tested that it builds on powerpc with a variety of configs (some 
   which
   include fsl_pci.c implementation). Though I don't have hardware to 
   verify that
   it works.
  
   I haven't tested this builds or runs on MIPS.
  
   You shouldn't see any difference in behaviour or new warnings and PCI 
   devices
   should continue to operate as before.
 
  I've got through a line-by-line comparison between powerpc, microblaze,
  and then new code. The differences are purely cosmetic, so I have
  absolutely no concerns about this patch. I've applied it to my tree.
 
  oops.  Due to the number of dependencies the mvebu-pcie series has (this
  being one of them, we (arm-soc/mvebu) asked if we could take this
  through our tree.  Rob Herring agreed to this several days ago.  Is this
  a problem for you?
 
  It would truly (dogs and cats living together) upset the apple cart for
  us at this stage to pipe these through a different tree...
 
 Not a problem at all. I'll drop it.

Great!  Thanks.

Jason.
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[PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-16 Thread Andrew Murray
The pci_process_bridge_OF_ranges function, used to parse the ranges
property of a PCI host device, is found in both Microblaze and PowerPC
architectures. These implementations are nearly identical. This patch
moves this common code to a common place.

Signed-off-by: Andrew Murray andrew.mur...@arm.com
Signed-off-by: Liviu Dudau liviu.du...@arm.com
Reviewed-by: Rob Herring rob.herr...@calxeda.com
Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
Tested-by: Linus Walleij linus.wall...@linaro.org
Acked-by: Michal Simek mon...@monstr.eu
---
 arch/microblaze/include/asm/pci-bridge.h |5 +-
 arch/microblaze/pci/pci-common.c |  192 
 arch/powerpc/include/asm/pci-bridge.h|5 +-
 arch/powerpc/kernel/pci-common.c |  192 
 drivers/of/of_pci.c  |  200 ++
 include/linux/of_pci.h   |4 +
 6 files changed, 206 insertions(+), 392 deletions(-)

diff --git a/arch/microblaze/include/asm/pci-bridge.h 
b/arch/microblaze/include/asm/pci-bridge.h
index cb5d397..5783cd6 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -10,6 +10,7 @@
 #include linux/pci.h
 #include linux/list.h
 #include linux/ioport.h
+#include linux/of_pci.h
 
 struct device_node;
 
@@ -132,10 +133,6 @@ extern void setup_indirect_pci(struct pci_controller *hose,
 extern struct pci_controller *pci_find_hose_for_OF_device(
struct device_node *node);
 
-/* Fill up host controller resources from the OF node */
-extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
-   struct device_node *dev, int primary);
-
 /* Allocate  free a PCI host bridge structure */
 extern struct pci_controller *pcibios_alloc_controller(struct device_node 
*dev);
 extern void pcibios_free_controller(struct pci_controller *phb);
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 9ea521e..2735ad9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -622,198 +622,6 @@ void pci_resource_to_user(const struct pci_dev *dev, int 
bar,
*end = rsrc-end - offset;
 }
 
-/**
- * pci_process_bridge_OF_ranges - Parse PCI bridge resources from device tree
- * @hose: newly allocated pci_controller to be setup
- * @dev: device node of the host bridge
- * @primary: set if primary bus (32 bits only, soon to be deprecated)
- *
- * This function will parse the ranges property of a PCI host bridge device
- * node and setup the resource mapping of a pci controller based on its
- * content.
- *
- * Life would be boring if it wasn't for a few issues that we have to deal
- * with here:
- *
- *   - We can only cope with one IO space range and up to 3 Memory space
- * ranges. However, some machines (thanks Apple !) tend to split their
- * space into lots of small contiguous ranges. So we have to coalesce.
- *
- *   - We can only cope with all memory ranges having the same offset
- * between CPU addresses and PCI addresses. Unfortunately, some bridges
- * are setup for a large 1:1 mapping along with a small window which
- * maps PCI address 0 to some arbitrary high address of the CPU space in
- * order to give access to the ISA memory hole.
- * The way out of here that I've chosen for now is to always set the
- * offset based on the first resource found, then override it if we
- * have a different offset and the previous was set by an ISA hole.
- *
- *   - Some busses have IO space not starting at 0, which causes trouble with
- * the way we do our IO resource renumbering. The code somewhat deals with
- * it for 64 bits but I would expect problems on 32 bits.
- *
- *   - Some 32 bits platforms such as 4xx can have physical space larger than
- * 32 bits so we need to use 64 bits values for the parsing
- */
-void pci_process_bridge_OF_ranges(struct pci_controller *hose,
- struct device_node *dev, int primary)
-{
-   const u32 *ranges;
-   int rlen;
-   int pna = of_n_addr_cells(dev);
-   int np = pna + 5;
-   int memno = 0, isa_hole = -1;
-   u32 pci_space;
-   unsigned long long pci_addr, cpu_addr, pci_next, cpu_next, size;
-   unsigned long long isa_mb = 0;
-   struct resource *res;
-
-   pr_info(PCI host bridge %s %s ranges:\n,
-  dev-full_name, primary ? (primary) : );
-
-   /* Get ranges property */
-   ranges = of_get_property(dev, ranges, rlen);
-   if (ranges == NULL)
-   return;
-
-   /* Parse it */
-   pr_debug(Parsing ranges property...\n);
-   while ((rlen -= np * 4) = 0) {
-   /* Read next ranges element */
-   pci_space = ranges[0];
-   pci_addr = of_read_number(ranges + 1, 2);
-   cpu_addr = of_translate_address(dev, ranges + 3);
-   

Re: [PATCH v7 1/3] of/pci: Unify pci_process_bridge_OF_ranges from Microblaze and PowerPC

2013-04-16 Thread Andrew Murray
On Tue, Apr 16, 2013 at 11:18:26AM +0100, Andrew Murray wrote:
 The pci_process_bridge_OF_ranges function, used to parse the ranges
 property of a PCI host device, is found in both Microblaze and PowerPC
 architectures. These implementations are nearly identical. This patch
 moves this common code to a common place.
 
 Signed-off-by: Andrew Murray andrew.mur...@arm.com
 Signed-off-by: Liviu Dudau liviu.du...@arm.com
 Reviewed-by: Rob Herring rob.herr...@calxeda.com
 Tested-by: Thomas Petazzoni thomas.petazz...@free-electrons.com
 Tested-by: Linus Walleij linus.wall...@linaro.org
 Acked-by: Michal Simek mon...@monstr.eu
 ---
  arch/microblaze/include/asm/pci-bridge.h |5 +-
  arch/microblaze/pci/pci-common.c |  192 
  arch/powerpc/include/asm/pci-bridge.h|5 +-
  arch/powerpc/kernel/pci-common.c |  192 

Is there anyone on linuxppc-dev/linux-mips that can help test this patchset?

I've tested that it builds on powerpc with a variety of configs (some which
include fsl_pci.c implementation). Though I don't have hardware to verify that
it works.

I haven't tested this builds or runs on MIPS.

You shouldn't see any difference in behaviour or new warnings and PCI devices
should continue to operate as before.

Andrew Murray
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